AN-0986: Adjusting the Output Range and Span of the AD5362 (Rev. 0)

AN-0986
APPLICATION NOTE
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Adjusting the Output Range and Span of the AD5362
by Ken Kavanagh
INTRODUCTION
This application note describes how the features of the AD5362
can be used to set up different output ranges on the DAC channels.
While this application note uses the AD5362 as an example, the
methods are also valid for the AD5360, the AD5361, and the
AD5363. The relevant data sheet should be used in conjunction
with this application note. Being able to set up different output
ranges on different channels can be advantageous in PLC and
analog I/O applications because it allows the user to use the full
16-bit digital code range (0 to 65,535) regardless of the output
range of the DAC.
USING THE REFERENCE TO SELECT AN OUTPUT
SPAN
In its default operating condition, the AD5362 produces a bipolar
output span that is four times the reference value. For example,
a 5 V reference gives a span of ±10 V, and a 3 V reference gives a
span of ±6 V. The AD5362 has two independent reference input
pins, VREF0 and VREF1. VREF0 is the reference source for
DAC 0 to DAC 3, and VREF1 is the reference source for DAC 4
to DAC 7. Figure 1 shows how the separate reference values can
be used to implement different DAC output ranges.
VREF0
DAC 4
TO
DAC 7
2.5V
VREF1
VOUT0
±10V
VOUT1
±10V
VOUT2
±10V
VOUT3
±10V
VOUT4
±5V
VOUT5
±5V
VOUT6
±5V
VOUT7
±5V
VOUT = 4 × V REF ×
DAC _ CODE − (4 × OFFSET _ CODE )
+ VSIGGND
2 16
where:
DAC_CODE is the data written to the X1A or X1B register of a
DAC. It should be within the range of 0 to 65,535.
OFFSET_CODE is the value loaded to the relevant offset DAC
register. It should be in the range of 0 to 16,383. Note that the
OFFSET_CODE is multiplied by 4 in the equation because the
offset DAC has 14 bits of resolution and the AD5362 DACs
have 16 bits of resolution.
VREF is the reference voltage and is in the range of 2.0 V to 5.0 V.
VSIGGND is the voltage on the relevant SIGGND pin. This is
normally 0 V.
The default value of the offset DAC register is 8192. This gives a
voltage output that is bipolar and centered around 0 V. It can be
seen from the preceding equation that values above 8192 move
the center of the span below 0 V and values below 8192 move
the center of the span above 0 V. Figure 2 shows how the offset
DACs can be used to set up different ranges on different DACs.
5.0V
VREF0
Figure 1. Using Separate References
DAC 0
TO
DAC 3
CHANGING THE OUTPUT RANGE
By default, the DAC outputs swing positive and negative around
0 V. The center point of the span can be altered to give output
ranges that do not necessarily center at 0 V. This is achieved by
programming the offset DAC registers. There are two offset
DAC registers in the AD5362. OFS0 controls the offset of DAC 0
to DAC 3 and OFS1 controls the offset of DAC 4 to DAC 7. The
offset DACs in the AD5362 are 14-bit DACs and have a span of
four times the reference value. In theory, this allows the user to
move the output span up or down by up to 10 V. However, the
Rev. 0 | Page 1 of 2
VOUT0
–8V TO +12V
VOUT1
–8V TO +12V
VOUT2
–8V TO +12V
VOUT3
–8V TO +12V
VOUT4
0V TO +10V
VOUT5
0V TO +10V
VOUT6
0V TO +10V
VOUT7
0V TO +10V
OFS0 = 6553
OFS1 = 0
DAC 4
TO
DAC 7
2.5V
VREF1
Figure 2. Generating Different Output Ranges
07878-002
DAC 0
TO
DAC 3
The output voltage of any DAC channel is governed by the
following formula:
07878-001
5.0V
outputs can only be adjusted within the limits of the supplies
and headroom requirements. For example, using a 2.5 V reference, the nominal ±5 V output can be offset to produce either
a −10 V to 0 V or 0 V to +10 V output. However, with a 5 V
reference, producing a nominal ±10 V output, the offset DAC
registers cannot be used to generate a 0 V to +20 V output because
this violates the power supply and headroom limitations.
AN-0986
Application Note
USING THE M AND C REGISTERS
Each DAC channel in the AD5362 has a dedicated gain (M) and
offset (C) adjustment register. These registers work on the principle that, because the transfer function of the AD5362 is a straight
line, it can be represented by the equation
y = mx + c
(1)
where:
y is the output.
x in the input.
m is the slope of the transfer function.
c is the offset.
To alter the span from 16.384 V to 16 V requires that the gain
register (that is, the slope of the transfer function) be reduced by
16 
65,535 × 
 = 63,999
 16.384 
The M register is programmed with 63,999.
The output now gives voltages between ±8 V for DAC codes
between 0 and 65,535.
Example 2
The AD5362 is required to output −4 V to +12 V. A 4.096 V
reference is available.
Figure 3 shows how the registers are configured.
Solution
The default value for the M register is 65,535, which corresponds to a gain of 1. The default value of the C register is
32,768, corresponding to an offset of 0 V. All the M and C
registers are 16 bits in resolution, meaning that each LSB is
The output span for this example, 16 V, is the same as for
Example 1. In this case, the offset DAC register can be used to
move the span to the required range. The transfer function
needs to be moved up by 4 V to obtain the desired span.
1 LSB =
(4 × VREF )
(2)
65,536
Because the offset DAC register is a 14-bit register, the LSB size is
16
= 976.56 μV
16,384
Example 1
The default value for the offset DAC register is 8192.
The AD5362 is required to produce a ±8 V output. A 4.096V
reference is available.
To add 4 V to the transfer function requires programming the
offset DAC register with
Solution
The 4.096 V reference produces, by default, a ±8.192 V output
(assuming there are no offset or gain errors). The zero code
voltage, −8.192 V, can be converted to −8 V by adding 0.192 V
of positive offset. This is achieved by programming the C
register. With a 4.096 V reference, the output span is 16.384 V,
which gives 1 LSB = 250 µV.
Moving the zero code from −8.192 V to +8 V therefore requires
0.192
= 768 LSBs
0.00025
to be added to the default value of the C register.
In theory, the full-scale voltage should now be 0.192 V higher.
In reality, however, the positive full-scale voltage does not move.
This is because the output is at a maximum when


4
 = 4096
8192 − 
 976.56 μV 


The output now gives voltages between −4 V and +12 V for
DAC codes between 0 and 65,535.
ADDITIONAL INFORMATION
Note that the preceding examples assume that there are no gain
or offset errors associated with the AD5362. The AD5362 is
factory calibrated to produce the most accurate results when
the default value of the offset DAC register is used. Altering the
offset DAC register from its default value may add additional
offset error to the DAC outputs. The offset can be compensated
for by changing the offset DAC register until the correct output
range is achieved.
mx + 768 ≥ 65,535 (that is, when x > 64,767)
X1x
REGISTER
DAC
REGISTER
DAC
VOUT
M
REGISTER
07878-003
FROM SERIAL
INTERFACE
X2x
REGISTER
C
REGISTER
Figure 3. AD5362 Register Configuration
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registered trademarks are the property of their respective owners.
AN07878-0-12/08(0)
Rev. 0 | Page 2 of 2
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