Board Users Manual XMC Link

UG_201512_PL30_004
XMC™ Link
Based on SEGGER J-Link Technology
About this document
Scope and purpose
This is the user’s manual for the XMC™ Link also called isolated debug probe, providing technical information
and hints on how to use it.
Intended audience
This document is intended for anyone who wants to use the XMC™ Link.
Table of contents
About this document .............................................................................................................................................1
Table of contents ...................................................................................................................................................1
1
1.1
1.2
Introduction.......................................................................................................................................2
Block diagram..........................................................................................................................................2
Getting started.........................................................................................................................................3
2
2.1
2.2
2.2.1
2.3
2.4
Hardware description ........................................................................................................................4
Known limitation.....................................................................................................................................4
Debug connector.....................................................................................................................................4
Pinout of debug connectors ..............................................................................................................5
Power supply ...........................................................................................................................................6
Virtual COM Port (UART-to-USB Bridge) .................................................................................................6
3
3.1
3.1.1
3.2
3.3
Production data .................................................................................................................................7
Schematics ..............................................................................................................................................7
Differences in hardware versions ......................................................................................................7
Components placement and geometry .................................................................................................9
List of material.........................................................................................................................................9
Revision history ...................................................................................................................................................11
User's Manual
www.infineon.com
R1.0
2015-12-11
XMC™ Link
Based on SEGGER J-Link Technology
Table of contents
1
Introduction
This document describes the features and hardware details of the XMC™ Link. XMC™ Link is an isolated debug
probe for all XMC™ microcontrollers.
The debug probe is based on SEGGER J-Link debug firmware, which enables use with DAVE™ and all major
third-party compiler/IDEs known from the wide ARM® ecosystem. Table 1 shows its specification.
Table 1
XMC™ Link specification
Supported Processor
All Infineon Cortex®-M based XMC™ Microcontroller
Dimensions
62 x 33 mm (without cables plugged in)
Power
PC side: 5 V via Micro-AB USB Connector
Target side: 2.5 V – 5 .5V via one of the debug connector (VDD)
Connectors
• 10-pin Cortex® Debug Connector
• 8-pin XMC™ MCU Debug Connector
• Micro –AB USB Connector
Supported Protocols
• Serial Wire Debug (SWD)
• Single Pin Debug (SPD)
• Serial Wire Viewer (SWV via SWO pin)
• JTAG
• UART-to-USB Bride, Virtual COM (VCOM)
• 1 kV functional isolation
Others
1.1
Block diagram
The block diagram in Figure 1 shows the main components of the XMC™ Link and their interconnections. There
are following main building blocks:
• XMC4200 Microcontroller in a VQFN42 package
• Isolating Device
• 10-pin Cortex® Debug Connector
• 8-pin XMC™ MCU Debug Connector
• Micro-AB USB Connector
• 2 LEDs: Debug LED and Communication LED
• 12 MHz Crystal
User's Manual
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XMC™ Link
Based on SEGGER J-Link Technology
Table of contents
XMC™ Link V1
12 MHz
Crystal
2.5V -5.5V
8-pin XMC™ MCU
Debug Connector
10-pin Cortex™
Debug Connector
SPD
SWD
RX/TX
SPD
SWD
JTAG
SWV
Isolating
Device
DIR
RESET
GPIO
SPD
SWD
U0C0
JTAG
U0C1
SWV
U1C1
RX/TX
U1C0
Debug
LED
OCS
COM
LED
CCU80
XMC4200
Microcontroller
USB
USB
Micro
USB
EVR
3.3V
IFX54441
Voltage
Regulator
5V
BlockDiag.emf
Figure 1
1.2
Block diagram of the XMC™ Link
Getting started
To operate the XMC™ Link the installation of the J-Link Driver is required.
1. Please download the latest version from https://www.segger.com/jlink-software.html and install it on your
PC/laptop.
Note: The J-Link driver is also part of the typical installation of DAVE™ and 3rd party tools supporting SEGGER JLink.
2. Connect XMC™ Link with your PC/laptop using the Micro USB cable.
3. A proper connection and installation of the J-Link driver is indicated by a constantly illuminated DEBUG
LED.
4. Connect your XMC™ target board with XMC™ Link using one of the enclosed cables.
5. Select SEGGER J-Link as debugger in your preferred IDE e.g. DAVE™
6. Start the flash programming and debugging session
User's Manual
3
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XMC™ Link
Based on SEGGER J-Link Technology
Table of contents
2
Hardware description
The following chapters provide a detailed description of the hardware and how it can be used. The hardware is
depicted in Figure 2.
Figure 2
2.1
PCB of the XMC™ Link
Known limitation
XMC Link™ V1 has a minor known limitation which could occur only during programming the BMI of a XMC1000
device in ASC-BSL mode to another BMI mode. This limitation is solved in the PCB version V1.1. The version
number is printed on the bottom side of the PCB below the USB connector.
The limitation can be avoided if the XMC™ Link V1 is powered before the target XMC™ will be powered.
2.2
Debug connector
The XMC™ Link can be connected to the XMC™ target microcontroller by either of the debug connectors:
• 8-pin XMC™ MCU Debug Connector (2 x 4 pin, 0.1”, 2.54mm)
• 10-pin Cortex™ Debug Connector (2 x 5 pin, 0.05”, 1.27mm)
The 8-pin XMC™ MCU Debug Connector is mainly used for the XMC1000 applications. The 10-pin Cortex™ Debug
Connector can be used for all XMC™ families but is focusing on the XMC4000 family supporting Serial Wire
Viewer (SWV) via the SWO pin.
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XMC™ Link
Based on SEGGER J-Link Technology
Table of contents
The common debug protocol supported by both connectors is Serial Wire Debug (SWD). Figure 3 provides an
overview on all supported debug protocols and communication channels.
XMC1000 Family
XMC4000 Family
8-pin XMC™ MCU
Debug Connector
10-pin Cortex™
Debug Connector
10-pin Cortex™
Debug Connector
Serial Wire Debug
(SWD)



Single Pin Debug
(SPD)


Serial Wire Viewer
(SWV/SWO)
Virtual COM Port
(UART-to-USB Bridge)



JTAG
Figure 3
Supported debug protocols
2.2.1
Pinout of debug connectors
The pinout of both debug connectors and to which pins of the XMC™ the debugger must be connected can be
found in Table 2 and Table 3.
Table 2
Pinout of the 10-pin Cortex™ debug connector
Pin
Function
XMC1000 Connection (Pin name)
XMC4000 Connection (Pin name)
1
VCC
Power Supply 2.5 V – 5.5 V (VDD)
Power Supply VDDP 3.3 V (VDDP)
2
SWIO/TMS
Serial Wire Data (P0.14 | P1.3)
Serial Wire Data, JTAG-TMS (TMS)
3
GND
Ground (VSS)
Ground (VSS)
4
SWCLK/TCK
Serial Wire Clock (P0.15 | P1.2)
Serial Wire Clock, JTAG-TCK (TCK)
5
GND
Ground (VSS)
Ground (VSS)
6
SWO/TDO
Not connected
Serial Wire Output, JTAG-TDO (P2.1) (optional)
7
KEY
Not connected
Not connected
8
TDI
Not connected
JTAG-TDI (P0.7)(optional)
9
GNDDetect
Can be used to switch off an on-board debug probe (PORST# of OBD) (optional)
10
RESET#
Not connected
Table 3
PORST# (mandatory)
Pinout of the 8-pin XMC™ MCU debug connector
Pin
Function
XMC1000 Connection (Pin name)
1
SC
Serial Wire Clock (P0.15 | P1.2)
2
SD
Serial Wire Data (P0.14 | P1.3)
User's Manual
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XMC™ Link
Based on SEGGER J-Link Technology
Table of contents
Pin
Function
XMC1000 Connection (Pin name)
3
+
Power supply 2.5 V – 5.5 V (VDD)
4
0
Ground (VSS)
5
0
Ground (VSS)
6
+
Power supply 2.5 V – 5.5 V (VDD)
7
TX (PC-TX))
Transmissstion line of PC/laptop, receive line of XMC™ device (optional)
8
RX (PC-RX)
Receive line of PC/laptop, transmission line of of XMC™ device (optional)
2.3
Power supply
XMC™ Link is powered from the Micro USB plug and typically draws about 70 mA. The on-board voltage
regulator IFX54441LDV33 generates the required 3.3 V for the XMC4200 microcontroller out of the 5 V USB
voltage. The debug probe is not designed to provide power for the target device.
The target application must power the isolated part of the debugger. The isolated side the XMC™ Link draws a
few mA of current from the target application.
2.4
Virtual COM Port (UART-to-USB Bridge)
The 8-pin XMC™ MCU Debug Connector supports communication between a PC/laptop and target XMC™ device
via Virtual COM Port (UART-to-USB Bridge). Therefore UART pins of the target XMC™ device needs to be
connected to TX/RX pins of the debug connector (see Table 3).
Note:
User's Manual
Take care of the UART cross connection: TX pin of debugger needs to be connected to RX pin of the
XMC device. RX pin of debugger needs to be connected to TX pin of the XMC device.
6
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XMC™ Link
Based on SEGGER J-Link Technology
Table of contents
3
Production data
This chapter covers schematics, board dimensions, component placement and the list of material.
3.1
Schematics
Figure 4 shows the schematics of XMC™ Link V1 in hardware version 1.1.
3.1.1
Differences in hardware versions
In hardware version 1.1 compared to hardware version v1.0 (V1) the pull-down resistor R20 was added to the TX
line. The version number is printed on the bottom side of the PCB below the USB connector.
User's Manual
7
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E
D
C
B
1
RESET#
DEBUG_LED#
COM_LED#
SWV
U1C1
DX0D-P0.0
SWD_DIR
SWD_OUT
TDI
SWD_IN
8
2
3
4
5
6
7
1
GNDISO
8
2
3
4
5
6
7
1
GNDISO
VISO3.3
RESET#
SWCLK/TCK
TX
SWO/TDO
RX
VISO3.3
GND2
B1
B2
B3
B4
B5
EN2
VDD2
GND2
B1
B2
B3
B4
B5
EN2
VDD2
2
SI8652BB-B-IS1
GND1
A1
A2
A3
A4
A5
EN1
VDD1
U6
SI8652BB-B-IS1
GND1
A1
A2
A3
A4
A5
EN1
VDD1
U3
GNDISO GNDISO
VISO3.3
Q1
12MHZ/S/3.2X2.5
CONTROL
GPIOs
RESET#
GPIO-P0.3
DEBUG_LED# GPIO-P0.2
AUX_LED#
GPIO-P0.1
UART2
U1C0
RXD
DX0A-P0.4
TXD
DOUT0-P0.5
TX_ENABLE GPIO-P0.7
TX_ACTIVE# GPIO-P0.6
C5 15pF/0402
RX
TX
UART
RXD
C6 15pF/0402
TDI
SWO/TDO
U0C1
DX2A-P2.3
DX1A-P2.4
DOUT0-P2.5
DX0A-P2.2
100k/0402
SPI Slave
CS_IN
CLK_IN
MISO
MOSI
R9
9
15
14
13
12
11
10
16
9
15
14
13
12
11
10
16
R4
C4
OBD_OFF#
OBD_TCK
OBD_TMS
GND
R16
GND
R19
R12
R13
R15
R14
100R/0402
100R/0402
100R/0402
100R/0402
RESET#*
SWCLK/TCK*
PC_TX*
SWO/TDO*
PC_RX*
3
Analog
Digital
Supply
HIB_IO_0
VBAT
P14.9
P14.8
P14.7
P14.6
P14.5
P14.4
P14.3
P14.0
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
P0.8
P0.7
P0.6
P0.5
P0.4
P0.3
P0.2
P0.1
P0.0
VDDC1
VDDC
VDDP2
VDDP1
VDDP
USB_DUSB USB_D+
Hibernate/RTC
XMC4200_QFN48
VSS
EPAD
PORST#
TCK
TMS
XTAL1
XTAL2
RTC_XTAL_1
RTC_XTAL_2
VAREF
VAGND
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0
U2
SWD_DIR*
SWD_OUT*
100R/0402
TDI*
ISO_SWIO/TMS*
no ass./0R/0603
GNDISO
no ass.
1
2
3
4
5
X4
27
EPAD
32
34
33
29
30
8
9
18
17
GNDISO
510R/0402
GNDISO
100nF/0402
VISO3.3
21
22
23
24
25
26
4
GND
2
RESET#*
5
31
6
41
28
5
3
4
7
10
19
20
11
12
13
14
15
16
35
36
37
38
39
40
42
43
44
45
46
47
48
1
2
Y
NL17SZ07DF
A
GND
GNDISO
VCC
U5
R3
R5
22R/0402
22R/0402
GNDISO
4
3
5
GNDISO
GNDISO
SWCLK/TCK
CS
SWD_OUT
SWD_IN
SWD_DIR
TX
RX
RESET#
DEBUG_LED#
COM_LED#
SWO/TDO
COM LED
Level Shifter
No RESET Pin
UART
SPD
SWV
JTAG
Configure Debugger RESET# signal at P0.3 as open-drain output.
TDI
SWCLK/TCK
CS
SWO/TDO
VISO3.3
U0C0
GPIO-P1.3
DX0B-P1.4
DOUT0-P1.5
SCLKOUT-P1.1
SELO0-P1.0
C8 100nF/0402
SPI Master
SWD DIR
MISO
MOSI
CLK_OUT
CS_OUT
C9 100nF/0402
A
C23
C24
C13 4u7F/6.3V/0603
SWD_DIR
SWD_IN
SWD_OUT
SWCLK/TCK
C17
C21
VDDP
VDDP
C11 100nF/0402
4
C10 100nF/0402
R20
ON-BOARD DEBUGGER (OBD) and ISO IF
C18
C22
GND
10k/0402
R21
VISO3.3
1
ISO_SWIO/TMS*
5
3
4
GND
C7
100nF/0402
100nF/0402
C16
VDDP
SWIO/TMS*
100R/0402
R18
5
6
OUT
BYP
EXP
SENSE/ADJ
7
7
VDDP
ADJ_3
2
SWIO/TMS*
4 SWCLK/TCK*
6
SWO/TDO*
8
TDI*
10 RESET#_OD
8
6
4
2
X2
7
5
3
1
PC_TX*
SWCLK/TCK*
Cortex Debug
FTS-105-01-L-DV
1
3
5
7
9
GNDISO
VDDP
Sheet: 1/1
8
02.12.2015 12:23:57
XMC-Link-V1.1
XMC BootKit
TSM-104-01-F-DH-A
SWIO/TMS*
PC_RX*
VDDP
C1
8
VISO3.3
10nF/0402
X1
GNDISO
5
EXP
4
1*2
Debug Connectors
ADJ_2
IFX54441LDV33
GND
EN
IN
U1
ADJ_1
6
7
9*2
GNDISO
C2
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Legal Disclaimer
RESET#_OD
100R/0402
R17
VCC
GND
Y
U4
GNDISOGNDISO
1
2
3
4
5
Power 3,3V
6
X3C
L1
BLM18PG600
74LVC1G126GW
A
OE
GNDISO
SWD_OUT* 2
SWD_DIR*
C15 10uF/10V/0603
3
100nF/0402
C19
100nF/0402
C25
3 D1
10k/0402
R1
VISO5
R6
R7
2
D2
LED1 680R/0603
LED-GN/D/0603
R2
4k7/0402
10k/0402
LED2 680R/0603
LED-RT/D/0603
V2
ESD8V0L2B-03L 1
VISO5
10uF/10V/0603
2
10uF/10V/0603
10uF/10V/0603
100nF/0402
10uF/10V/0603
100nF/0402
10uF/10V/0603
C20
VDDP
100nF/0402
R8
VDDP
VISO3.3
C14 10uF/10V/0603
100k/0402
1M/0402
R11 VDDP
ZX62-AB-5PA
100k/0402
GND
C12 100nF/0402
VDDP
R10
GND
8
GND
C3
User's Manual
10uF/10V/0603
Figure 4
GND
1
E
D
C
B
A
XMC™ Link
Based on SEGGER J-Link Technology
Table of contents
Schematic of the XMC™ Link V1 (Hardware Version 1.1)
R1.0
2015-12-11
XMC™ Link
Based on SEGGER J-Link Technology
Table of contents
3.2
Components placement and geometry
Figure 5 shows the board dimensions and the placement of components on the PCB.
60mm
U5
C19
C18
R15
X1
R19
R6
C24
R9
R18
C25
LED1
R16
U6
R11
C21
U4
Q1
R1
C14
R2
R14
C16
C6
C4
C13
R4
C11
U2
C10
C8
X2
C9
C5
L1
R3
LED2
R17
C12
R5
V2
X3
R20
C15
R10
R13
U3
R21
R7
30mm
R12
C1
C22
C7
R8
U1
C2
C23
C3
ADJ_1
C20
C17
ADJ_2
ADJ_3
X4
Figure 5
Components placement and geometry
3.3
List of material
The list of material is valid for the XMC™ Link V1 in hardware version 1.1.
Table 4
List of material
Value
Device
Qty Reference Designator
15pF 50V 10% 0402
Capacitor COG
2
C5, C6
8
C2, C3, C14, C15, C19, C23, C24,
C25
10uF 10V 20% 0603
Capacitor X5R
100nF 16V 10% 0402
Capacitor X7R
13
C4, C7, C8, C9, C10, C11, C12,
C16, C17, C18, C20, C21, C22
10nF 16V 10% 0402
Capacitor X7R
1
C1
4u7F 6.3V +-10% 0603
Capacitor X7R
1
C13
ZX62-AB-5PA
Connector Micro USB AB SMD Hirose
1
X3
12MHz 3.2x2.5
Crystal 12MHz 4Pad NX3225SA NDK
1
Q1
ESD8V0L2B-03L TSLP-3-1
Diode Protection Infineon
1
V2
BLM18PG600SN1D 0603
Ferrite Bead 60R 500mA Murata
1
L1
SI8652BB-B-IS1 NB-SOIC-16
Isolation IC
2
U3, U6
LSQ971-Z LED-GN 0603
LED SMD gn
1
LED1
LSQ976-Z LED-RT 0603
LED SMD rt
1
LED2
74LVC1G126GW TSSOP5
Line Driver
1
U4
User's Manual
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XMC™ Link
Based on SEGGER J-Link Technology
Table of contents
Value
Device
Qty Reference Designator
SN74LVC1G07 SC70-5
Line Driver
1
U5
XMC4200-Q48K256 QFN48
Microcontroller XMC4200 Infineon
1
U2
FTS-105-01-L-DV 2x5pin
0.05"
Pin Header SMD Samtec
1
TSM-104-01-F-DH-A 2x4pin
0.1"
Pin Header SMD Samtec
1
no ass. 1x5pin 0.1"
Pin Header THT
1
X4
100R 1% 0402
Resistor
7
R12, R13, R14, R15, R16, R17, R18
100k 1% 0402
Resistor
3
R9, R10, R11
10k 1% 0402
Resistor
3
R7, R20, R21
1M 1% 0603
Resistor
1
R8
22R 1% 0402
Resistor
2
R3, R5
4k7 1% 0402
Resistor
1
R6
510R 1% 0402
Resistor
1
R4
680R 1% 0603
Resistor
2
R1, R2
no ass. 0R 0603
Resistor
1
R19
IFX54441LDV33 PG-TSON-10
Voltage Regulator 3.3 V Infineon
1
U1
User's Manual
X1
X2
10
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XMC™ Link
Based on SEGGER J-Link Technology
Revision history
Revision history
Major changes since the last revision
Page or reference
User's Manual
Description of change
11
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Trademarks of Infineon Technologies AG
µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™, CoolSiC™,
DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™,
HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OPTIGA™,
OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID FLASH™,
SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™
Trademarks updated November 2015
Other Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2015-12-11
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2016 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about this
document?
Email: [email protected]
Document reference
UG_201512_PL30_004
IMPORTANT NOTICE
The information contained in this application note
is given as a hint for the implementation of the
product only and shall in no event be regarded as a
description or warranty of a certain functionality,
condition or quality of the product. Before
implementation of the product, the recipient of this
application note must verify any function and other
technical information given herein in the real
application.
Infineon
Technologies
hereby
disclaims any and all warranties and liabilities of
any kind (including without limitation warranties of
non-infringement of intellectual property rights of
any third party) with respect to any and all
information given in this application note.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
For further information on the product, technology,
delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(www.infineon.com).
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
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