AN5064, Schematic Guidelines for the MC34VR500 - Application Note

Freescale Semiconductor
Application Note
Document Number: AN5064
Rev. 2.0, 6/2015
Schematic Guidelines for the MC34VR500
1
Introduction
This application note provides schematic guidelines for using
MC34VR500. For an example Bill of Materials, refer to the
MC34VR500 Data Sheet.
Freescale analog ICs are manufactured using the
SMARTMOS process, a combinational BiCMOS
manufacturing flow that integrates precision analog, power
functions and dense CMOS logic together on a single
cost-effective die.
2
Pin Connection Guidelines
This section provides recommended pin connections in
Table 1. These guidelines help ensure that the MC34VR500
functions properly.
© Freescale Semiconductor, Inc., 2015. All rights reserved.

Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . 1
2 Pin Connection Guidelines . . . . . . . . . . . 1
3 References . . . . . . . . . . . . . . . . . . . . . . . . 4
4 Revision History. . . . . . . . . . . . . . . . . . . . 5
Pin Connection Guidelines
Table 1. MC34VR500 Pin Connection Guidelines
Pin
1
Pin Name
INTB
2, 6, 16, 33, DNC
42, 44, 45, 46
Pin Function
Recommended Connection
Recommended
connection when
not used
Open drain interrupt signal
to processor
Pull-up via 68 k- 100 k to VBIAS or other Leave floating
rail at voltage less than or equal to VIN
Reserved
Leave floating
Leave floating
3
PORB
Open drain reset output to
processor
Pull-up via 68 k- 100 k to VBIAS or other Leave floating
rail at voltage less than or equal to VIN
4
STBY
Standby input signal from
processor
Connect to the processor
Connect to ground
5
ICTEST1
Reserved pin
Connect to ground
Connect to ground
PVIN1
Input to SW1 regulator
Connect to VIN and bypass with 0.1 F and Connect to VIN
4.7 F to ground
8, 9, 11
LX1
SW1 switching node
Connect to SW1 inductor
13
FB1
Output voltage feedback for Connect to SW1 output voltage rail near
SW1
load
Leave floating
14
SGND1
Reserved pin
Connect to ground. Keep away from high
current ground return paths.
N/A
15
SGND2
Reserved pin
Connect to ground. Keep away from high
current ground return paths.
N/A
17
VLDOIN1
Input supply for LDO1
Bypass with a 1.0 F decoupling capacitor
as close to the pin as possible
Connect to output of a
regulator with voltage
< 3.4 V
18
LD01
LD01 regulator output
Bypass with 4.7 F to ground
Leave floating
19
FB4
Output voltage feedback for Connect to SW4 output voltage rail near
SW4
load
20
PVIN4
Input to SW4 regulator
Connect to VIN and bypass with 0.1 F and Connect to VIN
4.7 F to ground
21
LX4
SW4 switching node
Connect to SW4 inductor
Leave floating
22
LX2
SW2 switching node
Connect to SW2 inductor
Leave floating
23
PVIN2
Input to SW2 regulator
24
PVIN2
Input to SW2 regulator
Connect to VIN and bypass with 0.1 F and Connect to VIN
4.7 F to ground. Connect pins 23 and 24
Connect to pin 23
together.
25
FB2
Output voltage feedback for Connect to SW2 output voltage rail near
SW2
load
26
LD02
LD02 regulator output
27
VLDOIN23 LDO2 and LDO3 regulators’ Bypass with 1.0 F capacitor to ground
input
28
LDO3
LDO3 regulator output
Bypass with 4.7 F to ground
Leave floating
29
VHALF
Half supply reference for
DDR
Bypass with 0.1 F to ground
Leave floating
30
REFIN
REFIN regulator input
Connect 0.1 F to VHALF pin. Ensure there Leave floating
is at least 1.0 F net capacitance from
REFIN to ground
7, 10, 12
Bypass with 2.2 F to ground
Leave floating
Leave floating
Leave floating
Leave floating
Connect to regulator
with output voltage
< 3.6 V
AN5064 Application Note Rev. 2.0 6/2015
2
Freescale Semiconductor
Pin Connection Guidelines
Table 1. MC34VR500 Pin Connection Guidelines (continued)
Pin
Pin Name
Pin Function
Recommended Connection
Recommended
connection when
not used
31
REFOUT
REFOUT regulator output
Bypass with 1.0 F to ground
Leave floating
32
SGND3
Reserved pin
Connect to ground. Keep away from high
current ground return paths.
N/A
34
PVIN3
Input to SW3 regulator
Connect to VIN and bypass with 0.1 F and Connect to VIN
4.7 F to ground
35
LX3
SW3 switching node
Connect to SW3 inductor
Leave floating
36
LX3
SW3 switching node
Connect to SW3 inductor
Leave floating
37
PVIN3
Input to SW3 regulator
Connect to VIN and bypass with 0.1 F and Connect to VIN
4.7 F to ground
38
FB3
Output voltage feedback for Connect to SW3 output voltage rail near
SW3 regulator
load
39
LDO4
LDO4 regulator output
40
VLDOIN45 LDO4 and LDO5 regulator
inputs
41
LDO5
43
VBIAS
47
ICTEST2
48
Leave floating
Bypass with 2.2 F to ground
Leave floating
Bypass with 1.0 F capacitor to ground
Connect to regulator
with output voltage
< 4.5 V
LDO5 regulator output
Bypass with 2.2 F to ground
Leave floating
Reserved pin
Bypass with 0.47 F to ground
Bypass with 0.47 F to
ground
Reserved pin
Connect to ground
Connect to ground
SGND4
Ground reference for the
main band gap regulator
Connect to ground. Keep away from high
current ground return paths.
N/A
49
VCC
Analog Core supply
Bypass with 1.0 F to ground
N/A
50
VIN
Main chip supply
Bypass with 1.0 F to ground
N/A
51
VDIG
Digital Core supply
Bypass with 1.0 F to ground
N/A
52
VBG
Main band gap reference
Bypass with 0.22 F to ground
N/A
53
SDA
I2C data line
Pull-up to VDDIO
Leave floating
54
SCL
I2C clock line
Pull-up to VDDIO
Leave floating
55
VCCI2C
Supply for I2C bus
Connect to 1.7 to 3.6 V supply. Bypass with Leave floating
0.1 F to ground. Ensure that VDDIO is
always lesser than or equal to VIN.
56
EN
Power On/off from
processor
Connect to the processor. Pull up via 8 k- N/A
100 k to VBIAS if required
-
EP
Expose pad. Functions as
ground return for buck
regulator
Ground. Connect this pad to the inner and N/A
external ground planes through multiple vias
(at least 16 Solid Thermal Via) to allow
effective thermal dissipation.
AN5064 Application Note Rev. 2.0 6/2015
Freescale Semiconductor
3
References
3
References
Document Number
and Description
URL
MC34VR500
Data Sheet
http://www.freescale.com/files/analog/doc/data_sheet/MC34VR500.pdf
AN1902
QFN (Quad Flat
Pack No-Lead)
Application Note
http://www.freescale.com/files/analog/doc/app_note/AN1902.pdf
Freescale.com Support Pages
URL
MC34VR500
Product Summary Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MC34VR500
Power Management Home Page
http://www.freescale.com/webapp/sps/site/homepage.jsp?code=POWERMGTHOME
Analog Home Page
http://www.freescale.com/analog
AN5064 Application Note Rev. 2.0 6/2015
4
Freescale Semiconductor
Revision History
4
Revision History
Revision
Date
Description of Changes
1.0
1/2015
• Initial release
2.0
6/2015
• AN4530 is replaced by AN1902
AN5064 Application Note Rev. 2.0 6/2015
Freescale Semiconductor
5
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© 2015 Freescale Semiconductor, Inc.
Document Number: AN5064
Rev. 2.0
6/2015
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