APR34309CA

APR34309CA
SECONDARY SIDE SYNCHRONOUS RECTIFICATION SWITCHER
Description
Pin Assignments
APR34309CA is a secondary side Combo IC, which combines an NChannel MOSFET and a driver circuit designed for synchronous
rectification (SR) in DCM operation. It also integrates output voltage
detect function for primary side control system.
(Top View)
DRISR
1
8
GND
VDET
2
7
GND
AREF
3
6
GND
VCC
4
5
DRAIN
NEW PRODUCT
The N-Channel MOSFET has been optimized for low gate charge,
low RDS(ON), fast switching speed and body diode reverse recovery
performance.
The synchronous rectification can effectively reduce the secondary
side rectifier power dissipation and provide high performance solution.
By sensing MOSFET drain-to-source voltage, APR34309CA can
output ideal drive signal with less external components. It can provide
high performance solution for 5V output voltage application.
Same as AP4341, APR34309CA detects the output voltage and
provides a periodical signal when the output voltage is lower than a
certain threshold. By fast response to secondary side voltage,
APR34309CA can effectively improve the transient performance of
primary side control system.
SO-8EP
Applications
The APR34309CA is available in SO-8EP package.
•
Features
• Synchronous Rectification for DCM Operation Flyback
• Eliminate Resonant Ring Interference
• Fast Detector of Supply Voltages
• Fewest External Components


Note: The DRAIN pin of internal MOSFET is exposed PAD, which is at the bottom
of IC (the dashed box). The secondary current should flow from GND(pin 6,7,8) to
this exposed PAD.
•
Adapters/Chargers for Cell/Cordless Phones, ADSL Modems, MP3
and Other Portable Apparatus
Standby and Auxiliary Power Supplies
Totally Lead-free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
Typical Applications Circuit
C21
+
C23
C22
+
R21
APR34309CA
R23
CAREF
DRAIN DRAIN GND
DRISR
GND
VDET
GND
AREF
VCC
R24
C24
RAREF
APR34309CA
Document number: DS37672 Rev. 5 - 2
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APR34309CA
NEW PRODUCT
Pin Descriptions
Pin Number
Pin Name
Function
1
DRISR
Synchronous rectification MOSFET drive.
2
VDET
Synchronous rectification sense input and dynamic function output, connected to DRAIN
through a resistor.
3
AREF
Program a voltage reference with a resistor from AREF to GND, to enable synchronous
rectification MOSFET drive signal.
4
VCC
Power supply, connected with system output.
5
DRAIN
6,7,8
GND
Exposed PAD
DRAIN
Drain pin of internal MOSFET. The Drain voltage signal can obtain from this pin.
Source pin of internal MOSFET, connected to Ground.
Drain pin of internal MOSFET. The secondary current should flow from GND (pin 6.7.8)
to this DRAIN pad.
Functional Block Diagram
VCC
4
VREF
VDET
Integrator
(VDET-VCC)*tONP
IOVP
Dynamic
OVP
IAREF
tONPDET
AREF
DRISR
Counter
3
OSC
1
SRDRIVER
6,7,8
DRAIN
GND
5, EP
2
VDET
APR34309CA
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APR34309CA
Absolute Maximum Ratings (Note 4)
Symbol
NEW PRODUCT
VCC
Notes:
Parameter
Supply Voltage
Value
Unit
-0.3 to 7.5
V
VDET, VDRAIN
Voltage at VDET, DRAIN Pin
-2 to 50
V
VAREF, VDRISR
Voltage at AREF, DRISR Pin
-0.3 to 6
V
ID
Continuous Drain Current
20
A
IDM
Pulsed Drain Current
80
A
PD
Power Dissipation at TA=+25ºC
2.2
W
θJA
Thermal Resistance (Junction to Ambient)
(Note 5)
56
ºC/W
θJC
Thermal Resistance (Junction to Case)
(Note 5)
12
ºC/W
TJ
Operating Junction Temperature
+150
ºC
-65 to +150
ºC
TSTG
Storage Temperature
TLEAD
Lead Temperature (Soldering, 10 sec)
+300
ºC
ESD
Charge Device Model
1000
V
4. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not implied.
Exposure to “Absolute Maximum Ratings” for extended periods may affect device reliability.
5. FR-4 substrate PC board, 2oz copper, with 1 inch2 pad layout.
Recommended Operating Conditions
Symbol
Parameter
Min
Max
Unit
VCC
Supply Voltage
3.3
6
V
TA
Ambient Temperature
-40
+85
ºC
APR34309CA
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APR34309CA
Electrical Characteristics
Symbol
(@TA = +25°C, VCC=5V, unless otherwise specified.)
Parameter
Conditions
Min
Typ
Max
Unit
Supply Voltage ( VCC Pin )
ISTARTUP
IOP
VSTARTUP
NEW PRODUCT
–
Startup Current
VCC=VSTARTUP-0.1V
–
100
150
μA
Operating Current
VDET pin floating
VCC=VTRIGGER+20mV
40
100
150
μA
Startup Voltage
–
2.6
3.1
3.4
V
UVLO
–
2.3
2.8
3.1
V
Internal Trigger Voltage
–
5.1
5.15
5.2
V
Duty Cycle
–
4
15
18
%
Oscillation Period
VCC=5V
18
30
37.5
μs
Internal Trigger Current
VCC=VTRIGGER, VCC/VDET pin is
separately connected to a 20Ω
resistor
30
60
80
mA
Dynamic Output Section/Oscillator Section
VTRIGGER
–
tOSC
ITRIGGER
tDIS
Minimum Period
–
18
30
37.5
ms
VDIS
Discharge Voltage
–
5.13
5.3
5.38
V
IDIS
Discharge Current
VCC=VDIS+0.1V
1.5
3
4.5
mA
Trigger Discharger Gap
–
30
110
–
mV
Overshoot Voltage for Discharge
–
5.64
5.74
5.84
V
Overshoot Current for Discharge
VCC=VOVP+0.1V, VCC pin is
connected to a 20Ω resistor
40
–
100
mA
1
V
VDIS-VTRIGGER
VOVP
IOVP
Synchronous Voltage Detect
VTHON
Gate Turn-on Threshold
–
0
–
VTHOFF
Gate Turn-off Threshold
–
-17
-10
-3
mV
tDON
Turn-on Delay Time
From VTHON to VDRISR=1V
–
70
130
ns
tDOFF
Turn-off Propagation Delay Time
From VTHOFF to VDRISR=3V
–
100
150
ns
tRG
Gate Turn-on Rising Time
From 1V to 3V, CL=4.7nF
–
50
100
ns
tFG
Gate Turn-off Falling Time
From 3V to 1V, CL=4.7nF
–
50
100
ns
(VDET-VCC)*tONP = 25Vµs
0.9
1.8
2.7
(VDET-VCC)*tONP = 50Vµs
–
–
6.5
3.7
–
–
V
tLEB_S
Minimum On Time
tLEB_L
VDRISR_HIGH
VS_MIN
tOVP_LAST
Kqs
Notes:
μs
Drive Output Voltage
VCC=5V
SR Minimum Operating Voltage
(Note 6)
–
–
–
4.5
V
Added OVP Discharge Time
–
–
2.0
–
ms
(Note 7)
(VDET-VCC)*tONP = 25Vµs
0.325
–
0.515
mA*μs
6. This item specifies the minimum SR operating voltage of VIN_DC, VIN_DC≥NPS*VS_MIN.
7. This item is used to specify the value of RAREF.
APR34309CA
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APR34309CA
Electrical Characteristics
(@TA =+25°C, unless otherwise specified. Cont.)
MOSFET Static Characteristics
NEW PRODUCT
Parameters
Symbol
Conditions
Min
Typ
Max
Unit
Drain to Source Breakdown
Voltage
VDSS(BR)
VGS=0V, ID=0.25mA
50
–
100
V
Gate Threshold Voltage
VGS(TH)
VDS=VGS, ID=0.25mA
0.7
1.3
2
V
Zero Gate Voltage Drain
Current
IDSS
VDS=50V, VGS=0V
–
–
1
µA
Gate to Source Leakage
Current
IGSS
VGS=10V, VDS=0V
–
–
±100
nA
Drain to Source On-state
Resistance
RDS(ON)
VGS=4.5V, ID=3A
–
8
–
mΩ
Min
Typ
Max
Unit
–
4149
–
–
206
–
–
159
–
–
10.3
–
–
8.4
–
MOSFET Dynamic Characteristics
Parameters
Symbol
Conditions
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Gate to Source Charge
Qgs
Gate to Drain Charge (Miller
Charger)
Qgd
Total Gate Charge
Qg
VGS=4.5V
–
39
–
Gate Resistance
Rg
–
–
1.8
–
APR34309CA
Document number: DS37672 Rev. 5 - 2
VGS=0V, VDS=25V, f=1MHz
VGS=0V to 10V, VDD=25V,
ID=15A
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pF
nC
Ω
July 2015
© Diodes Incorporated
APR34309CA
Output Voltage Detect Function Description
tOSC
tDIS
tDIS
tDIS
tDIS
tDIS
tDIS
tOSC
VDET
VOVP
VDIS
VDIS
NEW PRODUCT
VTRIGGER
VCC
VTRIGGER
VON
UVLO
IOVP
IVCC
VOFF
tOVP_LAST
IDIS
Figure 1. Typical Waveforms of APR34309CA
When VCC is beyond power-on voltage (VON), the APR34309CA starts up. The VDET pin asserts a periodical pulse and the oscillation period is
tOSC. When VCC is beyond the trigger voltage (VTRIGGER), the periodical pulse at VDET pin is discontinued. When VCC is beyond the discharge
voltage (VDIS), the discharge circuit will be enabled, and a 3mA current (IDIS) will flow into VCC pin. When VCC is higher than the overshoot voltage
(VOVP), the APR34309CA will enable a discharge circuit, the discharge current (IOVP) will last tOVP_LAST time. After the tOVP_LAST time, APR34309CA
will stop the discharge current and detect VCC voltage again. If VCC is still higher than VOVP, the tOVP_LAST time discharge current will be enabled
again. Once the OVP discharge current is asserted, the periodical pulse at VDET pin will be disabled.
When the VCC falls below the power-off voltage (VOFF), the APR34309CA will shut down.
Operation Description
MOSFET Driver
The operation of the SR is described with timing diagram shown in Figure 2. APR34309CA monitors the MOSFET drain-source voltage. When the
drain voltage is lower than the turn-on threshold voltage VTHON, the IC outputs a positive drive voltage after a turn-on delay time (tDON). The
MOSFET will turn on and the current will transfer from the body diode into the MOSFET’s channel.
In the process of drain current decreasing linearly toward zero, the drain-source voltage rises synchronically. When it rises over the turn off
threshold voltage VTHOFF, APR34309CA pulls the drive signal down after a turn-off delay (tDOFF).
I,V
VDET
IS
VTHON
0
t
VTHOFF
VDRISR
0.9VDRISR
0.9VDRISR
0.1VDRISR
0
tDON
tRG
tDOFF
0.1VDRISR
t
t
FG
Figure 2. Typical Waveforms of APR34309CA
APR34309CA
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APR34309CA
Operation Description (Cont.)
Minimum On Time
When the controlled MOSFET gate is turned on, some ringing noise is generated. The minimum on-time timer blanks the VTHOFF comparator,
keeping the controlled MOSFET on for at least the minimum on time. If V THOFF falls below the threshold before minimum on time expires, the
MOSFET will keep on until the end of the minimum on time.
The minimum on time is in direct proportion to the (VDET-VCC)*tONP. When (VDET-VCC)*tONP=5V*5μs, the minimum on time is about 1.8μs.
NEW PRODUCT
The Value and Meaning of AREF Resistor
As to DCM operation Flyback converter, after secondary rectifier stops conduction the primary MOSFET Drain-to-source ringing waveform is
resulted from the resonant of primary inductance and equivalent switch device output capacitance. This ringing waveform probably leads to
Synchronous Rectifier error conduction. To avoid this fault happening, APR34309CA has a special function design by means of volt-second
product detecting. From the sensed voltage of VDET pin to see, the volt-second product of voltage above VCC at primary switch on time is much
higher than the volt-second product of each cycle ringing voltage above V CC. Therefore, before every time Synchronous Rectifier turning on,
APR34309CA judges if the detected volt-second product of VDET voltage above VCC is higher than a threshold and then turn on synchronous
Rectifier. The purpose of AREF resistor is to determine the volt-second product threshold. APR34309CA has a parameter, Kqs, which converts
RAREF value to volt-second product,
Area2  R AREF * Kqs
In general, Area1 and Area3, the value of which should be test on system, depend on system design and are always fixed after system design
frozen. As to BCD PSR design, the Area1 value changes with primary peak current value and Area3 value generally keeps constant at all of
conditions. So the AREF resistor design should consider the worst case, the minimum primary peak current condition. Since of system design
parameter distribution, Area1 and Area3 have moderate tolerance. So Area2 should be designed between the middle of Area1 and Area3 to keep
enough design margin.
Area3  R AREF * Kqs  Area1
Area1=(VDET-VCC)*tONP
Area3
VDET
VCC
Area2=Kqs*RAREF
Figure 3. AREF Function
SR Minimum Operating Voltage
APR34309CA sets a minimum SR operating voltage by comparing the difference between V DET and output voltage (VCC). The value of VDET–VCC
must be higher than its internal reference, then APR34309CA will begin to integrate the area of (VDET–VCC)*tONP. If not, the area integrating will not
begin and the SR driver will be disabled.
SR Turning Off Timing Impact on PSR CV Sampling
As to synchronous rectification on Flyback power system, SR MOSFET need to turn off in advance of secondary side current decreasing to zero to
avoid current flowing reversely. When SR turns off in advance, the secondary current will flow through the body diode. The SR turning off time is
determined by the VTHOFF at a fixed system. When VTHOFF is more close to zero, the SR turning on time gets longer and body diode conduction time
gets shorter. Since of the different voltage drop between SR MOSFET and body diode, the PSR feedback signal VFB appears a voltage jump at the
time of SR MOSFET turning off. If the PSR CV sampling time tSAMPLE is close to even behind this voltage jump time, there will be system unstable
operation issue or the lower output voltage issue.
APR34309CA
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APR34309CA
Operation Description (Cont.)
To ensure stable operating of system, it must be met:
tBODYDIODE<tONS*(1- tSAMPLE)
tSAMPLE
SR Turnoff,
Bodydiode operating
SR Operating
NEW PRODUCT
tBODYDIODE
VFB
tONS
Figure 4. SR Turning Off Timing Impact on PSR CV Sampling
Recommended Application Circuit Parameters
The two resistors R23 and R24 are used to pass ESD test. The value of R23 and R24 should be over 20Ω and below 47Ω respectively because of
the undershoot performance. The package of R23 and R24 should be at least 0805 and there isn’t any trace under these two resistors.
CAREF is suggested to parallel with AREF resistor to keep the volt-second product threshold stable. And the recommended value of CAREF is 100nF.
The recommended value of C24 is 100nF.
Ordering Information
APR34309CA XX XX - XX
Product Name
Package
Temperature Range
SO-8EP
-40 to +85C
APR34309CA
Document number: DS37672 Rev. 5 - 2
Package
Packing
RoHS/Green
MP: SO-8EP
TR : Tape & Reel
G1 : Green
Part Number
APR34309CAMPTR-G1
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Marking ID
34309CAMP-G1
Packing
4000/Tape & Reel
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APR34309CA
Marking Information
First and Second Lines: Logo and Marking ID
Third Line: Date Code
Y: Year
WW: Work Week of Molding
A: Assembly House Code
th
th
XX: 7 and 8 Digits of Batch No.
34309C
AMP-G1
YWWAXX
-
Package Outline Dimensions (All dimensions in mm(inch).)
(1)
Package Type: SO-8EP
3.800(0.150)
4.000(0.157)
2.110(0.083)
2.710(0.107)
2.750(0.108)
3.402(0.134)
NEW PRODUCT
(Top View)
1.270(0.050)
TYP
4.700(0.185)
5.100(0.201)
0.300(0.012)
0.510(0.020)
5.800(0.228)
6.200(0.244)
0.050(0.002)
0.150(0.006)
1.350(0.053)
1.550(0.061)
0°
8°
0.400(0.016)
1.270(0.050)
0.150(0.006)
0.250(0.010)
Note: Eject hole, oriented hole and mold mark is optional.
APR34309CA
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APR34309CA
Suggested Pad Layout
Package Type: SO-8EP
NEW PRODUCT
(1)
Y1
G
Z
X1
Y
E
X
Dimensions
Z
(mm)/(inch)
G
(mm)/(inch)
X
(mm)/(inch)
Y
(mm)/(inch)
X1
(mm)/(inch)
Y1
(mm)/(inch)
E
(mm)/(inch)
Value
6.900/0.272
3.900/0.154
0.650/0.026
1.500/0.059
3.600/0.142
2.700/0.106
1.270/0.050
APR34309CA
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APR34309CA
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
NEW PRODUCT
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written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
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