ESD9X3.3ST5G D

ESD9X3.3ST5G Series,
SZESD9X3.3ST5G Series
Transient Voltage
Suppressors
Micro−Packaged Diodes for ESD Protection
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The ESD9X Series is designed to protect voltage sensitive
components from ESD. Excellent clamping capability, low leakage,
and fast response time provide best in class protection on designs that
are exposed to ESD. Because of its small size, it is suited for use in
cellular phones, MP3 players, digital cameras and many other portable
applications where board space is at a premium.
1
2
PIN 1. CATHODE
2. ANODE
Specification Features:
• Low Clamping Voltage
• Small Body Outline Dimensions:
•
•
•
•
•
•
•
•
MARKING
DIAGRAM
0.039″ x 0.024″ (1.0 mm x 0.60 mm)
Low Body Height: 0.017″ (0.43 mm) Max
Stand−off Voltage: 3.3 V − 12 V
Low Leakage
Response Time is Typically < 1 ns
ESD Rating of Class 3 (> 16 kV) per Human Body Model
IEC61000−4−2 Level 4 ESD Protection
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These are Pb−Free Devices
Mechanical Characteristics:
CASE: Void-free, transfer-molded, thermosetting plastic
Epoxy Meets UL 94 V−0
LEAD FINISH: 100% Matte Sn (Tin)
MOUNTING POSITION: Any
X
M
Device Meets MSL 1 Requirements
ORDERING INFORMATION
Device
Package
Shipping†
ESD9XxxST5G
SOD−923
(Pb−Free)
8000/Tape & Reel
SZESD9XxxST5G SOD−923
(Pb−Free)
8000/Tape & Reel
MAXIMUM RATINGS
Value
Unit
Contact
Air
±30
±30
kV
Per Human Body Model
Per Machine Model
16
400
kV
V
⎪
PD
150
mW
TJ, Tstg
−55 to
+150
°C
TL
260
°C
IEC 61000−4−2 (ESD)
ESD Voltage
Symbol
Total Power Dissipation on FR−5 Board
(Note 1) @ TA = 25°C
Junction and Storage Temperature Range
Lead Solder Temperature − Maximum
(10 Second Duration)
= Specific Device Code
= Date Code
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
QUALIFIED MAX REFLOW TEMPERATURE: 260°C
Rating
XM
SOD−923
CASE 514AA
DEVICE MARKING INFORMATION
See specific marking information in the device marking
column of the table on page 2 of this data sheet.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−5 = 1.0 x 0.75 x 0.62 in.
See Application Note AND8308/D for further description of survivability specs.
© Semiconductor Components Industries, LLC, 2012
October, 2012 − Rev. 7
1
Publication Order Number:
ESD9X3.3ST5G/D
ESD9X3.3ST5G Series, SZESD9X3.3ST5G Series
ELECTRICAL CHARACTERISTICS
I
(TA = 25°C unless otherwise noted)
Symbol
IF
Parameter
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IR
Working Peak Reverse Voltage
VBR
Test Current
IF
Forward Current
VF
Forward Voltage @ IF
Ppk
Peak Power Dissipation
V
IR VF
IT
Breakdown Voltage @ IT
IT
C
VC VBR VRWM
Maximum Reverse Leakage Current @ VRWM
IPP
Max. Capacitance @VR = 0 and f = 1 MHz
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
Uni−Directional TVS
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, VF = 1.1 V Max. @ IF = 10 mA for all types)
VRWM
(V)
IR (mA)
@ VRWM
VBR (V)
@ IT
(Note 2)
IT
Max IPP (A)
(Note 3)
VC (V)
@ Max IPP
(Note 3)
Ppk (W)
(8 x 20 ms)
C
(pF)
VC
Max
Typ
Typ
Per IEC61000−4−2
(Note 4)
Device*
Device
Marking
Max
Max
Min
mA
ESD9X3.3ST5G
A
3.3
2.5
5.0
1.0
9.8
10.4
102
80
ESD9X5.0ST5G
B
5.0
1.0
6.2
1.0
8.7
12.3
107
65
ESD9X7.0ST5G
5**
7.0
0.1
7.5
1.0
4.0
25
100
65
ESD9X12ST5G
C
12
1.0
13.5
1.0
5.9
23.7
140
30
Figures 1 and 2
(Note 5)
* Include SZ-prefix devices where applicable.
**Rotated 270 degrees.
2. VBR is measured with a pulse test current IT at an ambient temperature of 25°C.
3. Surge current waveform per Figure 5.
4. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
5. ESD9X5.0ST5G shown below. Other voltages available upon request.
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV contact per IEC 61000−4−2
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV contact per IEC 61000−4−2
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2
ESD9X3.3ST5G Series, SZESD9X3.3ST5G Series
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
Ipeak
Level
Test
Voltage
(kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1
2
7.5
4
2
2
4
15
8
4
3
6
22.5
12
6
4
8
30
16
8
100%
90%
I @ 30 ns
I @ 60 ns
10%
tP = 0.7 ns to 1 ns
Figure 3. IEC61000−4−2 Spec
ESD Gun
Oscilloscope
TVS
50 W
Cable
50 W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
% OF PEAK PULSE CURRENT
100
PEAK VALUE IRSM @ 8 ms
tr
90
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
80
70
60
HALF VALUE IRSM/2 @ 20 ms
50
40
30
tP
20
10
0
0
20
40
t, TIME (ms)
60
Figure 5. 8 X 20 ms Pulse Waveform
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3
80
ESD9X3.3ST5G Series, SZESD9X3.3ST5G Series
7.4
20
7.3
18
7.2
16
7.1
14
7.0
IR (nA)
BREAKDOWN VOLTAGE (VOLTS) (VZ @ IZ)
TYPICAL CHARACTERISTICS
6.9
6.8
6.7
12
10
8
6.6
6
6.5
4
6.4
2
6.3
−55
0
−55
+ 150
+ 25
TEMPERATURE (°C)
Figure 6. Typical Breakdown Voltage
versus Temperature
+ 25
TEMPERATURE (°C)
Figure 7. Typical Leakage Current
versus Temperature
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4
+ 150
ESD9X3.3ST5G Series, SZESD9X3.3ST5G Series
PACKAGE DIMENSIONS
SOD−923
CASE 514AA
ISSUE E
D
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
−Y−
E
1
2X b
0.08 X Y
2
TOP VIEW
DIM
A
b
c
D
E
HE
L
L2
A
c
HE
SIDE VIEW
MILLIMETERS
MIN
NOM MAX
0.34
0.39
0.43
0.15
0.20
0.25
0.07
0.12
0.17
0.75
0.80
0.85
0.55
0.60
0.65
0.95
1.00
1.05
0.19 REF
0.05
0.10
0.15
INCHES
MIN
NOM MAX
0.013 0.015 0.017
0.006 0.008 0.010
0.003 0.005 0.007
0.030 0.031 0.033
0.022 0.024 0.026
0.037 0.039 0.041
0.007 REF
0.002 0.004 0.006
SOLDERING FOOTPRINT*
2X
L
2X
0.36
2X
L2
PACKAGE
OUTLINE
BOTTOM VIEW
1.20
2X
0.25
DIMENSIONS: MILLIMETERS
See Application Note AND8455/D for more mounting details
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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ESD9X3.3ST5G/D
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