1SMC5.0AT3 D

1SMC5.0AT3G Series,
SZ1SMC5.0AT3G Series
1500 Watt Peak Power
Zener Transient Voltage
Suppressors
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Unidirectional*
The SMC series is designed to protect voltage sensitive
components from high voltage, high energy transients. They have
excellent clamping capability, high surge capability, low zener
impedance and fast response time. The SMC series is supplied in
ON Semiconductor’s exclusive, cost-effective, highly reliable
SURMETIC  package and is ideally suited for use in
communication systems, automotive, numerical controls, process
controls, medical equipment, business machines, power supplies and
many other industrial/consumer applications.
PLASTIC SURFACE MOUNT
ZENER TRANSIENT
VOLTAGE SUPPRESSORS
5.0−78 VOLTS
1500 WATT PEAK POWER
SMC
CASE 403
PLASTIC
Features











Working Peak Reverse Voltage Range − 5.0 V to 78 V
Standard Zener Breakdown Voltage Range − 6.7 V to 91.25 V
Peak Power − 1500 W @ 1 ms
ESD Rating of Class 3 (> 16 KV) per Human Body Model
Maximum Clamp Voltage @ Peak Pulse Current
Low Leakage < 5 mA Above 10 V
UL 497B for Isolated Loop Circuit Protection
Maximum Temperature Coefficient Specified
Response Time is Typically < 1 ns
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
Pb−Free Packages are Available**
Mechanical Characteristics:
CASE: Void-free, transfer-molded, thermosetting plastic
FINISH: All external surfaces are corrosion resistant and leads are
readily solderable
Cathode
MARKING DIAGRAM
AYWW
Gxx G
G
A
Y
WW
Gxx
G
= Assembly Location
= Year
= Work Week
= Device Code (Refer to page 3)
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Package
Shipping†
1SMCxxxAT3G
SMC
(Pb−Free)
2,500 /
Tape & Reel
SZ1SMCxxxAT3G
SMC
(Pb−Free)
2,500 /
Tape & Reel
Device
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:
260C for 10 Seconds
LEADS: Modified L−Bend providing more contact area to bond pads
POLARITY: Cathode indicated by molded polarity notch
MOUNTING POSITION: Any
Anode
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*Bidirectional devices will not be available in this series.
DEVICE MARKING INFORMATION
**For additional information on our Pb−Free strategy and soldering details,
please download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
 Semiconductor Components Industries, LLC, 2012
February, 2012 − Rev. 8
1
See specific marking information in the device marking
column of the Electrical Characteristics table on page 3 of
this data sheet.
Publication Order Number:
1SMC5.0AT3/D
1SMC5.0AT3G Series, SZ1SMC5.0AT3G Series
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Peak Power Dissipation (Note 1) @ TL = 25C, Pulse Width = 1 ms
PPK
1500
W
DC Power Dissipation @ TL = 75C
Measured Zero Lead Length (Note 2)
Derate Above 75C
Thermal Resistance from Junction−to−Lead
PD
4.0
W
RqJL
54.6
18.3
mW/C
C/W
W
mW/C
C/W
DC Power Dissipation (Note 3) @ TA = 25C
Derate Above 25C
Thermal Resistance from Junction−to−Ambient
PD
RqJA
0.75
6.1
165
Forward Surge Current (Note 4) @ TA = 25C
IFSM
200
A
TJ, Tstg
−65 to +150
C
Operating and Storage Temperature Range
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. 10 x 1000 ms, non−repetitive.
2. 1 in square copper pad, FR−4 board.
3. FR−4 board, using ON Semiconductor minimum recommended footprint, as shown in 403 case outline dimensions spec.
4. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum.
ELECTRICAL CHARACTERISTICS (TA = 25C unless
I
otherwise noted, VF = 3.5 V Max @ IF = 100 A) (Note 5)
Symbol
Parameter
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IR
VBR
IF
VC VBR VRWM
Working Peak Reverse Voltage
Maximum Reverse Leakage Current @ VRWM
IR VF
IT
Breakdown Voltage @ IT
IT
Test Current
IF
Forward Current
VF
Forward Voltage @ IF
IPP
Uni−Directional TVS
5. 1/2 sine wave or equivalent, PW = 8.3 ms non−repetitive duty
cycle
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2
V
1SMC5.0AT3G Series, SZ1SMC5.0AT3G Series
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Device*
Device
Marking
VC @ IPP (Note 8)
Breakdown Voltage
VRWM
(Note 6)
IR @ VRWM
V
mA
VBR V (Note 7)
@ IT
VC
IPP
Min
Nom
Max
mA
V
A
1SMC5.0AT3G
1SMC6.0AT3G
1SMC6.5AT3G
GDE
GDG
GDK
5.0
6.0
6.5
1000
1000
500
6.4
6.67
7.22
6.7
7.02
7.6
7.0
7.37
7.98
10
10
10
9.2
10.3
11.2
163
145.6
133.9
1SMC7.5AT3G
1SMC8.0AT3G
1SMC9.0AT3G
GDP
GDR
GDV
7.5
8.0
9.0
100
50
10
8.33
8.89
10
8.77
9.36
10.55
9.21
9.83
11.1
1
1
1
12.9
13.6
15.4
116.3
110.3
97.4
1SMC10AT3G
1SMC12AT3G
1SMC13AT3G
GDX
GEE
GEG
10
12
13
5
5
5
11.1
13.3
14.4
11.7
14
15.15
12.3
14.7
15.9
1
1
1
17
19.9
21.5
88.2
75.3
69.7
1SMC14AT3G
1SMC15AT3G
1SMC16AT3G
1SMC17AT3G
GEK
GEM
GEP
GER
14
15
16
17
5
5
5
5
15.6
16.7
17.8
18.9
16.4
17.6
18.75
19.9
17.2
18.5
19.7
20.9
1
1
1
1
23.2
24.4
26
27.6
64.7
61.5
57.7
53.3
1SMC18AT3G
1SMC20AT3G
1SMC22AT3G
1SMC24AT3G
GET
GEV
GEX
GEZ
18
20
22
24
5
5
5
5
20
22.2
24.4
26.7
21.05
23.35
25.65
28.1
22.1
24.5
26.9
29.5
1
1
1
1
29.2
32.4
35.5
38.9
51.4
46.3
42.2
38.6
1SMC26AT3G
1SMC28AT3G
1SMC30AT3G
1SMC33AT3G
GFE
GFG
GFK
GFM
26
28
30
33
5
5
5
5
28.9
31.1
33.3
36.7
30.4
32.75
35.05
38.65
31.9
34.4
36.8
40.6
1
1
1
1
42.1
45.4
48.4
53.3
35.6
33
31
28.1
1SMC36AT3G
1SMC40AT3G
1SMC43AT3G
GFP
GFR
GFT
36
40
43
5
5
5
40
44.4
47.8
42.1
46.75
50.3
44.2
49.1
52.8
1
1
1
58.1
64.5
69.4
25.8
32.2
21.6
1SMC48AT3G
1SMC51AT3G
1SMC54AT3G
1SMC58AT3G
GFX
GFZ
GGE
GGG
48
51
54
58
5
5
5
5
53.3
56.7
60
64.4
56.1
59.7
63.15
67.8
58.9
62.7
66.3
71.2
1
1
1
1
77.4
82.4
87.1
93.6
19.4
18.2
17.2
16
1SMC60AT3G
1SMC64AT3G
1SMC70AT3G
1SMC75AT3G
1SMC78AT3G
GGK
GGM
GGP
GGR
GGT
60
64
70
75
78
5
5
5
5
5
66.7
71.1
77.8
83.3
86.7
70.2
74.85
81.9
87.7
91.25
73.7
78.6
86
92.1
95.8
1
1
1
1
1
96.8
103
113
121
126
15.5
14.6
13.3
12.4
11.4
6. A transient suppressor is normally selected according to the maximum working peak reverse voltage (VRWM), which should be equal to or
greater than the DC or continuous peak operating voltage level.
7. VBR measured at pulse test current IT at an ambient temperature of 25C.
8. Surge current waveform per Figure 2 and derate per Figure 3 of the General Data − 1500 Watt at the beginning of this group.
*Include SZ-prefix devices where applicable.
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1SMC5.0AT3G Series, SZ1SMC5.0AT3G Series
NONREPETITIVE
PULSE WAVEFORM
SHOWN IN FIGURE 2
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE PEAK
CURRENT DECAYS TO 50%
OF IPP.
tr 10 ms
100
PEAK VALUE - IPP
VALUE (%)
Ppk, PEAK POWER (kW)
100
10
HALF VALUE 50
IPP
2
tP
1
0.1 ms
1 ms
10 ms
100 ms
1 ms
0
10 ms
0
1
2
3
4
tP, PULSE WIDTH
t, TIME (ms)
Figure 1. Pulse Rating Curve
Figure 2. Pulse Waveform
1000
140
IT, TEST CURRENT (AMPS)
PEAK PULSE DERATING IN % OF
PEAK POWER OR CURRENT @ TA = 25 C
160
120
100
80
60
40
20
0
0
25
50
75
100
125
150
500
VBR(NOM)=6.8TO13V
20V
43V
24V
75V
TL=25C
tP=10ms
200
100
120V
50
180V
20
10
5
2
1
0.3
0.5 0.7 1
2
3
5
7
10
20
30
TA, AMBIENT TEMPERATURE (C)
DVBR, INSTANTANEOUS INCREASE IN VBR ABOVE VBR (NOM) (VOLTS)
Figure 3. Pulse Derating Curve
Figure 4. Dynamic Impedance
UL RECOGNITION
including Strike Voltage Breakdown test, Endurance
Conditioning, Temperature test, Dielectric Voltage-Withstand
test, Discharge test and several more.
Whereas, some competitors have only passed a
flammability test for the package material, we have been
recognized for much more to be included in their Protector
category.
The entire series has Underwriters Laboratory
Recognition for the classification of protectors (QVGQ2)
under the UL standard for safety 497B and File #E210057.
Many competitors only have one or two devices recognized
or have recognition in a non-protective category. Some
competitors have no recognition at all. With the UL497B
recognition, our parts successfully passed several tests
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4
1SMC5.0AT3G Series, SZ1SMC5.0AT3G Series
APPLICATION NOTES
Response Time
minimum lead lengths and placing the suppressor device as
close as possible to the equipment or components to be
protected will minimize this overshoot.
Some input impedance represented by Zin is essential to
prevent overstress of the protection device. This impedance
should be as high as possible, without restricting the circuit
operation.
In most applications, the transient suppressor device is
placed in parallel with the equipment or component to be
protected. In this situation, there is a time delay associated
with the capacitance of the device and an overshoot
condition associated with the inductance of the device and
the inductance of the connection method. The capacitive
effect is of minor importance in the parallel protection
scheme because it only produces a time delay in the
transition from the operating voltage to the clamp voltage as
shown in Figure 5.
The inductive effects in the device are due to actual
turn-on time (time required for the device to go from zero
current to full current) and lead inductance. This inductive
effect produces an overshoot in the voltage across the
equipment or component being protected as shown in
Figure 6. Minimizing this overshoot is very important in the
application, since the main purpose for adding a transient
suppressor is to clamp voltage spikes. The SMC series have
a very good response time, typically < 1 ns and negligible
inductance. However, external inductive effects could
produce unacceptable overshoot. Proper circuit layout,
Duty Cycle Derating
The data of Figure 1 applies for non-repetitive conditions
and at a lead temperature of 25C. If the duty cycle increases,
the peak power must be reduced as indicated by the curves
of Figure 7. Average power must be derated as the lead or
ambient temperature rises above 25C. The average power
derating curve normally given on data sheets may be
normalized and used for this purpose.
At first glance the derating curves of Figure 7 appear to be
in error as the 10 ms pulse has a higher derating factor than
the 10 ms pulse. However, when the derating factor for a
given pulse of Figure 7 is multiplied by the peak power value
of Figure 1 for the same pulse, the results follow the
expected trend.
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5
1SMC5.0AT3G Series, SZ1SMC5.0AT3G Series
TYPICAL PROTECTION CIRCUIT
Zin
LOAD
Vin
V
V
Vin (TRANSIENT)
VL
OVERSHOOT DUE TO
INDUCTIVE EFFECTS
Vin (TRANSIENT)
VL
VL
Vin
td
tD = TIME DELAY DUE TO CAPACITIVE EFFECT
t
t
Figure 5.
Figure 6.
1
0.7
DERATING FACTOR
0.5
0.3
0.2
PULSE WIDTH
10 ms
0.1
0.07
0.05
1 ms
0.03
100 ms
0.02
0.01
10 ms
0.1 0.2
0.5
1
2
5
10
D, DUTY CYCLE (%)
20
50 100
Figure 7. Typical Derating Factor for Duty Cycle
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6
1SMC5.0AT3G Series, SZ1SMC5.0AT3G Series
PACKAGE DIMENSIONS
SMC
CASE 403−03
ISSUE E
HE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. D DIMENSION SHALL BE MEASURED WITHIN DIMENSION P.
4. 403-01 THRU -02 OBSOLETE, NEW STANDARD 403-03.
E
b
DIM
A
A1
b
c
D
E
HE
L
L1
D
MIN
1.90
0.05
2.92
0.15
5.59
6.60
7.75
0.76
MILLIMETERS
NOM
MAX
2.13
2.41
0.10
0.15
3.00
3.07
0.23
0.30
5.84
6.10
6.86
7.11
7.94
8.13
1.02
1.27
0.51 REF
MIN
0.075
0.002
0.115
0.006
0.220
0.260
0.305
0.030
INCHES
NOM
0.084
0.004
0.118
0.009
0.230
0.270
0.313
0.040
0.020 REF
MAX
0.095
0.006
0.121
0.012
0.240
0.280
0.320
0.050
A
L
L1
c
A1
SOLDERING FOOTPRINT*
4.343
0.171
3.810
0.150
2.794
0.110
SCALE 4:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SURMETIC is a registered trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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Phone: 421 33 790 2910
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Phone: 81−3−5817−1050
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For additional information, please contact your local
Sales Representative
1SMC5.0AT3/D
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