PRD1210: 15 Vout from 24 Vin at 80 mA

±15 Vout from 24 Vin at 80 mA
Reference Design
PRD1210
FEATURES
Small Size
Low Cost
DESCRIPTION
This application note describes a SEPIC-Cuk converter used to create a dual rail output from a single input
voltage. A SEPIC-Cuk converter uses a SEPIC and a Cuk converter both tied to the same switch node to create
the two separate output rails. In this design, two readily available coupled inductors are used, though a custom
three winding transformer would also work. This design utilizes a cascoded FET (Q1) on the switch node. This
technique allows the use of an inexpensive low voltage regulator chip (ADP1613) to control a higher voltage
converter. In addition it results in very low switching loss, that is offset somewhat by the conduction loss in the
cascoded FET.
Table 1.
Sepcifications
Spec
Units
Vout1
+15V
Volts
Vout2
-15V
Volts
Iout1
0.08
Amps
Iout2
0.020
Amps
Tamb
55
degC
Vinmin
24
Volts
Vinmax
24
Volts
Rev. 0
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Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
Reference Design
PRD1210
TABLE OF CONTENTS
Features ......................................................................................................................................................................1
Description .................................................................................................................................................................1
Revision History .........................................................................................................................................................2
Schematic ...................................................................................................................................................................3
Bill of Materials..........................................................................................................................................................3
Graphs ........................................................................................................................................................................5
TABLE OF FIGURES
Figure 1.
Schematic ...............................................................................................................................................3
Figure 2.
Bode Plot (Full Load both channels) .....................................................................................................5
REVISION HISTORY
2/17/2010—Revision 1: Initial Version
Rev. 1 | Page 2 of 6
Reference Design
PRD1210
SCHEMATIC
Figure 1.
Schematic
BILL OF MATERIALS
Table 2.
Bill of Materials
U1
ADI
Integrated
Switching
Regulator
L1
Coilcraft
82uH, 3410mΩ,
0.3Apk
LPD4012-823
4mm x 4mm
x 1.2mm
1
16.1
1.2
0.600
L2
Coilcraft
82uH, 3410mΩ,
0.3Apk
LPD4012-823
4mm x 4mm
x 1.2mm
1
16.1
1.2
0.600
Q1
Vishay
128 mΩ, 2.9
Vth,60 V
Si3458BDV
SOT23-6
1
9.3
1.1
0.700
D1
ON
Semi
2 A, 100 V
MBRS1100T3G
SMB
1
21.3
2.4
0.100
ADP1613ARMZ
MSOP-8
1
14.7
1.1
0.700
Rev. 1 | Page 3 of 6
Reference Design
PRD1210
U1
ADI
Integrated
Switching
Regulator
D2
ON
Semi
2 A, 100 V
MBRS1100T3G
SMB
1
21.3
2.4
0.100
Cout1
Taiyo
Yuden
1uF, 25V, 11mΩ
TMK107 BJ105MAT
0603
1
1.3
0.8
0.009
Cout2
Taiyo
Yuden
1uF, 25V, 11mΩ
TMK107 BJ105MAT
0603
1
1.3
0.8
0.009
Cin1
Murata
0.1uF, 100V,
40mΩ
GRM188R72A104
0603
1
1.3
0.8
0.031
C1
Murata
0.1uF, 100V,
40mΩ
GRM188R72A104
0603
1
1.3
0.8
0.031
C2
Murata
0.1uF, 100V,
40mΩ
GRM188R72A104
0603
1
1.3
0.8
0.031
Rc1
Vishay
5% tolerance
2.61 kOhms
0805
1
2.5
0.5
0.005
Cc1
Vishay
10% tolerance
27 nF
0805
1
2.5
0.5
0.010
Cc2
Vishay
10% tolerance
150 pF
0805
1
2.5
0.5
0.010
Rf1B
Vishay
47.5 kOhms
1% tolerance
0805
1
2.5
0.5
0.005
Rf2
Vishay
4.22 kOhms
1% tolerance
0805
1
2.5
0.5
0.005
Cv5
Murata
1uF,10V,X5R
GRM188R61A105K
0603
1
1.3
0.6
0.010
Css
Vishay
10% tolerance
10 nF
0805
1
2.5
0.5
0.010
Z2
Diodes
Inc.
5.1V, 500 mW
Zener
DDZ9690
SOD-123
1
2.5
1.1
0.026
Rb1
Vishay
95.3 kOhms
5% tolerance
0805
1
2.5
0.5
0.005
Q2
On
Semi
40V,NPN,300mW
MMBT3904LT1G
SOT-23
1
7.4
1.11
0.020
Totals
21
134.0 max=2.4
ADP1613ARMZ
MSOP-8
1
14.7
1.1
0.700
Rev. 1 | Page 4 of 6
3.02
Reference Design
PRD1210
GRAPHS
Figure 2.
Bode Plot (Full Load both channels)
Rev. 1 | Page 5 of 6
Reference Design
PRD1210
NOTES
©2009 Analog Devices, Inc. All rights reserved.
Trademarks and registered trademarks are the
property of their respective owners. Error! Unknown document property name.
Rev. 1 | Page 6 of 6