DFN5050-32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5 x 5 x 0.85 mm

QF
N3
2
HV
SOT617-1
DFN5050-32: plastic thermal enhanced very thin quad flat
package; no leads; 32 terminals; body 5 x 5 x 0.85 mm
8 February 2016
Package information
1. Package summary
Terminal position code
Q (quad)
Package type descriptive code
HVQFN32
Package type industry code
HVQFN32
Package style descriptive code
HVQFN (thermal enhanced very thin quad
flatpack; no leads)
Package style suffix code
NA (not applicable)
Package body material type
P (plastic)
JEDEC package outline code
MO-220
Mounting method type
S (surface mount)
Issue date
18-10-2002
Table 1. Package summary
Symbol
Parameter
Min
Typ
Nom
Max
Unit
D
package length
4.9
-
5
5.1
mm
E
package width
4.9
-
5
5.1
mm
A
seated height
[tbd]
-
0.85
1
mm
A2
package height
[tbd]
-
0.85
[tbd]
mm
n2
actual quantity of termination
-
-
32
-
SOT617-1
NXP Semiconductors
DFN5050-32: plastic thermal enhanced very thin
quad flat package; no leads; 32 terminals; body 5
x 5 x 0.85 mm
2. Package outline
HVQFN32: plastic thermal enhanced very thin quad flat package; no leads;
32 terminals; body 5 x 5 x 0.85 mm
B
D
SOT617-1
A
terminal 1
index area
A
E
A1
c
detail X
C
e1
e
1/2 e
16
L
y
y1 C
v M C A B
w M C
b
9
17
8
e
e2
Eh
1/2 e
1
terminal 1
index area
24
32
25
X
Dh
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A(1)
max.
A1
b
c
D (1)
Dh
E (1)
Eh
e
e1
e2
L
v
w
y
y1
mm
1
0.05
0.00
0.30
0.18
0.2
5.1
4.9
3.25
2.95
5.1
4.9
3.25
2.95
0.5
3.5
3.5
0.5
0.3
0.1
0.05
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT617-1
---
MO-220
---
EUROPEAN
PROJECTION
ISSUE DATE
01-08-08
02-10-18
Fig. 1. Package outline HVQFN32 (SOT617-1)
SOT617-1
Package information
All information provided in this document is subject to legal disclaimers.
8 February 2016
©
NXP Semiconductors N.V. 2016. All rights reserved
2/5
SOT617-1
NXP Semiconductors
DFN5050-32: plastic thermal enhanced very thin
quad flat package; no leads; 32 terminals; body 5
x 5 x 0.85 mm
3. Soldering
Footprint information for reflow soldering of HVQFN32 package
SOT617-1
Hx
Gx
D
X
0.125
0.105
C
SPx
nSPx
Hy
SPy tot
SPy
Gy
nSPy
SLy By
Ay
SPx tot
SLx
Bx
0.29
Ax
0.24
recommended stencil thickness 0.1 mm
solder land
0.85 0.9
solder paste deposit
solder land plus solder paste
detail X
occupied area
Dimensions in mm
P
Ax
Ay
Bx
By
SLx
SLy
SPx
SPy
0.5
6
6
4.2
4.2
3.1
3.1
0.7
0.7
Issue date
SPx tot SPy tot
1.8
1.8
C
D
0.9
0.29
nSPx nSPy
2
2
Gx
Gy
Hx
Hy
5.3
5.3
6.25
6.25
09-06-15
14-07-31
sot617-1_fr
Fig. 2. Reflow soldering footprint for HVQFN32 (SOT617-1)
SOT617-1
Package information
All information provided in this document is subject to legal disclaimers.
8 February 2016
©
NXP Semiconductors N.V. 2016. All rights reserved
3/5
SOT617-1
NXP Semiconductors
DFN5050-32: plastic thermal enhanced very thin
quad flat package; no leads; 32 terminals; body 5
x 5 x 0.85 mm
4. Legal information
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, NXP Semiconductors does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
SOT617-1
Package information
All information provided in this document is subject to legal disclaimers.
8 February 2016
©
NXP Semiconductors N.V. 2016. All rights reserved
4/5
SOT617-1
NXP Semiconductors
DFN5050-32: plastic thermal enhanced very thin
quad flat package; no leads; 32 terminals; body 5
x 5 x 0.85 mm
5. Contents
1. Package summary........................................................ 1
2. Package outline............................................................ 2
3. Soldering....................................................................... 3
4. Legal information......................................................... 4
©
NXP Semiconductors N.V. 2016. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 8 February 2016
SOT617-1
Package information
All information provided in this document is subject to legal disclaimers.
8 February 2016
©
NXP Semiconductors N.V. 2016. All rights reserved
5/5