Data Sheet

SA58635
2 × 25 mW class-G stereo headphone driver with I2C-bus
volume control
Rev. 01 — 26 March 2010
Product data sheet
1. General description
The SA58635 is a stereo, class-G headphone driver with I2C-bus volume control. The
I2C-bus control allows maximum flexibility with digital volume control, independent
channel enable and mute control.
The output of the SA58635 is referenced around true ground zero. It is designed to
operate at the low supply current of 1.5 mA making it battery friendly. A unique power
management technique provides class-G power efficiency by using a buck converter to
step down the battery supply from a typical lithium ion battery (4.8 V to 2.3 V). Efficiency is
further increased by allowing the output amplifier/driver to operate at multiple voltage rails
based on the output/input swing.
The SA58635 delivers 2 × 25 mW minimum into 16 Ω and 32 Ω loads. The SA58635
provides thermal shutdown and self limiting current protection.
The SA58635 is a high fidelity HP driver amplifier with a S/N of 100 dB minimum. An
excellent PSRR of more than 100 dB, differential input circuit topology allows for
maximum noise immunity in the noisy mobile phone environment.
The SA58635 is available in a 16-bump WLCSP (Wafer Level Chip-Size Package) making
it ideal choice for cellular handsets and portable media players.
2. Features
„
„
„
„
„
„
„
„
„
„
„
„
„
Power supply range: 2.3 V to 5.5 V
High efficiency employing class-G dynamic power management
2 × 25 mW into 16 Ω or 32 Ω at THD+N = 1 %
Very low THD+N at 0.02 % at VO of 0.7Vo(RMS) and RL of 47 Ω
Integrated charge pump to eliminate DC blocking capacitors, reduce cost and PCB
space while improving low frequency audio fidelity
Excellent PSRR: > 100 dB
S/N performance of 100 dB minimum
Low supply current: 1.5 mA typical
Low shutdown current: 5 μA maximum
I2C-bus interface for −59 dB to ±4 dB volume control, independent channel enable,
mute and software shutdown
Self limiting current with thermal protection and ground loop noise suppression
Pop-and-click suppression
Available in 1.7 mm × 1.7 mm 16-bump WLCSP
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
3. Applications
„
„
„
„
„
Wireless and cellular handsets
Portable media players
Portable DVD player
Notebook PC
High fidelity applications
4. Ordering information
Table 1.
Ordering information
Type number
SA58635UK
Package
Name
Description
Version
WLCSP16
wafer level chip-size package; 16 balls; 1.7 × 1.7 × 0.56 mm
SA58635UK
5. Block diagram
SW
AVDD
HPVDD
THERMAL/SHORT-CIRCUIT
PROTECTION
BUCK
CONVERTER
SA58635
INLP
OUTL
INLN
CLASS-G CONTROL
SGND
INRP
OUTR
INRN
HPVSS
CPN
Fig 1.
VOLUME
CONTROL
CHARGE
PUMP
CPP
SDA
002aad931
Block diagram of SA58635
SA58635_1
Product data sheet
AGND
SCL
I2C-BUS
INTERFACE
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
2 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
6. Pinning information
6.1 Pinning
SA58635UK
ball A1
index area
1
2
3
4
A
B
1
C
D
2
3
A
SW
AVDD
OUTL
INLN
B
AGND
CPP
HPVDD
INLP
C
CPN
HPVSS
SGND
INRP
D
SDA
SCL
OUTR
002aaf273
Pin configuration for WLCSP16
INRN
002aad933
Transparent top view
Transparent top view
Fig 2.
4
Fig 3.
Ball mapping for WLCSP16
6.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
SW
A1
buck converter switching mode
AVDD
A2
analog supply; same as battery
OUTL
A3
headphone left channel output
INLN
A4
left channel negative differential input
AGND
B1
analog supply ground
CPP
B2
charge pump positive capacitor
HPVDD
B3
buck converter output voltage
INLP
B4
left channel positive differential input
CPN
C1
charge pump negative capacitor
HPVSS
C2
charge pump negative output voltage
SGND
C3
ground sense; connect to headphone jack ground
INRP
C4
right channel positive differential input
SDA
D1
I2C-bus serial data
SCL
D2
I2C-bus serial clock
OUTR
D3
headphone right channel output
INRN
D4
right channel negative differential input
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
3 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
7. Functional description
Refer to Figure 1 “Block diagram of SA58635”.
7.1 Device address
Following a START condition, the bus master must output the address of the slave it is
accessing.
The SA58635 responds to two slave addresses: 1100 000xb for standard accesses and
the General Call writes (0000 0000b) for software reset. The last bit of the address byte
defines the operation to be performed. When set to logic 1 a read is selected, while a
logic 0 selects a write operation.
When a reset of the I2C-bus needs to be performed by the master, the master will write to
the General Call address followed by a write of the reset command (0000 0110b). When a
General Call reset command is sent by the master, the SA58635 will respond with an
acknowledge and execute a reset to the digital logic. This will return the register set and
the volume controls to the Power-On Reset (POR) values.
7.2 Control register
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the SA58635, which will be stored in the Control register.
The lowest 3 bits are used as a pointer to determine which register will be accessed
(D[2:0]). The remaining bits are not used and are ignored.
7.3 Register definitions
Table 3.
Register summary
Register
number
(hex)
Name
Type
Function
00
-
-
Reserved; this address is empty and will be NACKed.
01
MODE1
read/write
Contains the left and right channel amplifier enable bits,
thermal status and the software shutdown bit.
02
VOLCTL
read/write
Volume setting and mute left and right bits.
03
HIZ
read/write
High-impedance controls for left and right channel.
04
ID
read only
Vendor Identification and chip version number.
05
-
-
Reserved; this address is empty and will be NACKed.
06
TEST1
read/write
This register is for manufacturing test.
07
-
read/write
Reserved; this register is empty and will be NACKed.
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
4 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
7.3.1 MODE1 register, MODE1
Table 4.
MODE1 - Mode register 1 (address 01h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
HP_EN_L
R/W
0*
Left channel inactive. A zero will turn off the left
channel.
1
Left channel active.
0*
Right channel inactive. A zero will turn off the right
channel.
1
Right channel active.
6
HP_EN_R
R/W
5
-
read only
0*
Reserved; always reads back as a 0.
4
-
read only
0*
Reserved; always reads back as a 0.
3
-
read only
0*
Reserved; always reads back as a 0.
2
-
read only
0*
Reserved; always reads back as a 0.
1
THERMAL
read only
0*
Device is operating normally.
1
Device is in thermal shutdown.
0*
Device is enabled.
1
Software shutdown; charge pump is disabled.
0
SWS
R/W
7.3.2 Volume control register, VOLCTL
Table 5.
VOLCTL - Volume control register (address 02h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
MUTEL
R/W
0
A zero indicates that the left channel is not muted.
1*
Left channel is muted.
0
A zero indicates that the right channel is not
muted.
1*
Right channel is muted.
6
MUTER
R/W
5 to 1
VOL[4:0]
R/W
0*
These bits indicate the volume on the outputs per
the gain table shown in Table 9.
0
-
read only
0*
This bit is reserved and will always return a zero.
7.3.3 High-impedance register, HIZ
Table 6.
HIZ - High-impedance register (address 03h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7 to 2
-
read only
0*
Unused; always returns 0.
1
HIZL
R/W
0*
Device outputs are not in high-impedance.
1
Device outputs are in high-impedance.
0
HIZR
R/W
0*
Device outputs are not in high-impedance.
1
Device outputs are in high-impedance.
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
5 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
7.3.4 Chip identification register, ID
Table 7.
ID - Chip identification register (address 04h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7 to 6
SUPPLIER
read only
11b*
This is the supplier identification for this device,
indicating that this device is manufactured by
NXP Semiconductors.
5 to 4
-
read only
00b*
Unused; always returns 0.
3 to 0
VER[3:0]
read only
0000b
These bits indicate the version number for this
device. Initial silicon will be set to 0h.
7.3.5 Test register 1, TEST1
Table 8.
TEST1 - Test register 1 (address 06h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7 to 0
-
R/W
00h*
Software should refrain from writing to this register.
Software should write only 0’s to this register.
Values other than 0 may cause the part to not
function as expected.
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
6 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
7.4 Volume control
Volume levels are set in the VOLCTL register (register 02h) as described in Section 7.3.2.
As the volume is changed including muting and un-muting, the SA58635, will step to the
new value at an incremental (or decremental) rate of approximately one millisecond per
step. A full sweep from 00h to 1Fh will take roughly 32 milliseconds. The VOLCTL register
values represent a gain on the output channels as indicated in Table 9.
Table 9.
Volume and gain control
Volume control word
Gain ± 0.5 (dB)
0000 000x
−59
0000 001x
−55
0000 010x
−51
0000 011x
−47
0000 100x
−43
0000 101x
−39
0000 110x
−35
0000 111x
−31
0001 000x
−27
0001 001x
−25
0001 010x
−23
0001 011x
−21
0001 100x
−19
0001 101x
−17
0001 110x
−15
0001 111x
−13
0010 000x
−11
0010 001x
−10
0010 010x
−9
0010 011x
−8
0010 100x
−7
0010 101x
−6
0010 110x
−5
0010 111x
−4
0011 000x
−3
0011 001x
−2
0011 010x
−1
0011 011x
0
0011 100x
+1
0011 101x
+2
0011 110x
+3
0011 111x
+4
1xxx xxxx
Mute Left active
x1xx xxxx
Mute Right active
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
7 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
7.5 Power-on reset
When power is applied to AVDD, an internal power-on reset holds the SA58635 in a reset
condition until AVDD has reached VPOR. At this point, the reset condition is released and
the SA58635 registers and I2C-bus state machine are initialized to their default states
(all zeroes) causing all the channels to be deselected. Thereafter, AVDD must be lowered
below 0.2 V to reset the device.
8. Characteristics of the I2C-bus
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
8.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see Figure 4).
SDA
SCL
data line
stable;
data valid
Fig 4.
change
of data
allowed
mba607
Bit transfer
8.1.1 START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see Figure 5).
SDA
SCL
S
P
START condition
STOP condition
mba608
Fig 5.
Definition of START and STOP conditions
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
8 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
8.2 System configuration
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see Figure 6).
SDA
SCL
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
I2C-BUS
MULTIPLEXER
SLAVE
002aaa966
Fig 6.
System configuration
8.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; set-up time and hold
time must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
data output
by transmitter
not acknowledge
data output
by receiver
acknowledge
SCL from master
1
S
START
condition
Fig 7.
8
9
clock pulse for
acknowledgement
002aaa987
Acknowledgement on the I2C-bus
SA58635_1
Product data sheet
2
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
9 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
9. Bus transactions
slave address
data for register D[5:0](1)
control register
S A6 A5 A4 A3 A2 A1 A0 0
START condition
A
X
R/W
X D5 D4 D3 D2 D1 D0 A
Auto-Increment flag
A
acknowledge
from slave
acknowledge
from slave
P
acknowledge
from slave
STOP
condition
002aad612
(1) See Table 3 for register definition.
Fig 8.
Write to a specific register
general call
S
0
0
0
0
START condition
0
software reset
0
0
0
A
0
0
0
0
R/W
acknowledge
from slave
0
1
1
0
A
P
acknowledge
from slave
STOP
condition
002aae118
Fig 9.
Software reset
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
10 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
10. Limiting values
Table 10. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol
Parameter
Conditions
Min
Max
Unit
VDD
supply voltage
Active mode
−0.3
+6.0
V
Shutdown mode
−0.3
+6.0
V
VI
input voltage
INRN, INRP, INLN, INLP
−0.3
2.1
V
VIO
input/output voltage
SCL, SDA
VAGND − 0.5
VDD
V
-
200
mA
Tamb = 25 °C
-
1000
mW
Tamb = 70 °C
-
550
mW
Tamb = 85 °C
-
400
mW
[2]
IBR
breakdown current
continuous
P
power dissipation
WLCSP16; derating factor 10 mW/K
Tamb
ambient temperature
operating in free air
−40
+85
°C
Tj
junction temperature
operating
−40
+85
°C
Tstg
storage temperature
−65
+150
°C
VESD
electrostatic discharge
voltage
human body model
±4000
-
V
machine model
±300
-
V
charged-device model
±750
-
V
device use level:
IEC61000-4-2 level 4, contact
[3]
±30
-
kV
IEC61000-4-2 level 4, air discharge
[3]
±30
-
kV
[1]
VDD is the supply voltage on pin AVDD.
[2]
Breakdown current of output protection diodes.
[3]
ESD shock needs to be conducted to the connector pins (see Figure 10).
All functions of a device/system perform as designed during and after exposure to a disturbance.
Remark: External ESD suppressor ASIP protects the amplifier outputs. Suppressor is between amplifier and connector;
15 Ω serial resistance + 5 nF capacitor and Zener diodes (14 V breakdown voltage) connected to the ground. In addition, there is a
ferrite bead in series between suppressor and connector (see Figure 10).
Remark: Air discharge test can be ignored if contact discharge test range is increased to corresponding same voltages as air discharge
(reason: contact discharge is more stable and repeatable test than air discharge).
SA58635
OUTR
SGND
OUTL
FB
A1
A2
ESD
B2
ASIP
C1
C2
IP5311CX5/LF
AGND
FB
shield
AGND
002aae119
Fig 10. ESD suppressor ASIP
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
11 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
11. Static characteristics
Table 11. Static characteristics
VDD = 3.6 V; RL = 15 Ω + 32 Ω; two channels in phase; Tamb = 25 °C, unless otherwise specified.[1]
Symbol
Parameter
Conditions
Min
Typ Max
Unit
VDD
supply voltage
continuous
2.3
-
5.5
V
IDD
supply current
both channels enabled;
no audio signal
-
1.5
-
mA
IDD(sd)
shutdown mode supply current
I2C-bus in operation
-
1
5
μA
Vi(cm)
common-mode input voltage
differential
−1.3
-
+1.3
V
VPOR
power-on reset voltage
-
2.1
-
V
|VO(offset)|
output offset voltage
absolute value;
both channels enabled
-
0.5
3
mV
PSRR
power supply rejection ratio
Gv = 0 dB
100
-
-
dB
Zi
input impedance
differential
20
-
-
kΩ
Zo
output impedance
high-impedance mode
<40 kHz
10
-
-
kΩ
6 MHz
500
-
-
Ω
36 MHz
75
-
-
Ω
I2C-bus pins (SCL, SDA)
IOL
LOW-level output current
SDA output; VOL = 0.4 V;
VDD = 3.6 V
3
-
-
mA
ILI
input leakage current
SCL, SDA
−1
-
+1
μA
Ci
input capacitance
SCL, SDA
-
-
10
pF
VIH
HIGH-level input voltage
SCL, SDA
1.2
-
-
V
VIL
LOW-level input voltage
SCL, SDA
-
-
0.6
V
[1]
VDD is the supply voltage on pin AVDD.
002aaf009
10
IDD
(mA)
8
6
4
2
0
2.5
3.5
4.5
5.5
VDD (V)
Fig 11. Supply current versus supply voltage
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
12 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
12. Dynamic characteristics
Table 12. Dynamic characteristics
VDD = 3.6 V; RL = 15 Ω + 32 Ω; two channels in phase; Tamb = 25 °C; unless otherwise specified.[1]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Po
output power
stereo; f = 1 kHz; THD+N = 1 %
2 × 25
-
-
mW
IDD
supply current
output 2 × 100 μW at 3 dB crest factor
-
2.5
3.5
mA
output 2 × 500 μW at 3 dB crest factor
-
4.5
5.5
mA
output 2 × 1 mW at 3 dB crest factor
-
6.5
7.5
mA
RL = 16 Ω; THD+N = 1 %; L + R in phase
0.63
-
-
V
RL = 32 Ω; THD+N = 1 %; L + R in phase
0.89
-
-
V
RMS output voltage
Vo(RMS)
amplifier
THD+N
total harmonic
distortion-plus-noise
f = 1 kHz; VO = 700 mV (RMS)
-
-
0.02
%
SVRR
supply voltage ripple
rejection
Gv = 4 dB; f = 217 Hz
75
-
-
dB
αct(ch)
channel crosstalk
Po = 15 mW; f = 1 kHz
90
-
-
dB
line out > 10 kΩ
80
-
-
dB
Vn(o)(RMS)
RMS output noise voltage Gv = 4 dB; A-weight
-
7
-
μV
td(sd-startup)
delay time from shutdown
to start-up
-
-
15
ms
S/N
signal-to-noise ratio
VO = 1 V (RMS); f = 1 kHz
100
-
-
dB
Toff
switch-off temperature
threshold
-
180
-
°C
hysteresis
-
35
-
°C
[1]
VDD is the supply voltage on pin AVDD.
002aaf025
60
002aaf026
60
(1)
Po
(mW)
Po
(mW)
40
(1)
40
(2)
(2)
20
0
2.5
20
3.5
4.5
5.5
0
2.5
3.5
VDD (V)
4.5
5.5
VDD (V)
(1) THD+N = 10 %
(1) THD+N + 10 %
(2) THD+N = 1 %
(2) THD+N + 1 %
a. RL = 16 Ω; in phase
b. RL = 32 Ω; in phase
Fig 12. Output power per channel versus supply voltage
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
13 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
002aaf027
100
Po
(mW)
80
002aaf028
100
Po
(mW)
80
(2)
60
60
(3)
(1)
(2)
(1)
40
40
(3)
20
20
0
102
10
0
103
102
10
103
RL (Ω)
RL (Ω)
a. THD+N = 1 %; in phase
b. THD+N = 1 %; out of phase
(1) VDD = 2.5 V
(2) VDD = 3.6 V
(3) VDD = 5 V
Fig 13. Output power per channel versus load resistance
002aaf029
102
IDD
(mA)
VDD = 5.0 V
3.6 V
2.5 V
IDD
(mA)
VDD = 5.0 V
3.6 V
2.5 V
10
1
10−3
002aaf030
102
10
10−2
10−1
1
10
102
Po(tot) (mW)
a. f = 1 kHz; RL = 16 Ω
1
10−3
10−2
10−1
1
10
102
Po(tot) (mW)
b. f = 1 kHz; RL = 32 Ω
Fig 14. Supply current versus total output power
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
14 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
002aaf031
103
Ptot
(mW)
002aaf032
1.6
Vo(RMS)
(V)
1.4
(3)
(4)
102
1.2
(2)
(1)
1.0
(2)
10
(1)
0.8
1
10−2
10−1
10
102
Po(tot) (mW)
1
0.6
2.5
3.5
4.5
5.5
VDD (V)
(1) RL = 16 Ω
f = 1 kHz; THD+N = 1 %
(2) RL = 32 Ω
(1) RL = 16 Ω
(2) RL = 32 Ω
(3) RL = 600 Ω
(4) RL 1000 Ω
Fig 15. Total power dissipation versus
total output power
Fig 16. RMS output voltage versus supply voltage
002aaf033
0
αct
(dB)
−20
output amplitude (dBV)
−30
−40
−60
−60
−90
−80
−120
−100
002aaf034
0
10
102
103
104
105
−150
0
RL = 16 Ω; Po = 15 mW
Fig 17. Crosstalk versus frequency
10
15
20
RL = 16 Ω
Fig 18. Output amplitude versus frequency
SA58635_1
Product data sheet
5
f (kHz)
f (Hz)
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
15 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
002aaf011
102
THD+N
(%)
002aaf012
102
THD+N
(%)
10
10
1
VDD = 5.0 V
3.6 V
2.5 V
1
10−1
10−2
10−4
10−1
VDD = 5.0 V
3.6 V
2.5 V
10−3
10−2
10−2
10−3
10−4
10−1
10−3
10−2
10−1
Po (W)
Po (W)
a. f = 1 kHz; RL = 16 Ω
b. f = 1 kHz; RL = 32 Ω
002aaf010
102
THD+N
(%)
10
(1)
(2)
1
10−1
10−2
10−4
10−3
10−2
10−1
Po (W)
(1) In phase.
(2) Out of phase.
c. f = 1 kHz; RL = 32 Ω; VDD = 3.6 V
Fig 19. Total harmonic distortion-plus-noise versus output power
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
16 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
002aaf013
1
002aaf014
1
THD+N
(%)
THD+N
(%)
10−1
10−1
(1)
(2)
10−2
(3)
10−2
(3)
(2)
(1)
10−3
102
10
103
104
105
10−3
102
10
103
104
f (Hz)
105
f (Hz)
a. RL = 16 Ω
b. RL = 32 Ω
(1) Po = 1 mW / channel
(2) Po = 4 mW / channel
(3) Po = 10 mW / channel
Fig 20. Total harmonic distortion-plus-noise versus frequency (VDD = 2.5 V)
002aaf015
1
002aaf016
1
THD+N
(%)
THD+N
(%)
10−1
10−1
(2)
(3)
10−2
(3)
10−2
(1)
(1)
(2)
10−3
10
102
103
104
105
10−3
10
102
f (Hz)
a. RL = 16 Ω
103
104
105
f (Hz)
b. RL = 32 Ω
(1) Po = 1 mW / channel
(2) Po = 10 mW / channel
(3) Po = 15 mW / channel
Fig 21. Total harmonic distortion-plus-noise versus frequency (VDD = 3.6 V)
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
17 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
002aaf017
1
002aaf018
1
THD+N
(%)
THD+N
(%)
10−1
10−1
(2)
(2)
10−2
(3)
(1)
10−2
(1)
(3)
10−3
10
102
103
104
105
10−3
10
102
103
f (Hz)
104
105
f (Hz)
(1) Po = 1 mW / channel
(1) Po = 1 mW / channel
(2) Po = 10 mW / channel
(2) Po = 10 mW / channel
(3) Po = 15 mW / channel
(3) Po = 20 mW / channel
a. RL = 16 Ω
b. RL = 32 Ω
Fig 22. Total harmonic distortion-plus-noise versus frequency (VDD = 5 V)
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
18 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
002aaf035
SDA
voltage
(V)
VO
vertical scale = 100 mV/div
horizontal scale = 2 ms/div
time (ms)
RL = 32 Ω; f = 1 kHz; Vi(p-p) = 200 mV.
Based on single channel 1 demo board only.
Fig 23. Start-up waveform
002aaf036
SDA
voltage
(V)
VO
vertical scale = 100 mV/div
horizontal scale = 2 ms/div
time (ms)
RL = 32 Ω; f = 1 kHz; Vi(p-p) = 200 mV; Gv = 4 dB.
Based on single channel 1 demo board only.
Fig 24. Shutdown waveform
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
19 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
Table 13.
Dynamic characteristics for I2C-bus
Symbol
Parameter
Conditions
Standard-mode
I2C-bus
fSCL
SCL clock frequency
tBUF
bus free time between a STOP and START
condition
tHD;STA
hold time (repeated) START condition
4.0
-
tSU;STA
set-up time for a repeated START condition
4.7
-
tSU;STO
set-up time for STOP condition
4.0
-
tHD;DAT
data hold time
Fast-mode
I2C-bus
Unit
Min
Max
Min
Max
0
100
0
400
4.7
-
1.3
-
μs
0.6
-
μs
0.6
-
μs
0.6
-
μs
kHz
0
-
0
-
ns
0.3
3.45
0.1
0.9
μs
0.3
3.45
0.1
0.9
μs
tVD;ACK
data valid acknowledge time
[1]
tVD;DAT
data valid time
[2]
tSU;DAT
data set-up time
250
-
100
-
ns
tLOW
LOW period of the SCL clock
4.7
-
1.3
-
μs
tHIGH
HIGH period of the SCL clock
tf
fall time of both SDA and SCL signals
tr
rise time of both SDA and SCL signals
[3][4]
pulse width of spikes that must be suppressed
by the input filter
tSP
[6]
4.0
-
0.6
-
μs
-
300
20 + 0.1Cb[5]
300
ns
-
1000
20 + 0.1Cb[5]
300
ns
-
50
-
50
ns
[1]
tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
[2]
tVD;DAT = minimum time for SDA data out to be valid following SCL LOW.
[3]
A master device must internally provide a hold time of at least 300 ns for the SDA signal (refer to the VIL of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
[4]
The maximum tf for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time (tf) for the SDA output stage is specified at
250 ns. This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without
exceeding the maximum specified tf.
[5]
Cb = total capacitance of one bus line in pF.
[6]
Input filters on the SDA and SCL inputs suppress noise spikes less than 50 ns.
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
20 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
13. Application information
2.3 V to 5.5 V
3.3 μH
SW
10 μF
HPVDD
AVDD
1 μF
INLP
OUTL
INLN
OUTR
1 μF
AUDIO
SOURCE
1 μF
A1
A2
ESD
B2
ASIP
C1
C2
IP5311CX5/LF
SA58635
to headphone jack
shield
SGND
INRP
1 μF
INRN
HPVSS
2.2 μF
CPP
AGND
CPN
SCL
SDA
2.2 μF
I2C-bus
002aae120
Fig 25. Typical application
13.1 Power supply decoupling considerations
The SA58635 is a stereo class-G headphone driver amplifier that requires proper power
supply decoupling to ensure the rated performance for THD+N and power efficiency. To
decouple high frequency transients, power supply spikes and digital noise on the power
bus line, a low Equivalent Series Resistance (ESR) capacitor, of typically 1 μF is placed
as close as possible to the AVDD terminals of the device. It is important to place the
decoupling capacitor at the power pins of the device because any resistance or
inductance in the PCB trace between the device and the capacitor can cause a loss in
efficiency. 10 μF or greater capacitors are usually not required due to high PSRR of the
SA58635.
13.2 Input capacitor selection
The SA58635 does not require input coupling capacitors when used with a differential
audio source that is biased from −1.3 V to +1.3 V. In other words, the input signal must be
biased within the common-mode input voltage range. If high-pass filtering is required or if
it is driven using a single-ended source, input coupling capacitors are required.
The 3 dB cut-off frequency is created by the input coupling capacitors and the input
resistance of the SA58635. Ci is the value of the input coupling capacitors. The input
resistance (Ri) of the SA58635 is a function of amplifier gain; it will vary from
approximately 11.06 kΩ (minimum) to 28.47 kΩ (maximum) (see Table 14).
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
21 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
Table 14.
Input resistance as a function of amplifier gain
Steps
Ri (kΩ)
Gain (dB)
0
28.468
−58.986
1
28.450
−55.185
2
28.421
−51.083
3
28.375
−47.117
4
28.298
−42.942
5
28.177
−38.819
6
27.995
−34.884
7
27.697
−30.758
8
27.302
−27.155
9
26.982
−24.997
10
26.587
−22.858
11
26.163
−20.981
12
25.550
−18.751
13
24.910
−16.826
14
24.183
−14.967
15
23.264
−12.953
16
22.173
−10.893
17
21.560
−9.846
18
20.947
−8.861
19
20.334
−7.925
20
19.607
−6.868
21
18.880
−5.857
22
18.267
−5.034
23
17.420
−3.930
24
16.572
−2.857
25
15.725
−1.804
26
14.998
−0.913
27
14.207
0.052
28
13.480
0.939
29
12.754
1.831
30
11.906
2.884
31
11.058
3.958
The 3 dB cut-off frequency is calculated by Equation 1:
1
f –3dB = ----------------------------2π × R i × C i
(1)
Since the values of the input coupling capacitor and the input resistor affects the low
frequency performance of the audio amplifier, it is important to consider in the system
design.
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
22 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
For a required 3 dB cut-off frequency, Equation 2 is used to determine Ci:
1
C i = -----------------------------------2π × R i × f –3dB
(2)
For Ci = 1 μF, the 3 dB cut-off frequency will vary with gain settings. For gain setting of
4 dB, the SA58635 input resistance, Ri is 11.06 kΩ (refer to Table 14). Substituting Ri and
Ci in Equation 1 yields f−3dB = 14.4 Hz.
13.3 PCB layout considerations
Component location is very important for performance of the SA58635. Place all external
components very close to the device. Placing decoupling capacitors directly at the power
supply pins increases efficiency because the resistance and inductance in the trace
between the device power supply pins and the decoupling capacitor causes a loss in
power efficiency.
The trace width and routing are also very important for power output and noise
considerations.
For the input pins (INLP, INLN, INRP, INRN), the traces must be symmetrical and run
side-by-side to maximize common-mode cancellation.
13.4 Thermal information
The SA58635 16-bump WLCSP package ground bumps are soldered directly to the PCB
heat spreader. The heat spreader is the PCB ground plane or special heat sinking layer
designed into the PCB. The thickness and area of the heat spreader may be maximized to
optimize heat transfer and achieve lower package thermal resistance.
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
23 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
14. Package outline
WLCSP16: wafer level chip-size package; 16 balls; 1.7 x 1.7 x 0.56 mm
A
B
D
SA58635UK
ball A1
index area
A2
A
E
A1
detail X
e1
e
∅v
∅w
b
C A B
C
y
D
e
C
e2
B
A
ball A1
index area
1
2
3
X
4
0
0.5
Dimensions
Unit
mm
1 mm
scale
A
A1
A2
b
D
E
e
max 0.615 0.23 0.385 0.29 1.725 1.725
nom 0.560 0.20 0.360 0.26 1.695 1.695 0.4
min 0.505 0.17 0.335 0.23 1.665 1.665
e1
e2
1.2
1.2
v
w
y
0.02 0.01 0.03
sa58635uk_po
Outline
version
References
IEC
JEDEC
JEITA
European
projection
Issue date
10-01-18
10-01-19
SA58635UK
Fig 26. Package outline SA58635UK (WLCSP16)
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
24 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
15. Soldering of WLCSP packages
15.1 Introduction to soldering WLCSP packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note
AN10439 “Wafer Level Chip Scale Package” and in application note AN10365 “Surface
mount reflow soldering description”.
Wave soldering is not suitable for this package.
All NXP WLCSP packages are lead-free.
15.2 Board mounting
Board mounting of a WLCSP requires several steps:
1. Solder paste printing on the PCB
2. Component placement with a pick and place machine
3. The reflow soldering itself
15.3 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 27) than a PbSn process, thus
reducing the process window
• Solder paste printing issues, such as smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature), and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic) while being low enough that the packages and/or boards are not
damaged. The peak temperature of the package depends on package thickness and
volume and is classified in accordance with Table 15.
Table 15.
Lead-free process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (°C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 27.
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
25 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 27. Temperature profiles for large and small components
For further information on temperature profiles, refer to application note AN10365
“Surface mount reflow soldering description”.
15.3.1 Stand off
The stand off between the substrate and the chip is determined by:
• The amount of printed solder on the substrate
• The size of the solder land on the substrate
• The bump height on the chip
The higher the stand off, the better the stresses are released due to TEC (Thermal
Expansion Coefficient) differences between substrate and chip.
15.3.2 Quality of solder joint
A flip-chip joint is considered to be a good joint when the entire solder land has been
wetted by the solder from the bump. The surface of the joint should be smooth and the
shape symmetrical. The soldered joints on a chip should be uniform. Voids in the bumps
after reflow can occur during the reflow process in bumps with high ratio of bump diameter
to bump height, i.e. low bumps with large diameter. No failures have been found to be
related to these voids. Solder joint inspection after reflow can be done with X-ray to
monitor defects such as bridging, open circuits and voids.
15.3.3 Rework
In general, rework is not recommended. By rework we mean the process of removing the
chip from the substrate and replacing it with a new chip. If a chip is removed from the
substrate, most solder balls of the chip will be damaged. In that case it is recommended
not to re-use the chip again.
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
26 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
Device removal can be done when the substrate is heated until it is certain that all solder
joints are molten. The chip can then be carefully removed from the substrate without
damaging the tracks and solder lands on the substrate. Removing the device must be
done using plastic tweezers, because metal tweezers can damage the silicon. The
surface of the substrate should be carefully cleaned and all solder and flux residues
and/or underfill removed. When a new chip is placed on the substrate, use the flux
process instead of solder on the solder lands. Apply flux on the bumps at the chip side as
well as on the solder pads on the substrate. Place and align the new chip while viewing
with a microscope. To reflow the solder, use the solder profile shown in application note
AN10365 “Surface mount reflow soldering description”.
15.3.4 Cleaning
Cleaning can be done after reflow soldering.
16. Abbreviations
Table 16.
Abbreviations
Acronym
Description
ASIP
Application Specific Instruction-set Processor
DVD
Digital Versatile Disk
ESD
ElectroStatic Discharge
ESR
Equivalent Series Resistance
FB
FeedBack
HP
HeadPhone
I2C-bus
Inter-integrated Circuit bus
PC
Personal Computer
PCB
Printed-Circuit Board
17. Revision history
Table 17.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
SA58635_1
20100326
Product data sheet
-
-
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
27 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
18. Legal information
18.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
18.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
28 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I2C-bus — logo is a trademark of NXP B.V.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
SA58635_1
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 01 — 26 March 2010
29 of 30
SA58635
NXP Semiconductors
2 × 25 mW class-G stereo headphone driver
20. Contents
1
2
3
4
5
6
6.1
6.2
7
7.1
7.2
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.4
7.5
8
8.1
8.1.1
8.2
8.3
9
10
11
12
13
13.1
13.2
13.3
13.4
14
15
15.1
15.2
15.3
15.3.1
15.3.2
15.3.3
15.3.4
16
17
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Device address . . . . . . . . . . . . . . . . . . . . . . . . . 4
Control register . . . . . . . . . . . . . . . . . . . . . . . . . 4
Register definitions . . . . . . . . . . . . . . . . . . . . . . 4
MODE1 register, MODE1 . . . . . . . . . . . . . . . . . 5
Volume control register, VOLCTL . . . . . . . . . . . 5
High-impedance register, HIZ . . . . . . . . . . . . . . 5
Chip identification register, ID . . . . . . . . . . . . . . 6
Test register 1, TEST1 . . . . . . . . . . . . . . . . . . . 6
Volume control . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . 8
Characteristics of the I2C-bus . . . . . . . . . . . . . 8
Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
START and STOP conditions . . . . . . . . . . . . . . 8
System configuration . . . . . . . . . . . . . . . . . . . . 9
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Bus transactions . . . . . . . . . . . . . . . . . . . . . . . 10
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 11
Static characteristics. . . . . . . . . . . . . . . . . . . . 12
Dynamic characteristics . . . . . . . . . . . . . . . . . 13
Application information. . . . . . . . . . . . . . . . . . 21
Power supply decoupling considerations . . . . 21
Input capacitor selection . . . . . . . . . . . . . . . . . 21
PCB layout considerations . . . . . . . . . . . . . . . 23
Thermal information . . . . . . . . . . . . . . . . . . . . 23
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 24
Soldering of WLCSP packages. . . . . . . . . . . . 25
Introduction to soldering WLCSP packages . . 25
Board mounting . . . . . . . . . . . . . . . . . . . . . . . 25
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 25
Stand off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Quality of solder joint . . . . . . . . . . . . . . . . . . . 26
Rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Cleaning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 27
18
18.1
18.2
18.3
18.4
19
20
Legal information . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information . . . . . . . . . . . . . . . . . . . .
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 26 March 2010
Document identifier: SA58635_1
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