TFA9890A
9.5 V boosted audio system with adaptive sound maximizer
and speaker protection
Rev. 1 — 16 September 2014
Product short data sheet
1. General description
The TFA9890A is a high efficiency class-D audio amplifier with a sophisticated speaker
boost and protection algorithm. It can deliver 7.2 W peak output power into an 8
speaker at a supply voltage of 3.6 V. The internal boost converter raises the supply
voltage to 9.5 V, providing ample headroom for major improvements in sound quality.
A safe working environment is provided for the speaker under all operating conditions.
The TFA9890A maximizes acoustic output while ensuring diaphragm displacement and
voice coil temperature do not exceed their rated limits. This function is based on a
speaker box model that operates in all loudspeaker environments (e.g. free air, closed box
or vented box). Furthermore, advanced signal processing ensures that the quality of the
audio signal is never degraded by unwanted clipping or distortion in the amplifier or
speaker.
Unlike competing solutions, the adaptive sound maximizer algorithm uses feedback to
accurately calculate both the temperature and the excursion, allowing the TFA9890A to
adapt to changes in the acoustic environment.
Internal intelligent DC-to-DC conversion boosts the supply rail to provide additional
headroom and power output. The supply voltage is only raised when necessary. This
maximizes the output power of the class-D audio amplifier while limiting quiescent power
consumption.
The TFA9890A also incorporates advanced battery protection. By limiting the supply
current when the battery voltage is low, it prevents the audio system from drawing
excessive load currents from the battery, which could cause a system undervoltage. The
advanced processor minimizes the impact of a falling battery voltage on the audio quality
by preventing distortion as the battery discharges.
The device features low RF susceptibility because it has a digital input interface that is
insensitive to clock jitter. The second order closed loop architecture used in a class-D
audio amplifier provides excellent audio performance and high supply voltage ripple
rejection. The audio input interface is I2S and the control settings are communicated via
an I2C-bus interface.
The device also provides the speaker with robust protection against ESD damage. In a
typical application, no additional components are needed to withstand a 15 kV discharge
on the speaker.
The TFA9890A is available in a 49-bump WLCSP (Wafer Level Chip-Size Package) with a
400 m pitch.
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
2. Features and benefits
Sophisticated speaker-boost and protection algorithm that maximizes speaker
performance while protecting the speaker:
Fully embedded software, no additional license fee or porting required
Total integrated solution that includes DSP, amplifier, DC-to-DC, sensing and more
Adaptive excursion control - guarantees that the speaker membrane excursion never
exceeds its rated limit
Real-time temperature protection - direct measurement ensures that voice coil
temperature never exceeds its rated limit
Environmentally aware - automatically adapts speaker parameters to acoustic and
thermal changes including compensation for speaker-box leakage
Speaker error detection (detects faulty speakers and enclosures)
Output power: 3.6 W (RMS) into 8 at 3.6 V supply voltage (THD = 1 %)
Clip avoidance - DSP algorithm prevents clipping even with sagging supply voltage
Bandwidth extension option to increase low frequency response
Compatible with standard Acoustic Echo Cancellers (AECs)
High efficiency and low power dissipation
Wide supply voltage range (fully operational from 2.7 V to 5.5 V)
Two I2S inputs to support two audio sources
I2C-bus control interface (400 kHz)
Dedicated speech mode with speech activity detector
Speaker current and voltage monitoring (via the I2S-bus) for Acoustic Echo
Cancellation (AEC) at the host
Fully short-circuit proof across the load and to the supply lines
Sample frequencies from 8 kHz to 48 kHz supported
3 bit clock/word select ratios supported (32x, 48x, 64x)
Option to route I2S input direct to I2S output to allow a second I2S output slave device
to be used in combination with the TFA9890A
TDM interface supported (with limited functionality)
Volume control
Low RF susceptibility
Input clock jitter insensitive interface
Thermally protected
15 kV system-level ESD protection without external components
‘Pop noise' free at all mode transitions
3. Applications
TFA9890A_SDS
Product short data sheet
Mobile phones
Tablets
Portable Navigation Devices (PND)
Notebooks/Netbooks
MP3 players and portable media players
Small audio systems
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Rev. 1 — 16 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
2 of 38
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
4. Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VBAT
battery supply voltage
on pin VBAT
2.7
-
5.5
V
VDDD
digital supply voltage
on pin VDDD
1.65
1.8
1.95
V
IBAT
battery supply current
on pin VBAT and in DC-to-DC converter coil;
Operating modes with load; DC-to-DC
converter in Adaptive Boost mode (no output
signal, VBAT = 3.6 V, VDDD = 1.8 V)
-
4
-
mA
Power-down mode
-
1
-
A
IDDD
digital supply current
on pin VDDD; Operating modes;
SpeakerBoost Protection activated
-
20
-
mA
on pin VDDD; Operating modes; CoolFlux
DSP bypassed
-
6
-
mA
on pin VDDD; Power-down mode;
BCK1 = WS1 = DATAI1 = BCK2 = WS2 =
DATAI2 = DATAI3 = 0 V
-
10
-
A
RL = 8 ; fs = 48 kHz
-
3.6
-
W
RL = 8 ; fs = 32 kHz
-
3.7
-
W
Po(RMS)
RMS output power
THD+N = 1 %; CLIP = 0
5. Ordering information
Table 2.
Ordering information
Type number
TFA9890AUK
Package
Name
Description
Version
WLCSP49
wafer level chip-size package; 49 bumps; 3.37 x 2.97 mm
TFA9890AUK
TFA9890A_SDS
Product short data sheet
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Rev. 1 — 16 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
3 of 38
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
6. Block diagram
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Block diagram
TFA9890A_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
4 of 38
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
7. Pinning information
7.1 Pinning
1
2
3
4
5
6
bump A1
index area
7
G
2
3
4
5
6
7
A
F
B
E
C
D
D
C
E
B
F
A
G
bump A1
index area
010aaa782
010aaa783
a. Bottom view
Fig 2.
1
b. Transparent top view
Bump configuration
1
2
3
4
5
6
7
A
WS1
DATAI1
DATAO
INT
GNDD
OUTB
VDDP
B
BCK1
GNDD
DATAI3
RST
GNDP
GNDP
VDDP
C
DATAI2
GNDD
TEST4
TEST5
GNDD
OUTA
VDDP
D
WS2
GNDD
TEST3
TEST6
GNDD
n.c.
n.c.
E
BCK2
GNDD
TEST2
TEST7
GNDB
INB
BST
F
SDA
ADS1
ADS2
GNDD
GNDB
INB
BST
G
SCL
VBAT
VDDD
GNDD
GNDB
INB
BST
010aaa807
Transparent top view
Fig 3.
TFA9890A_SDS
Product short data sheet
Bump mapping
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Rev. 1 — 16 September 2014
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5 of 38
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
Table 3.
TFA9890A_SDS
Product short data sheet
Pinning
Symbol
Pin
Type
Description
WS1
A1
I
digital audio word select input 1
DATAI1
A2
I
digital audio data input 1
DATAO
A3
O
digital audio data output
INT
A4
O
interrupt output
GNDD
A5
P
digital ground
OUTB
A6
O
inverting output
VDDP
A7
P
power supply voltage
BCK1
B1
I
digital audio bit clock input 1
GNDD
B2
P
digital ground
DATAI3
B3
I
digital audio data input 3
RST
B4
I
reset input
GNDP
B5
P
power ground
GNDP
B6
P
power ground
VDDP
B7
P
power supply voltage
DATAI2
C1
I
digital audio data input 2
GNDD
C2
P
digital ground
TEST4
C3
O
test signal input 4; for test purposes only, connect to PCB ground
TEST5
C4
O
test signal input 5; for test purposes only, connect to PCB ground
GNDD
C5
P
digital ground
OUTA
C6
O
non-inverting output
VDDP
C7
P
power supply voltage
WS2
D1
I
digital audio word select input 2
GNDD
D2
P
digital ground
TEST3
D3
O
test signal input 3; for test purposes only, connect to PCB ground
TEST6
D4
O
test signal input 6; for test purposes only, connect to PCB ground
GNDD
D5
P
digital ground
n.c.
D6
-
not connected[1]
n.c.
D7
-
not connected[1]
BCK2
E1
I
digital audio bit clock input 2
GNDD
E2
P
digital ground
TEST2
E3
O
test signal input 2; for test purposes only, connect to PCB ground
TEST7
E4
O
test signal input 7; for test purposes only, connect to PCB ground
GNDB
E5
P
boosted ground
INB
E6
P
DC-to-DC boost converter input
BST
E7
O
boosted supply voltage output
SDA
F1
I/O
I2C-bus data input/output
ADS1
F2
I
address select input 1
ADS2
F3
I
address select input 2
GNDD
F4
P
digital ground
GNDB
F5
P
boosted ground
INB
F6
P
DC-to-DC boost converter input
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Rev. 1 — 16 September 2014
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6 of 38
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
Table 3.
Symbol
Pin
Type
Description
BST
F7
O
boosted supply voltage output
SCL
G1
I
I2C-bus clock input
VBAT
G2
P
battery supply voltage sense input
VDDD
G3
P
digital supply voltage
GNDD
G4
P
digital ground
GNDB
G5
P
boosted ground
INB
G6
P
DC-to-DC boost converter input
BST
G7
O
boosted supply voltage output
[1]
TFA9890A_SDS
Product short data sheet
Pinning …continued
Can be used to simplify routing to OUTA (see Figure 3).
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Rev. 1 — 16 September 2014
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7 of 38
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
8. Functional description
The TFA9890A is a highly efficient mono Bridge Tied Load (BTL) class-D audio amplifier
with a sophisticated SpeakerBoost protection algorithm. Figure 1 is a block diagram of the
TFA9890A.
It contains three I2S input interfaces and one I2S output interface. One of I2S inputs
DATAI1 and DATAI2 can be selected as the audio input stream. The third I2S input,
DATAI3, is provided to support stereo applications. A ‘pass-through’ option allows one of
the I2S input interfaces to be connected directly to the I2S output. The pass-through option
is provided to allow an I2S output slave device (e.g. a CODEC), connected in parallel with
the TFA9890A, to be routed directly to the audio host via the I2S output.
The I2S output signal on DATAO can be configured to transmit the DSP output signal,
amplifier output current information, DATAI3 Left or Right signal information or amplifier
gain information. The gain information can be used to facilitate communication between
two devices in stereo applications.
A SpeakerBoost protection algorithm, running on a CoolFlux Digital Signal Processor
(DSP) core, maximizes the acoustical output of the speaker while limiting membrane
excursion and voice coil temperature to a safe level. The mechanical protection
implemented guarantees that speaker membrane excursion never exceeds its rated limit,
to an accuracy of 10 %. Thermal protection guarantees that the voice coil temperature
never exceeds its rated limit, to an accuracy of 10 C. Furthermore, advanced signal
processing ensures that the audio quality is always acceptable.
The protection algorithm implements an adaptive loudspeaker model that is used to
predict the extent of membrane excursion. The model is continuously updated to ensure
that the protection scheme remains effective even when speaker parameter values
change or the acoustic enclosure is modified.
Output sound pressure levels are boosted within given mechanical, thermal and quality
limits. An optional Bandwidth extension mode extends the low frequency response up to a
predefined limit before maximizing the output level. This mode is suitable for listening to
high-quality music in quiet environments.
The frequency response of the TFA9890A can be modified via ten fully programmable
cascaded second-order biquad filters. The first two biquads are processed with 48-bit
double precision; biquads 3 to 8 are processed with 24-bit single precision.
At low battery voltage levels, the gain is automatically reduced to limit battery current. The
output volume can be controlled by the SpeakerBoost protection algorithm or by the host
application (external). In the latter case, the boost features of the SpeakerBoost protection
algorithm must be disabled to avoid neutralizing external volume control.
The SpeakerBoost protection algorithm output is converted into two pulse width
modulated (PWM) signals which are then injected into the class-D audio amplifier. The
3-level PWM scheme supports filterless speaker drive.
An adaptive DC-to-DC converter boosts the battery supply voltage in line with the output
of the SpeakerBoost protection algorithm. It switches to Follower mode (VBST = VBAT; no
boost) when the audio output voltage is lower than the battery voltage.
TFA9890A_SDS
Product short data sheet
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Rev. 1 — 16 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
8 of 38
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
8.1 Amplifier operating modes
The TFA9890A supports five operating modes:
• Power-down mode, with low supply current
• Operating mode, in which the amplifier is fully operational
• Mute mode, in which the class-D output is switching but the audio input signal is
suppressed
• Off mode, in which the device is biased, but the class-D output is floating
• Fault mode, when a protection mechanism (other than SpeakerBoost protection) has
been activated
8.1.1 Power-down mode
Power consumption is at a minimum in Power-down mode. The TFA9890A switches to
Power-down mode when:
• the reset input (pin RST) goes HIGH (all digital circuits, including the DSP and RAM
memory, are reset)
• VDDD is switched off (< 0.8 V), triggering a complete reset of the TFA9890A
• I2C control bit I2CR is set to 1 (only the I2C registers are reset, the DSP and RAM
remain configured)
• I2C control bit PWDN is set to 1 (the default setting, the TFA9890A is not reset when
PWDN is set to 1)
• there is no valid clock signal on I2S inputs BCK or WS (removing the I2S clock signals
does not cause the TFA9890A to be reset)
The I2C-bus remains operational in Power-down mode with the PWM outputs floating.
8.1.2 Operating mode
Operating mode is selected by applying a valid clock signal (see Section 8.3) to the WS
and BCK inputs.
In Operating mode, I2S data input 1 or 2 (DATAI1/DATAI2) is used as the audio input. By
default, the digital audio signal is processed in the CoolFlux DSP. The processed audio
signal is converted into a 3-level modulated PWM signal that is fed to the output terminals.
By default, the CoolFlux DSP protects the speaker in Operating mode. When the DSP is
bypassed, the I2S audio input is fed directly to the amplifier with fixed gain. The peak
output voltage is 8 V at 6 dBFS. If the input voltage is above this level, the output will clip
and the DC-to-DC converter output may be distorted.
Without speaker protection, a high output voltage can damage the speaker. To avoid
over-driving the speaker, it is advised only to bypass the DSP at reduced input levels and
not to use the boost converter (see Section 8.4) when the CoolFlux DSP is bypassed.
Remark: In Operating mode, the TFA9890A expects the same frequency on WS as was
selected via bits I2SSR in the I2S control register (i.e. the input sample rate).
TFA9890A_SDS
Product short data sheet
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Rev. 1 — 16 September 2014
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9 of 38
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
8.1.3 Mute mode
Soft muting is used to prevent audible pop noise. The transition from Operating mode to
Mute mode and from Mute mode to Operating mode is implemented using an exponential
function. The transition time is about 10 ms for a 48 kHz I2S input signal, and it scales with
the frequency of the input signal. The I2S signal must be stable during the transition time.
Mute mode is implemented in the CoolFlux DSP core and is only available when CoolFlux
is not bypassed.
8.1.4 Off mode
In off mode, the outputs of the class-D amplifier are floating and the device is fully biased.
The transition to Off mode can be direct, or can be combined with a soft mute (providing
the CoolFlux DSP is not bypassed; the I2S clock and WS signals must be stable when soft
mute is activated).
8.1.5 Fault mode
The TFA9890A switches to Fault mode when a protection mechanism is triggered. In
Fault mode, the class-D outputs are floating.
8.2 I2S interface and channel selection
I2S input interfaces 1 and 2 (DATAI1 and DATAI2) are multiplexed internally to the I2S
interface block (see Figure 1). I2C control bit ISEL is used to select the I2S interface. The
word select or bit clock signal of the selected I2S input can be used as the reference signal
for the I2S input interface, the I2S output interface and the Phased Locked Loop (PLL). To
prevent pop and click noise, the TFA9890A should be in Off mode when the value of ISEL
is changed.
Note that the PLL clock is used as a reference for the entire chip. Crosstalk to the I2S
clock must also be prevented in the application. Extreme clock jitter can affect the
reliability of speaker measurements.
The I2S output, DATAO, can be enabled (active) or disabled (floating). DATAO can also be
connected directly to DATAI1, DATAI2 or DATAI3 by selecting pass-through mode.
8.3 Interface formats
The I2S digital audio formats supported by the TFA9890A are listed in Table 4. The I2S
digital audio format for the input and output interface is selected via bits I2SF in the I2S
control register.
Table 4.
I2S-supported digital audio formats
Interface format (MSB first)
I2S
TFA9890A_SDS
Product short data sheet
(Philips) standard
Supported data format
BCK frequency
up to 16-bit
32fs
MSB-justified
up to 16-bit
32fs
LSB-justified - 16 bits
16-bit
32fs
I2S
up to 24-bit
48fs
(Philips) standard
MSB-justified
up to 24-bit
48fs
LSB-justified - 16 bits
16-bit
48fs
LSB-justified - 18 bits
18-bit
48fs
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
Table 4.
I2S-supported digital audio formats
Interface format (MSB first)
Supported data format
BCK frequency
LSB-justified - 20 bits
20-bit
48fs
LSB-justified - 24 bits
24-bit
48fs
I2S
up to 24-bit
64fs
(Philips) standard
MSB-justified
up to 24-bit
64fs
LSB-justified - 16 bits
16-bit
64fs
LSB-justified - 18 bits
18-bit
64fs
LSB-justified - 20 bits
20-bit
64fs
LSB-justified - 24 bits
24-bit
64fs
The TFA9890A supports nine I2S sample rates: 8 kHz, 11.025 kHz, 12 kHz, 16 kHz,
22.05 kHz, 24 kHz, 32 kHz, 44.1 kHz and 48 kHz. The I2S input sample rate is selected
via bits I2SSR in the I2S control register. To prevent pop and click noise, the TFA9890A
should be in Power-down mode when the sample rate is changed. The BCK frequency
(32, 48 or 64 times fs) is set automatically.
Remark: The sample rate on the input interface should always be in line with the sample
rate selected via I2SSR. The SpeakerBoost protection algorithm will not operate correctly
if they are different.
TFA9890A_SDS
Product short data sheet
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Rev. 1 — 16 September 2014
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11 of 38
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
RIGHT
LEFT
WS
1
2
3
1
2
3
MSB
B2
BCK
MSB
DATA
B2
MSB
I2S-BUS FORMAT
LEFT
WS
1
2
RIGHT
3
1
2
3
BCK
DATA
MSB
B2
LSB
MSB
B2
LSB
MSB
B2
MSB-JUSTIFIED FORMAT
WS
LEFT
RIGHT
16
1
16
B15 LSB
MSB
15
2
15
2
1
BCK
DATA
MSB
B2
B2
B15 LSB
LSB-JUSTIFIED FORMAT 16 BITS
WS
LEFT
RIGHT
18
17
16
1
18
B17 LSB
MSB
15
2
17
16
15
2
1
BCK
DATA
MSB
B2
B3
B4
B2
B3
B4
B17 LSB
LSB-JUSTIFIED FORMAT 18 BITS
WS
LEFT
20
RIGHT
19
18
17
16
1
20
B19 LSB
MSB
15
2
19
18
17
16
15
2
1
BCK
DATA
MSB
B2
B3
B4
B5
B6
B2
B3
B4
B5
B6
B19 LSB
LSB-JUSTIFIED FORMAT 20 BITS
WS
LEFT
24
23
22
21
20
RIGHT
19
18
17
16
15
2
1
24
B23 LSB
MSB
23
22
21
20
19
18
17
16
15
2
1
BCK
DATA
MSB
B2
B3
B4
B5
B6
B7
B8
B9
B10
B2
B3
B4
B5
B6
B7
B8
B9
B10
B23 LSB
010aaa458
LSB-JUSTIFIED FORMAT 24 BITS
Fig 4.
I2S-supported digital audio data formats
8.4 DC-to-DC converter
The DC-to-DC converter in the TFA9890A operates independently of the amplifier. It
features a feed-forward control function that lowers the ripple on the boosted output
voltage.
Four converter modes are supported:
• Disabled mode, when the class-D amplifier is supplied externally (not via the internal
DC-to-DC converter)
• Follower mode, when input INB is switched low-ohmic to VBST (no boost; VBST =
battery voltage).
• Boost mode, when the battery voltage is boosted
• Adaptive boost mode, when the DC-to-DC converter boosts the battery voltage in
line with the audio signal.
TFA9890A_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
12 of 38
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
8.5 Battery supply safeguard
The TFA9890A employs a safeguard mechanism to protect the connected battery. This
feature limits the TFA9890A current when the battery voltage falls below a programmable
safeguard threshold (default is 3.53 V). The battery voltage is sensed via pin VBAT.
8.6 Pulse width modulation controller
The PWM controller translates the digital input signal into a 3-level PWM output signal.
The PWM switching frequency depends on the sample rate.
Table 5.
PWM switching frequency of the class-D amplifier
Sample rate
fPWM
fs = 8, 16 or 32 kHz
256 kHz
fs = 11.025, 22.05 or 44.1 kHz
352.8 kHz
fs = 12, 24 or 48 kHz
384 kHz
8.7 Protection mechanisms
The following protection circuits are included in the TFA9890A:
•
•
•
•
•
OverTemperature Protection (OTP)
OverVoltage Protection (OVP)
UnderVoltage Protection (UVP)
OverCurrent Protection (OCP)
Invalid Data Protection (IDP)
The reaction of the device to fault conditions differs depending on the protection circuit
involved.
8.8 Amplifier transfer function
The transfer function from the CoolFlux DSP output (CFOUT) or directly from the I2S input
(CoolFlux DSP is bypassed) to the amplifier PWM outputs is:
V O = CF OUT 16 V [V]
(1)
The CFOUT or I2S signal is specified in a range from 1 to +1 (full scale dBFS).
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TFA9890A
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9.5 V boosted audio system with adaptive sound maximizer and
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9. Internal circuitry
Table 6.
Pin
Internal circuitry
Symbol
Equivalent circuit
C1, C4, D1, DATAI2, TEST5, WS2,
D3, E1, F2, TEST3, BCK2, ADS1,
F3
ADS2
C1, C4, D1,
D3, E1, F2,
F3
ESD
GNDD (E4)
010aaa788
A1, A2, A4,
B1, B3, E3,
G1
WS1, DATAI1, INT,
BCK1, DATAI3,
TEST2, SCL,
VDDP (B6)
ESD
A1, A2, A4,
B1, B3, E3,
G1
ESD
ESD
GNDP (B7)
GNDD (E4)
010aaa789
C3
TEST4
VDDD (E3)
ESD
C3
ESD
GNDD (E4)
010aaa790
D4
TEST6
'
(6'
*1'3%
DDD
E4
TEST7
(
(6'
*1'3(
DDD
F1
SDA
F1
ESD
GNDD (E4)
010aaa791
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
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Table 6.
Internal circuitry
Pin
Symbol
B4
RST
Equivalent circuit
%
Nȍ
(6'
*1''(
DDD
A3
DATAO
VDDD (E3)
A3
ESD
GNDD (E4)
GNDP (B7)
010aaa792
A6, C6
OUTB, OUTA
VDDP (B6)
A6, C6
GNDP (B7)
010aaa787
E6, F6, G6
INB
SENSE (E6)
E6, F6, G6
GNDB (D7)
010aaa793
A5, B2, B5,
B6, C2, C5,
D2, D5, E2,
E5, F4, F5,
G4, G5
GNDP, GNDB, GNDD
GNDD (A5, B2, C2, D2, D5, E2, F4, G4)
GNDP (B5, B6, C5)
GNDB (E5, F5, G5)
010aaa794
10. I2C-bus interface and register settings
The TFA9890A supports the 400 kHz I2C-bus microcontroller interface mode standard.
The I2C-bus is used to control the TFA9890A and to transmit and receive data. The
TFA9890A can only operate in I2C slave mode, as a slave receiver or as a slave
transmitter.
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
10.1 TFA9890A addressing
The TFA9890A is accessed via an 8-bit code (see Table 7). Bits 1 to 7 contain the device
address. Bit 0 (R/W) indicates whether a read (1) or a write (0) operation has been
requested. Four separate addresses are supported for stereo applications. Address
selection is via pins ADS1 and ADS2. The levels on pins ADS1 and ADS2 determine the
values of bits 1 and 2, respectively, of the device address, as detailed in Table 7. The
generic address is independent of pins ADS1 and ADS2.
Table 7.
TFA9890A_SDS
Product short data sheet
Address selection via pins ADS1 and ADS2
ADS2 pin
voltage (V)
ADS1 pin
voltage (V)
Address
Function
0
0
01101000
for write mode
01101001
for read mode
0
VDDD
01101010
for write mode
01101011
for read mode
for write mode
VDDD
0
01101100
01101101
for read mode
VDDD
VDDD
01101110
for write mode
01101111
for read mode
don’t care
don’t care
00011100 (generic address)
for write mode
don’t care
don’t care
00011101 (generic address)
for read mode
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
11. Limiting values
Table 8.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VBAT
battery supply voltage
on pin VBAT
0.3
+5.5
V
Vx
voltage on pin x
pin BST
0.3
+12
V
pins SDA and SCL
0.3
+3.6
V
pins DATAI1, WS1, BCK1, DATAI2, WS2,
BCK2, RST and test pins
0.3
+5.5
V
VDDP
power supply voltage
on pin VDDP
0.3
+12
V
VDDD
digital supply voltage
on pin VDDD
0.3
+1.95
V
Tj
junction temperature
-
+150
C
Tstg
storage temperature
55
+150
C
Tamb
ambient temperature
VESD
electrostatic discharge voltage
40
+85
C
according to Human Body Model (HBM)
2
+2
kV
according to Charge Device Model (CDM)
500
+500
V
Typ
Max Unit
43
-
12. Thermal characteristics
Table 9.
Thermal characteristics
Symbol Parameter
Rth(j-a)
Conditions
thermal resistance from junction to 4-layer application board positioned vertically in free
ambient
air; dimensions: 30 19 1.6 mm; natural convection;
copper coverage on each layer > 95 %; copper
thickness outer/inner layer 35 m
TFA9890A_SDS
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
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13. Characteristics
13.1 DC Characteristics
Table 10. DC characteristics
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; VDDP = VBST = 9.5 V, adaptive boost mode; LBST = 1 H[1];
RL = 8 [1]; LL = 40 H[1]; fi = 1 kHz; fs = 48 kHz; Tamb = 25 C; default settings, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VBAT
battery supply voltage
on pin VBAT
2.7
-
5.5
V
VINB
voltage on pin INB
boost converter input
2.7
-
5.5
V
IBAT
battery supply current
on pin VBAT
-
4
6
mA
IINB
current on pin INB
no output signal
-
1
5
A
maximum output signal
-
-
[2]
mA
VDDP
power supply voltage
on pin VDDP
3
-
9.5
V
VDDD
digital supply voltage
on pin VDDD
1.65
1.8
1.95
V
IDDD
digital supply current
on pin VDDD; Operating modes;
SpeakerBoost Protection activated
-
20
-
mA
on pin VDDD; Operating modes;
CoolFlux DSP bypassed
-
6
-
mA
on pin VDDD; Power-down mode;
BCK1 = WS1 = DATAI1 = BCK2 =
WS2 = DATAI2 = DATAI3 = 0 V
-
10
50
A
Pins BCK1, WS1, DATA1, BCK2, WS2, DATAI2, DATAI3, ADS1, ADS2, SCL, SDA, RST
VIH
HIGH-level input voltage
0.7VDDD -
3.6
V
VIL
LOW-level input voltage
-
-
0.3VDDD
V
-
-
3
pF
1.8 V on input pin
-
-
0.1
A
Cin
input capacitance
ILI
input leakage current
[3]
Pins DATAO, INT, push-pull output stages
VOH
HIGH-level output voltage
IOH = 4 mA
-
-
VDDD
0.4
V
VOL
LOW-level output voltage
IOL = 4 mA
-
-
400
mV
Pins SDA, open-drain outputs, external 10 k resistor to VDDD
VOH
HIGH-level output voltage
IOH = 4 mA
-
-
VDDD
0.4
V
VOL
LOW-level output voltage
IOL = 4 mA
-
-
400
mV
VDDP = 9.5 V
-
200
-
m
Pins OUTA, OUTB
RDSon
drain-source on-state
resistance
Protection
Tact(th_prot)
thermal protection activation
temperature
130
-
150
C
Vovp(VBAT)
overvoltage protection voltage
on pin VBAT
5.5
-
6.0
V
Vuvp(VBAT)
undervoltage protection
voltage on pin VBAT
2.3
-
2.5
V
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TFA9890A
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9.5 V boosted audio system with adaptive sound maximizer and
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Table 10. DC characteristics …continued
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; VDDP = VBST = 9.5 V, adaptive boost mode; LBST = 1 H[1];
RL = 8 [1]; LL = 40 H[1]; fi = 1 kHz; fs = 48 kHz; Tamb = 25 C; default settings, unless otherwise specified. …continued
Symbol
Parameter
IO(ocp)
overcurrent protection output
current
Conditions
Min
Typ
Max
Unit
2
-
-
A
9.4
9.5
9.6
V
DC-to-DC converter
VBST
voltage on pin BST
DCVO = 111; Boost mode
[1]
LBST = boost converter inductance; RL = load resistance; LL = load inductance (speaker).
[2]
Maximum value determined by the I2C setting.
[3]
This parameter is not tested during production; the value is guaranteed by design and checked during product validation.
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
13.2 AC characteristics
Table 11. AC characteristics
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; VDDP = VBST = 9.5 V, adaptive boost mode; LBST = 1 H[1];
RL = 8 [1]; LL = 40 H[1]; fi = 1 kHz; fs = 48 kHz; Tamb = 25 C; default settings, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RL = 8 ; fs = 48 kHz
-
3.6
-
W
RL = 8 ; fs = 32 kHz
-
3.7
-
W
RL = 8 ; fs = 48 kHz
-
4.5
-
W
RL = 8 ; fs = 32 kHz
-
4.6
-
W
-
-
6
mV
[2]
-
72
-
%
[1]
-
0.03
0.1
%
-
50
-
V
-
66
-
V
-
100
-
dB
-
97
-
dB
-
75
-
dB
256
-
384
kHz
-
16
-
V
-
-
2
ms
Amplifier output power
Po(RMS)
RMS output power
THD+N = 1 %; CLIP = 0
THD+N = 10 %; CLIP = 0
Amplifier output; pins OUTA and OUTB
VO(offset)
output offset voltage
absolute value
Amplifier performance
po
output power efficiency
THD+N
total harmonic distortion-plus-noise Po(RMS) = 100 mW; RL = 8 ; LL = 44 H
Vn(o)
output noise voltage
Po(RMS) = 2.5 W; including DC-to-DC
converter; 100 Hz audio signal
A-weighted; DATAI1 = DATAI2 = 0 V
CoolFlux DSP bypassed
[2]
CoolFlux DSP enabled
S/N
signal-to-noise ratio
VO = 4.5 V (peak); A-weighted
CoolFlux DSP bypassed
[2]
CoolFlux DSP enabled
PSRR
power supply rejection ratio
Vripple = 200 mV (RMS); fripple = 217 Hz
I2S
fsw
switching frequency
directly coupled to the
frequency
input
Vo
output voltage
CoolFlux DSP bypassed; 1 to +1 (full
scale dBFS) digital input
Amplifier power-up, power-down and propagation delays
td(on)
turn-on delay time
PLL locked on BCK (IPLL = 0)
fs = 8 kHz to 48 kHz
PLL locked on WS (IPLL = 1)
td(off)
turn-off delay time
td(mute_off)
mute off delay time
td(soft_mute)
soft mute delay time
td(pilot_off)
pilot off delay time
fs = 8 kHz
-
-
27
ms
fs = 48 kHz
-
-
6
ms
-
-
10
s
-
ms
after a soft mute; fs = 48 kHz
after a soft mute; fs = 32 kHz
TFA9890A_SDS
Product short data sheet
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-
1
[3]
-
12
-
ms
[3]
-
11
21
ms
-
16
32
ms
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
Table 11. AC characteristics
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; VDDP = VBST = 9.5 V, adaptive boost mode; LBST = 1 H[1];
RL = 8 [1]; LL = 40 H[1]; fi = 1 kHz; fs = 48 kHz; Tamb = 25 C; default settings, unless otherwise specified. …continued
Symbol
Parameter
Conditions
tPD
propagation delay
CoolFlux bypassed
Min
Typ
Max
Unit
fs = 8 kHz
-
-
3.2
ms
fs = 48 kHz
-
-
600
s
SpeakerBoost protection mode,
tLookAhead = 2 ms
fs = 8 kHz
-
-
14
ms
fs = 48 kHz
-
-
4
ms
-
75
-
dB
Current-sensing performance
S/N
signal-to-noise ratio
IO = 1.2 A (peak); A-weighted
Isense(acc)
sense current accuracy
IO = 0.5 A (peak)
B
bandwidth
LL
load inductance
[1]
[3]
3
-
+3
%
-
8
-
kHz
20
-
-
H
LBST = boost converter inductor; RL = load resistance; LL = load inductance (speaker).
[2]
This parameter is not tested during production; the value is guaranteed by design and checked during product validation.
[3]
The soft mute delay is the delay of the cosine role off of the audio. The pilot tone is removed at the zero crossing after a soft mute, with
a delay of td(pilot_off). This takes a maximum of 21 ms (average 11 ms) at an input sample rate of 12 kHz, 24 kHz or 48 kHz. At an input
sample rate of 8 kHz, 16 kHz or 32 kHz, the delay is 32 ms (max). So the worst case mute delay is 12 + 21 = 33 or 12 + 32 = 44 ms,
depending on the sample frequency.
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
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13.3 I2S timing characteristics
Table 12. I2S bus interface characteristics; see Figure 5
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; VDDP = VBST = 9.5 V, adaptive boost mode; LBST = 1 H[1];
RL = 8 [1]; LL = 40 H[1]; fi = 1 kHz; fs = 48 kHz; Tamb = 25 C; default settings, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fs
sampling frequency
on pin WS
[2]
8
-
48
kHz
fclk
clock frequency
on pin BCK
[2]
32fs
-
64fs
Hz
WS edge to BCK HIGH
[3]
10
-
-
ns
10
-
-
ns
10
-
-
ns
10
-
-
ns
set-up time
tsu
DATA edge to BCK HIGH
hold time
th
[3]
BCK HIGH to WS edge
BCK HIGH to DATA edge
[1]
LBST = boost converter inductance; RL = load resistance; LL = load inductance.
[2]
The I2S bit clock input (BCK) is used as a clock input for the DSP, as well as for the amplifier and the DC-to-DC converter. Both the BCK
and WS signals must be present for the clock to operate correctly.
[3]
This parameter is not tested during production; the value is guaranteed by design and checked during product validation.
BCK
th
tsu
WS
DATA
010aaa750
Fig 5.
TFA9890A_SDS
Product short data sheet
I2S timing
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
13.4 I2C timing characteristics
Table 13. I2C-bus interface characteristics; see Figure 6
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; VDDP = VBST = 9.5 V, adaptive boost mode; LBST = 1 H[1];
RL = 8 [1]; LL = 40 H[1]; fi = 1 kHz; fs = 48 kHz; Tamb = 25 C; default settings, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSCL
tLOW
SCL clock frequency
-
-
400
kHz
LOW period of the SCL clock
1.3
-
-
s
tHIGH
HIGH period of the SCL clock
rise time
tr
0.6
-
-
s
SDA and SCL signals
[2]
20 + 0.1 Cb
-
-
ns
SDA and SCL signals
[2]
20 + 0.1 Cb
-
-
ns
[3]
0.6
-
-
s
0.6
-
-
s
tf
fall time
tHD;STA
hold time (repeated) START condition
tSU;STA
set-up time for a repeated START
condition
tSU;STO
set-up time for STOP condition
0.6
-
-
s
tBUF
bus free time between a STOP and
START condition
1.3
-
-
s
tSU;DAT
data set-up time
100
-
-
ns
0
-
-
s
0
-
50
ns
-
-
400
pF
tHD;DAT
data hold time
tSP
pulse width of spikes that must be
suppressed by the input filter
Cb
capacitive load for each bus line
[4]
[1]
LBST = boost converter inductance; RL = load resistance; LL = load inductance.
[2]
Cb is the total capacitance of one bus line in pF. The maximum capacitive load for each bus line is 400 pF.
[3]
After this period, the first clock pulse is generated.
[4]
To be suppressed by the input filter.
SDA
tLOW
tBUF
tr
tf
tHD;STA
tSP
SCL
tHD;STA
P
tHD;DAT
tHIGH
tSU;DAT
S
tSU;STA
Sr
tSU;STO
P
010aaa225
Fig 6.
I2C timing
14. Application information
14.1 External components
Figure 7 shows the minimum number of external components needed in an application.
The DC-to-DC converter needs a battery supply voltage capacitor (CVBAT), an output
capacitor (CVDDP) and an inductor (LBST) to work properly. The nominal values of these
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TFA9890A
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9.5 V boosted audio system with adaptive sound maximizer and
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components are 10 nF, 20 F and 1 H, respectively. A 100 nF decoupling capacitor
(CVDDD) must be connected close to the VDDD pin. The total capacitance at this supply line
should be at least 1 F.
14.1.1 DC-to-DC converter output capacitor
A ceramic capacitor is required at the output of the DC-to-DC converter (CVDDP).
Capacitors constructed using X5R (55 C to +85 C) or X7R (55 C to +125 C)
dielectric materials are preferred because they are compact, feature low ESR and are
sufficiently stable over a wide temperature range. The capacitance value decreases over
the DC biasing voltage range (30 % to 70 % decrease). Consequently, the nominal value
of the capacitor should be close to twice the minimum value specified.
Remark: The DC-to-DC converter capacitor connected to BST is critical for stability. The
recommended effective value (the capacitance value at the maximum boost voltage) of
CVDDP depends on the coil inductance, and is given in Table 14. The position of the
capacitor and the layout of the board are also critical. It is recommended to connect CVDDP
as close as possible to the BST and GNDD pins without vias in the PCB tracks.
In many applications, it is desirable to limit the height of components as much as possible.
This can be achieved for CVDDP by connecting two smaller capacitors in parallel. The
rated voltage should be 10 V or higher.
Table 14.
Suggested effective value for DC-to-DC converter output capacitor (CVDDP)
Effective coil value (at maximum current)
Minimum effective capacitance (at the boost
voltage)
1 H
6 F
14.1.2 Supply capacitor
CBST can be about half the value of CVDDP.
14.1.3 DC-to-DC converter inductor
An inductor is required at the output of the DC-to-DC converter (LBST). For stability, the
inductance of the coil should remain above 0.7 H and below 1.2 H under all conditions.
A DC-to-DC coil value of 1 H or less is strongly recommended. If the coil value is
increased, the value of the output capacitor will also need to be increased by at least the
same factor. If the output capacitor is not large enough, the DC-to-DC converter will be
unstable. The positioning of the output capacitor on the PCB is also critical. The capacitor
must be located as close as possible to the TFA9890A and the connections between them
should be on the top layer. A nominal value of 1 H provides the optimum balance
between current capability, component size and efficiency.
The choice of inductor is strongly influenced by the impedance of the speaker used in the
application. The speaker impedance determines the output current of the DC-to-DC
converter. The minimum required battery voltage, the boost voltage and the inductor value
determine the peak inductor current (ILM).
14.1.4 Reset pin (RST)
If the reset pin is not used, it is advised to connect it directly to ground. It has an internal
pull-down resistance of 100 k.
TFA9890A_SDS
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
14.2 Application diagrams
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TFA9890A_SDS
Product short data sheet
Typical mono application (simplified)
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
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TFA9890A_SDS
Product short data sheet
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
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9.5 V boosted audio system with adaptive sound maximizer and
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14.3 Curves measured in reference design (demonstration board)
All measurements were taken with VBAT = 3.6 V; VDDD = 1.8 V; VDDP = VBST = 9.5 V;
LBST = 1 H; RL = 8 ; LL = 20 H; fi = 1 kHz; fs = 48 kHz; Tamb = 25 C; CoolFlux DSP
bypassed; default settings, unless otherwise specified.
010aaa825
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(1) Po = 100 mW
(2) fi = 1 kHz.
(2) Po = 500 mW
103
104
fi (Hz)
105
(3) fi = 100 Hz.
Fig 10. THD plus noise as a function of output power
010aaa833
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Fig 11. THD plus noise as a function of frequency
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40
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0
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10-2
10-1
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Fig 12. Power dissipation as a function of output
power
TFA9890A_SDS
Product short data sheet
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η
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2
3
4
Po (W)
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fi = 100 Hz, intelligent boost mode, DSP bypassed
Fig 13. Efficiency as a function of output power
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
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(2) THD+N = 1 %, no boost (Follower mode)
(3) THD+N = 10 %, boost on
(4) THD+N = 1 %, boost on
Fig 14. Normalized gain as a function of frequency
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input signal is a sine wave; fi = 100 Hz
a. fast ramp-up
b. immediate ramp-up
Fig 16. DC-to-DC converter ramp-up behavior
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NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
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010aaa832
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-50
-70
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10
103
104
fripple (Hz)
105
Vripple = 200 mV(RMS) on VBAT
Fig 17. PSRR as a function of ripple frequency
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9.5 V boosted audio system with adaptive sound maximizer and
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15. Package outline
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9.5 V boosted audio system with adaptive sound maximizer and
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16. Soldering of WLCSP packages
16.1 Introduction to soldering WLCSP packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note
AN10439 “Wafer Level Chip Scale Package” and in application note AN10365 “Surface
mount reflow soldering description”.
Wave soldering is not suitable for this package.
All NXP WLCSP packages are lead-free.
16.2 Board mounting
Board mounting of a WLCSP requires several steps:
1. Solder paste printing on the PCB
2. Component placement with a pick and place machine
3. The reflow soldering itself
16.3 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 19) than a SnPb process, thus
reducing the process window
• Solder paste printing issues, such as smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature), and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic) while being low enough that the packages and/or boards are not
damaged. The peak temperature of the package depends on package thickness and
volume and is classified in accordance with Table 15.
Table 15.
Lead-free process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 19.
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9.5 V boosted audio system with adaptive sound maximizer and
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maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 19. Temperature profiles for large and small components
For further information on temperature profiles, refer to application note AN10365
“Surface mount reflow soldering description”.
16.3.1 Stand off
The stand off between the substrate and the chip is determined by:
• The amount of printed solder on the substrate
• The size of the solder land on the substrate
• The bump height on the chip
The higher the stand off, the better the stresses are released due to TEC (Thermal
Expansion Coefficient) differences between substrate and chip.
16.3.2 Quality of solder joint
A flip-chip joint is considered to be a good joint when the entire solder land has been
wetted by the solder from the bump. The surface of the joint should be smooth and the
shape symmetrical. The soldered joints on a chip should be uniform. Voids in the bumps
after reflow can occur during the reflow process in bumps with high ratio of bump diameter
to bump height, i.e. low bumps with large diameter. No failures have been found to be
related to these voids. Solder joint inspection after reflow can be done with X-ray to
monitor defects such as bridging, open circuits and voids.
16.3.3 Rework
In general, rework is not recommended. By rework we mean the process of removing the
chip from the substrate and replacing it with a new chip. If a chip is removed from the
substrate, most solder balls of the chip will be damaged. In that case it is recommended
not to re-use the chip again.
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9.5 V boosted audio system with adaptive sound maximizer and
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Device removal can be done when the substrate is heated until it is certain that all solder
joints are molten. The chip can then be carefully removed from the substrate without
damaging the tracks and solder lands on the substrate. Removing the device must be
done using plastic tweezers, because metal tweezers can damage the silicon. The
surface of the substrate should be carefully cleaned and all solder and flux residues
and/or underfill removed. When a new chip is placed on the substrate, use the flux
process instead of solder on the solder lands. Apply flux on the bumps at the chip side as
well as on the solder pads on the substrate. Place and align the new chip while viewing
with a microscope. To reflow the solder, use the solder profile shown in application note
AN10365 “Surface mount reflow soldering description”.
16.3.4 Cleaning
Cleaning can be done after reflow soldering.
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9.5 V boosted audio system with adaptive sound maximizer and
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17. Revision history
Table 16.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TFA9890A_SDS v.1
20140916
Product short data sheet
-
-
TFA9890A_SDS
Product short data sheet
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NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
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18. Legal information
18.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
18.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
TFA9890A_SDS
Product short data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 September 2014
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TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
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Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I2C-bus — logo is a trademark of NXP Semiconductors N.V.
CoolFlux — is a trademark of NXP Semiconductors N.V.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
TFA9890A_SDS
Product short data sheet
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37 of 38
TFA9890A
NXP Semiconductors
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
20. Contents
1
2
3
4
5
6
7
7.1
8
8.1
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
8.2
8.3
8.4
8.5
8.6
8.7
8.8
9
10
10.1
11
12
13
13.1
13.2
13.3
13.4
14
14.1
14.1.1
14.1.2
14.1.3
14.1.4
14.2
14.3
15
16
16.1
16.2
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 2
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Quick reference data . . . . . . . . . . . . . . . . . . . . . 3
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . . 8
Amplifier operating modes . . . . . . . . . . . . . . . . 9
Power-down mode . . . . . . . . . . . . . . . . . . . . . . 9
Operating mode . . . . . . . . . . . . . . . . . . . . . . . . 9
Mute mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Fault mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
I2S interface and channel selection . . . . . . . . 10
Interface formats. . . . . . . . . . . . . . . . . . . . . . . 10
DC-to-DC converter . . . . . . . . . . . . . . . . . . . . 12
Battery supply safeguard . . . . . . . . . . . . . . . . 13
Pulse width modulation controller . . . . . . . . . . 13
Protection mechanisms . . . . . . . . . . . . . . . . . 13
Amplifier transfer function . . . . . . . . . . . . . . . . 13
Internal circuitry. . . . . . . . . . . . . . . . . . . . . . . . 14
I2C-bus interface and register settings . . . . . 15
TFA9890A addressing . . . . . . . . . . . . . . . . . . 16
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal characteristics . . . . . . . . . . . . . . . . . 17
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 18
DC Characteristics . . . . . . . . . . . . . . . . . . . . . 18
AC characteristics. . . . . . . . . . . . . . . . . . . . . . 20
I2S timing characteristics . . . . . . . . . . . . . . . . 22
I2C timing characteristics . . . . . . . . . . . . . . . . 23
Application information. . . . . . . . . . . . . . . . . . 23
External components . . . . . . . . . . . . . . . . . . . 23
DC-to-DC converter output capacitor . . . . . . . 24
Supply capacitor . . . . . . . . . . . . . . . . . . . . . . 24
DC-to-DC converter inductor . . . . . . . . . . . . . 24
Reset pin (RST) . . . . . . . . . . . . . . . . . . . . . . . 24
Application diagrams . . . . . . . . . . . . . . . . . . . 25
Curves measured in reference design
(demonstration board) . . . . . . . . . . . . . . . . . . 28
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 31
Soldering of WLCSP packages. . . . . . . . . . . . 32
Introduction to soldering WLCSP packages . . 32
Board mounting . . . . . . . . . . . . . . . . . . . . . . . 32
16.3
16.3.1
16.3.2
16.3.3
16.3.4
17
18
18.1
18.2
18.3
18.4
19
20
Reflow soldering . . . . . . . . . . . . . . . . . . . . . .
Stand off . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Quality of solder joint . . . . . . . . . . . . . . . . . . .
Rework. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cleaning. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Revision history . . . . . . . . . . . . . . . . . . . . . . .
Legal information . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information . . . . . . . . . . . . . . . . . . . .
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
32
33
33
33
34
35
36
36
36
36
37
37
38
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2014.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 16 September 2014
Document identifier: TFA9890A_SDS