Comparing Toshiba TC58BVG0S3H with Macronix MX30LF1GE8AB

APPLICATION NOTE
Comparing Toshiba® TC58BVG0S3H with Macronix MX30LF1GE8AB
1. Introduction
This application note is a guide for migrating to the Macronix MX30LF1GE8AB from the Toshiba
TC58BVG0S3H 1Gb, 3V, Internal ECC NAND flash memory.
The document does not provide detailed information on the individual devices, but highlights the
major similarities and differences between them. The comparison covers the general features,
performance, command codes and other differences.
The information in this document is based on datasheets listed in Section 11. Newer versions of the
datasheets may override the contents of this document.
2. Features
Both flash device families have similar features and functions as shown in Table 2-1.
Table 2-1: Feature Comparison
Feature
Macronix MX30LF1GE8AB
Vcc Voltage Range
2.7V ~ 3.6V
Bus Width
x8
Operating Temperature
-40°C ~ 85°C
Interface
ONFI 1.0 Standard
Block Size
128KB+4KB
Page Size
2KB+64B
Internal ECC Capability
4b/528B
OTP Size
30 pages
Guaranteed Good Blocks at
Block 0
Shipping
Unique ID
ONFI standard
First Command
ID Code
C2h/F1h/80h/95h/82h
ONFI Signature
4Fh/4Eh/46h/49h
Data Retention
10 Years
Package
P/N: AN0369
48-TSOP (12x20mm)
1
Toshiba TC58BVG0S3H
2.7V ~ 3.6V
x8
-40°C ~ 85°C
128KB+4KB
2KB+64B
8b/528B
Block 0
Reset (FFh)
98h/F1h/80h/15h/F2h
48-TSOP (12x20mm)
63-VFBGA (9x11mm)
Ver.1, Jan.28, 2015
APPLICATION NOTE
Comparing Toshiba® TC58BVG0S3H with Macronix MX30LF1GE8AB
3. Performance
Table 3-1 and Table 3-2 show MX30LF1GE8AB and TC58BVG0S3H Read/Write performance.
Table 3-1: Read Performance (Read Latency and Sequential Read)
Read function
Macronix MX30LF1GE8AB
Toshiba TC58BVG0S3H
Read Latency time (tR_ECC)
45us (typ.) / 70us (max.)
40us (typ.) / 120us (max.)
Sequential Read time (tRC)
20ns (min.)
25ns (min.)
Table 3-2: Write Performance (Program and Erase)
Write Function
Macronix MX30LF1GE8AB
Page Program time (tPROG_ECC)
320us (typ.) / 600us (max.)
Block Erase time (tERASE)
1ms (typ.) / 3.5ms (max.)
NOP
4 (max.)
1
Write/Erase Cycles* (Endurance)
100,000
Toshiba TC58BVG0S3H
330us (typ.) / 700us (max.)
2.5ms (typ.) / 5ms (max.)
4 (max.)
-
Note: 100K Endurance cycle with ECC protection.
4. DC Characteristics
Read/Write power requirements (Table 4-1) and I/O voltage limits (Table 4-2) are similar.
Table 4-1: Read / Write Current
DC Characteristic
Sequential Read Current (ICC1)
Program Current (ICC2)
Erase Current (ICC3)
Standby Current – CMOS
Macronix MX30LF1GE8AB
20mA (typ.) / 30mA (max.)
20mA (typ.) / 30mA (max.)
15mA (typ.) / 30mA (max.)
10uA (typ.) / 50uA (max.)
Toshiba TC58BVG0S3H
30mA (max.)
30mA (max.)
30mA (max.)
50uA (max.)
Table 4-2: Input / Output Voltage
DC Characteristic
Input Low Voltage (VIL)
Input High Voltage (VIH)
Output Low Voltage (VOL)
Output High Voltage (VOH)
P/N: AN0369
Macronix MX30LF1GE8AB
-0.3V (min.) / 0.2VCC (max.)
0.8VCC (min.) / VCC+0.3V (max.)
0.2V (max.)
VCC-0.2 (min.)
2
Toshiba TC58BVG0S3H
-0.3V (min.) / 0.2Vcc (max.)
0.8Vcc (min.) / Vcc+0.3V (max.)
0.2V (max.)
Vcc-0.2 (min.)
Ver.1, Jan.28, 2015
APPLICATION NOTE
Comparing Toshiba® TC58BVG0S3H with Macronix MX30LF1GE8AB
5. Package Pin Definition
Package physical dimensions are similar to each other. For detailed information, please refer to the
individual datasheets. Table 5-1 contains the differences in pin assignments between the Macronix
and Toshiba devices TC58BVG0S3H can be compared by the MX30LF1GE8AB without pin
conflicts. Only 48-TSOP pin #38 may need special attention because the pin is designated as DNU
on the MX30LF1GE8AB-TI, but TC58BVG0S3HTAI0 is designated as NC.
Figure 5-1: 48-TSOP (12x20mm) Package and Pin Layout Comparison
NC
NC
NC
NC
NC
NC
R/B#
RE#
CE#
NC
NC
VCC
VSS
NC
NC
CLE
ALE
WE#
WP#
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
MX30LF1GE8AB
VSS*1
NC
NC
NC
IO7
IO6
IO5
IO4
NC
VCC*1
DNU
VCC
VSS
NC
VCC*1
NC
IO3
IO2
IO1
IO0
NC
NC
NC
VSS*1
NC
NC
NC
NC
NC
NC
R/B#
RE#
CE#
NC
NC
VCC
VSS
NC
NC
CLE
ALE
WE#
WP#
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
TC58BVG0S3H
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
NC
NC
NC
NC
I/O7
I/O6
I/O5
I/O4
NC
NC
NC
VCC
VSS
NC
NC
NC
I/O3
I/O2
I/O1
IO0
NC
NC
NC
NC
Pin38: DNU
Note:
1. These pins might not be connected internally. However it is recommended to connect
these pins to power(or ground) as designated for ONFI compatibility.
Table 5-1: 48-TSOP Package Pin Definition
Brand
Macronix
Toshiba
Part Name
MX30LF1GE8AB-TI
TC58BVG0S3HTAI0
DNU*1
NC*1
Pins #25, #48
VSS
NC
Pins #34, #39
VCC
NC
Pin #38
Note
If pins are left unconnected, both pin
functions are compatible
Macronix pins 25 and 48 are not
bonded internally and can be left
unconnected.
Macronix pins 34 and 39 are not
bonded internally and can be left
unconnected.
Note 1: NC = Not Connected; DNU = Do Not Use
P/N: AN0369
3
Ver.1, Jan.28, 2015
APPLICATION NOTE
Comparing Toshiba® TC58BVG0S3H with Macronix MX30LF1GE8AB
6. Command Set
6-1 Basic Commands
Basic command sets and status checking methods are similar.
The Read and Write operation commands are similar. (Table 6-1).
Table 6-1: Command Table
Command
Serial Data Input
Random Data Input
Random Data Output
Page Read
Read ID
Reset
Page Program
Cache Program
Block Erase
Read Status
ECC Status Read
Read Parameter Pg.
Unique ID Read
Set Feature
Get Feature
P/N: AN0369
Macronix
MX30LF1GE8AB
1st Cycle
2nd Cycle
85h
05h
E0h
00h
30h
90h
FFh
80h
10h
80h
15h
60h
D0h
70h
ECh
EDh
EFh
EEh
-
4
Toshiba TC58BVG0S3H
1st Cycle
80h
85h
05h
00h
90h
FFh
80h
60h
70h
7Ah
-
2nd Cycle
E0h
30h
10h
D0h
-
Ver.1, Jan.28, 2015
APPLICATION NOTE
Comparing Toshiba® TC58BVG0S3H with Macronix MX30LF1GE8AB
6-2 Status Register
When a Read, Program, or Erase operation is in progress, either the “Ready/Busy# Pin Checking”
or “Status Output Checking” method may be used to monitor the operation. Both are standard
NAND flash algorithms and can be used for both device families. Table 6-3 compares the Status
Output provided by the Read Status command (70h).
Macronix and Toshiba report ECC correction status in the Status Register, but bit usage and
definitions are slightly different. Macronix uses SR[3] and SR[4] in combination with SR[0] to show
detailed ECC correction status, so that user can decide when to rewrite data. Table 6-4 shows the
meaning of each combination result.
Toshiba provides an ECC Status Read function (7Ah command) to check ECC correction status.
ECC Status Register, SR[0]~SR[3] indicate the correction status, and SR[4]~SR[7] indicate the
sector information. Table 6-5 and Table 6-6 show the meaning of each combination result.
Table 6-3: Status Output
Status Bit
Macronix MX30LF1GE8AB
SR[0]
SR[1]
SR[2]
SR[3]
SR[4]
SR[5]
SR[6]
SR[7]
Chip PGM/ERS/READ status: Pass/Fail
Cache Program status: Pass/Fail
Reserved
Internal ECC Status*1
Internal ECC Status*1
PGM/ERS/Read internal controller:
Ready/Busy
PGM/ERS/Read status: Ready/Busy
Write Protect
Toshiba TC58BVG0S3H
Chip PGM/ERS/READ status: Pass/Fail
Reserved
Reserved
Rewrite Recommended
Reserved
PGM/ERS/Read status: Ready/Busy
PGM/ERS/Read status: Ready/Busy
Write Protect
Note: For Macronix internal ECC status, refer to Table 6-4.
Table 6-4: Macronix Internal ECC Bits Status
SR bits and value
SR[4]
SR[3]
SR[0]
0
0
1
0
0
0
1
0
0
0
1
0
1
1
0
P/N: AN0369
Status of ECC correction
Uncorrectable
0 or 1-bit error corrected
2-bit error corrected
3-bit error corrected
4-bit error corrected
5
Ver.1, Jan.28, 2015
APPLICATION NOTE
Comparing Toshiba® TC58BVG0S3H with Macronix MX30LF1GE8AB
Table 6-5: Toshiba Internal ECC Bits Status
ECC_SR bits and value
SR[3]
SR[2]
SR[1]
SR[0]
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
1
1
1
Status of ECC correction
No Error
1-bit error and correctable
2-bit error and correctable
3-bit error and correctable
4-bit error and correctable
5-bit error and correctable
6-bit error and correctable
7-bit error and correctable
8-bit error and correctable
Uncorrectable
Table 6-6: Toshiba Sector information Bits Status for ECC
ECC_SR bits and value
Sector Information
SR[7]
SR[6]
SR[5]
SR[4]
0
0
0
0
1st Sector (Main and Spare area)
0
0
0
1
2nd Sector (Main and Spare area)
0
0
1
0
3rd Sector (Main and Spare area)
0
0
1
1
4th Sector (Main and Spare area)
Other
Reserved
P/N: AN0369
6
Ver.1, Jan.28, 2015
APPLICATION NOTE
Comparing Toshiba® TC58BVG0S3H with Macronix MX30LF1GE8AB
7. Read ID Command
The ID of the Macronix MX30LF1GE8AB begins with a one-byte Manufacturer Code followed by a
four-byte Device ID. While the same command set is used to read the Manufacturer ID, Device ID,
and flash structure, the IDs are different, allowing software to identify the device manufacturer and
device type (Table 7-1).
Table 7-1: Manufacturer and Device IDs
ID code
Value
1st Byte
2nd Byte
IO1, IO0
IO3, IO2
3rd
Byte
IO5, IO4
IO6
4th
Byte
5th
Byte
IO7
IO1, IO0
IO2
IO7, IO3
IO5, IO4
IO6
IO1, IO0
IO3, IO2
IO6~IO4
IO7
P/N: AN0369
Macronix MX30LF1GE8AB
Toshiba TC58BVG0S3H
C2h/F1h/80h/95h/82h
98h/F1h/80h/15h/F2h
Manufacturer Code
Device Identifier
Number of Die per Chip Enable
Cell Structure
Number of Simultaneously
Programmed Pages
Interleaved Programming
Between Multiple Chips
Cache Program
Page Size (excluding Spare Area)
Spare Area Size
Sequential Read Cycle Time (tRC)
Block Size (excluding Spare Area)
Organization
ECC Level Requirement
Number of Planes per CE
Plane Size
Internal ECC Enabled/Disabled
Manufacturer Code
Device Identifier
Number of Die per Chip Enable
Cell Structure
7
Reserved
Reserved
Reserved
Page Size (excluding Spare Area)
Reserved
Reserved
Block Size (exclude Spare Area)
Organization
Reserved
Number of Planes per CE
Reserved
Internal ECC Enabled/Disabled
Ver.1, Jan.28, 2015
APPLICATION NOTE
Comparing Toshiba® TC58BVG0S3H with Macronix MX30LF1GE8AB
8. Internal ECC Function
8-1 Enabling Internal ECC
Macronix and Toshiba provide Internal ECC functions which generate ECC code internally when
programming data into the memory array. The Internal ECC function is always enabled in both
devices.
8-2 Internal ECC Protected Areas
Macronix provides 4-bit ECC correction and Toshiba® provides 8-bit ECC correction. Table 8-1
shows the areas protected by the Internal ECC function. Each spare area is associated with its
corresponding main array area. For example, Spare Area 0 is associated with Main Array 0 only.
Both the Macronix and Toshiba® devices have a maximum NOP (Number of Partial-Page)
programming limitation of 4, so the user needs to program the main array and corresponding spare
area together during a single programming operation.
Table 8-1: Internal ECC Protection Area
Main Array (2KB)
Device
Main 0
MX30LF1GE8AB
TC58BVG0S3H
P/N: AN0369
Main 1
Main 2
Main 3
512B 512B 512B 512B
512B 512B 512B 512B
8
Spare Area (64B)
Spare 0
Spare 1
Spare 2
Spare 3
16B
16B
16B
16B
16B
16B
16B
16B
Ver.1, Jan.28, 2015
APPLICATION NOTE
Comparing Toshiba® TC58BVG0S3H with Macronix MX30LF1GE8AB
9. Power-Up Timing
Macronix and Toshiba power-up sequences are similar, but the timing is slightly different. Although
both devices use 2.7V (VCC min.) as the start point, measurement items are different. Check the
system timing to determine if adjustments are needed.
Table 9-1: Power-Up Timing
H/W Timing Characteristic
Vcc (min.) to WE# low
Vcc (min.) to R/B# high
Vcc (min.) to R/B# low
Macronix MX30LF1GE8AB
1ms (max.)*1
N/A
10us (max.)
Toshiba TC58BVG0S3H
N/A
1ms (max.)
100us (max.)
Note: Macronix requires an initialization delay during power on.
Vcc(min.)
VCC
WE#
R/B#
Figure 9-1: Power-Up Timing
10. Summary
The Macronix MX30LF1GE8AB and Toshiba TC58BVG0S3H NAND have similar features and
pinouts. While basic Read, Program, and Erase commands are the same, more advanced features
such as Internal ECC status bits differ slightly. Overall, device migration may require minimal
software modifications.
P/N: AN0369
9
Ver.1, Jan.28, 2015
APPLICATION NOTE
Comparing Toshiba® TC58BVG0S3H with Macronix MX30LF1GE8AB
11. Reference
Table 11-1 shows the datasheet versions used for comparison in this application note.
For the most current, detailed Macronix specification, please refer to the Macronix
website at http://www.macronix.com
Table 11-1: Datasheet Version
Datasheet
Location
Date Issue
Revision
MX30LF1GE8AB
TC58BVG0S3H
Website
Website
Sept. 2014
Aug. 2012
Rev. 0.03
Rev. 1.00
Note: Macronix data sheet is subject to change without notice.
12. Appendix
Cross Reference Table 12-1 shows basic part number and package information for the Macronix
MX30LF1GE8AB and Toshiba TC58BVG0S3H.
Table 12-1: Part Number Cross Reference
Density Macronix Part No.
Toshiba Part No.
1Gb
MX30LF1GE8AB-TI
TC58BVG0S3HTAI0
Package
48-TSOP
Dimension
12x20mm
13. Revision History
Revision
1.0
P/N: AN0369
Description
Initial Release
10
Date
Jan. 28 , 2015
Ver.1, Jan.28, 2015
APPLICATION NOTE
Comparing Toshiba® TC58BVG0S3H with Macronix MX30LF1GE8AB
Except for customized products which have been expressly identified in the applicable agreement,
Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial,
personal, and/or household applications only, and not for use in any applications which may, directly or
indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are
used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said
Macronix's product qualified for its actual use in accordance with the applicable laws and regulations; and
Macronix as well as it’s suppliers and/or distributors shall be released from any and all liability arisen
therefrom.
Copyright© Macronix International Co., Ltd. 2015. All rights reserved, including the trademarks and
tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit,
NBiit, Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC,
Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich Au-dio, Rich Book, Rich TV, and FitCAM. The
names and brands of third party referred thereto (if any) are for identification purposes only.
For the contact and order information, please visit Macronix’s Web site at: http://www.macronix.com
P/N: AN0369
11
Ver.1, Jan.28, 2015
Similar pages