APPLICATION NOTE Comparing Micron MT25QL01GB with Macronix MX66L1G45G 1. Introduction This application note serves as a guide to compare Micron MT25QL01GB with Macronix MX66L1G45G 3V 1Gb serial NOR flash. The document does not provide detailed information on each individual device,but highlights the similarities and differences between them. The comparison covers the general features, performance, command codes, and other differences. If common features are used in standard traditional modes, they may need only minimal software modification. Minor pinout and timing differences are reviewed as well. The information provided in this document is based on datasheets listed in Section 9. Newer versions of the datasheets may override the contents of this document. 2. Features Both flash device families have similar features and functions as shown in Table 2-1 and 2-2. Table 2-1: Feature Comparison Type / Function Macronix MX66L1G45G Micron MT25QL01GB VCC Voltage Range 2.7V-3.6V 2.7V-3.6V Normal Read Clock Frequency 66MHz 54MHz (1) Maximum STR Clock Frequency 166MHz 133MHz Maximum DTR Clock Frequency 83MHz 66MHz Configurable Dummy Cycles YES YES Sector Size 4KB/32KB/64KB 4KB/32KB/64KB Program Buffer Size 256Byte 256Byte Security OTP 512Byte 64Byte (3) XIP / Performance Enhanced Mode YES YES (3) XIP / Performance Enhanced Mode Set at Power-on YES YES Program/Erase Suspend & Resume YES YES Wrap Around Read Mode YES YES Adjustable Output Driver YES YES Deep Power Down YES YES S/W Reset Command YES YES HOLD#/RESET# Pin Reset# Hold#/Reset# Block Protection Mode (BP bits) Top/Bottom Top/Bottom (2) Individual Sector Protection (Volatile) YES YES Program/Erase Cycles 100K 100K Notes: 1. Maximum clock frequency with default dummy cycles shown in Table 2-2. 2. Please see App Note section 4-4 for detailed comparison of Individual Sector Protection. 3. Macronix supports 1-4-4 and 4-4-4 mode XIP; Micron supports XIP in all fast read modes. P/N: AN0283 1 Ver.2, Jan.20, 2014 Macronix Proprietary APPLICATION NOTE Comparing Micron MT25QL01GB with Macronix MX66L1G45G Both devices support Double Transfer Rate (DTR) mode. While the Micron device supports DTR use with all Read modes, Macronix only supports DTR use in the Fast DTR Read (1-1-1), Dual I/O DTR Read ( 2DTRD = 1-2-2), and Quad I/O DTR Read (4DTRD SPI = 1-4-4) modes (Table 2-2). Table 2-2: Read Performance Macronix MX66L1G45G Read Mode(1) Default Dummy Cycles Max Speed @ Default (2) Dummy Cycles Micron MT25QL01GB Default Dummy Cycles Max Speed @ Default (2) Dummy Cycles Fast Read 8 133MHz 8 133MHz (1-1-1) Dual Output Read 8 133MHz 8 133MHz (DREAD = 1-1-2) Dual I/O Read 4 84MHz 8 133MHz (2READ = 1-2-2) Dual Peripheral Interface 8 133MHz (2-2-2) Quad Output Read 8 133MHz 8 133MHz (QREAD = 1-1-4) Quad I/O SPI Read 6 84MHz 10 125MHz (4READ SPI = 1-4-4) Quad I/O QPI Read 6 84MHz 10 125MHz (4READ QPI= 4-4-4) Fast DTR Read 8 66MHz 6 66MHz (1-1-1) Dual Output DTR Read 6 66MHz (1-1-2) Dual I/O DTR Read 4 52MHz 6 57MHz ( 2DTRD = 1-2-2) Quad Output DTR Read 6 57MHz (1-1-4) Quad I/O SPI DTR Read 6 52MHz 8 66MHz ( 4DTRD SPI = 1-4-4) Quad I/O QPI DTR Read 6 52MHz 8 53MHz ( 4DTRD QPI = 4-4-4) Notes: 1. In the x-y-z notation used in this applications note, x specifies the number of channels for the command, y specifies the number of channels for the address, and z is the number of channels for data. 2. Higher clock rates can be achieved with increased number of dummy cycles (see datasheet). P/N: AN0283 2 Ver.2, Jan.20, 2014 Macronix Proprietary APPLICATION NOTE Comparing Micron MT25QL01GB with Macronix MX66L1G45G 3. Package and Pinout Both devices are available in a 24-BGA package with similar footprints. Pinout definitions are identical with the two exceptions shown in Table 3-2. Where Macronix has a NC/SIO3 pin on D4, Micron has either a HOLD#/DQ3 or a RESET#/DQ3 pin. If the Micron device has a HOLD# pin, but the HOLD# function is not used, then the devices are pin compatible. Similarly, Micron Ball A4 can be a No Connect or a Reset# pin. If the Reset# pin is available, the two device pins are identical, and if the Micron part is a NC, the devices are still compatible as the Macronix Ball A4 Reset# has an internal pull up. Figure 3-1: 24-BGA (6x8mm with 5x5 Ball Array) MX66L1G45GXD MT25QL01GBBAxE12 5 NC NC NC NC NC 5 NC NC NC NC 4 RESET# VCC WP# SIO2 NC SIO3 NC 4 RESET# /NC VCC W#/ DQ2 HOLD# 3 NC GND NC SI SIO0 NC 3 NC VSS NC DQ0 NC 2 NC SCLK CS# SO SIO1 NC 2 NC C S# DQ1 NC NC NC NC NC 1 NC NC NC NC B C D E B C D E 1 A A DQ3 NC NC Table 3-1: 24-BGA Pin Definition Comparison Packag e Ball Macronix MX66L1G45G Micron MT25QL01GB Ball D4 NC/SIO3 HOLD#/DQ3 Ball A4 RESET# RESET#/NC P/N: AN0283 Comments HOLD# not supported by Macronix. Dedicated Micron part numbers offer RESET# instead of HOLD#. NC means “No Connect” Dedicated Micron part numbers offer RESET# instead of NC. NC means “No Connect” Macronix RESET# pin has internal pull up. 3 Ver.2, Jan.20, 2014 Macronix Proprietary APPLICATION NOTE Comparing Micron MT25QL01GB with Macronix MX66L1G45G 4. Key Feature and Operational Differences 4-1 Status Register and Configuration Register Differences Both devices use status and configuration registers to control device behavior and report status. The registers and bits used are similar but not identical. Micron also has Non-Volatile registers not shown. Both the Micron and Macronix devices use BP[3:0] bits to select the same memory areas for protection. The MT25QL01GB Block Protection bits BP[3:0] are located in Status Register (bits 6 and [4:2]). The Top/Bottom bit is located in Status Register bit 5 and selects whether block protection starts at the top or bottom of memory. The BP[3:0] and Top/Bottom bits are nonvolatile and reprogrammable. The MX66L1G45G Block Protection bits BP[3:0] are located in Status Register bits [5:2]. The top/bottom starting point is controlled by the TB bit, which is located in Configuration Register bit 3. The default setting of the TB bit starts block protection at the top of memory. If the ‘bottom’ starting point is selected, it can never be returned to the ‘top’ starting point. The BP[3:0] bits are all nonvolatile and reprogrammable. The TB bit is nonvolatile and one-time-programmable. Table 4-1: Status Register Bits Register Bit Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Macronix MX66L1G45G WIP; 1=write operation WEL; 1=write enable BP0; BP protection BP1; BP protection BP2; BP protection BP3; BP protection QE; 1=Quad mode enable SRWD; 1=SR write disable Micron MT25QL01GB WIP; 1=write operation WEL; 1=write enable BP0; BP protection BP1; BP protection BP2; BP protection T/B; Top/Bottom Protect BP3; BP protection SRWD; 1=SR write disable Table 4-2: Configuration Register/ Enhanced Volatile Configuration Register Register Bit Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 P/N: AN0283 Macronix MX66L1G45G ODS0 (Output Driver Strength) ODS1 (Output Driver Strength) ODS2 (Output Driver Strength) T/B; Top/Bottom Protect PBE; 1=Enable Preamble bit 4-BYTE; 1=4Byte address DC0 (Dummy Cycle 0) DC1 (Dummy Cycle 1) 4 Micron MT25QL01GB ODS0 (Output Driver Strength) ODS1 (Output Driver Strength) ODS2 (Output Driver Strength) Reserved Reset/Hold; 1=Enable DTR Protocol DPI protocol; 1=disable QPI protocol; 1=disable Ver.2, Jan.20, 2014 Macronix Proprietary APPLICATION NOTE Comparing Micron MT25QL01GB with Macronix MX66L1G45G Table 4-3: Macronix Security Register vs. Micron Flag Status Register Register Bit Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Macronix MX66L1G45G Secured OTP Indicator; 1=factory lock LDSO; 1=OTP lock down PSB (Program/Suspend bit) ESB (Erase/Suspend bit) Reserved P_FAIL; 1=Program fail E_FAIL; 1=Erase fail WPSEL; 1=Individual WP Micron MT25QL01GB Address; 1=4-Byte address Protection PSB (Program/Suspend bit) Reserved P_FAIL; 1=Program fail E_FAIL; 1=Erase fail Erase Suspend; 1=suspend PGM/ERS controller;1=ready 4-2 QPI Differences Micron’s Quad I/O mode is entered by setting a bit in the Nonvolatile Configuration Register, which remembers this mode after power cycles, or by setting a bit in the Enhanced Volatile Configuration Register and is reset after a power cycle. The MX66L1G45G requires an EQIO (35h) command to enter the equivalent QPI mode. This mode can be terminated by a RSTQIO (F5h) command or by a power cycle or software reset. 4-3 XIP Differences The XIP (eXecute In Place) feature (Macronix refers to this as Performance Enhance Mode) is only used during Fast Read operations and eliminates the need to input read commands prior to entering an address and reading data. This is an overhead reduction feature that increases data throughput. Both devices offer this feature, but entry and exit methods are different. The MX66L1G45G enters XIP mode whenever all four bits of the first and second dummy cycles of a FREAD instruction are not equal and will exit XIP mode if any of the bits of the first and second dummy cycles are equal. Macronix only supports XIP in Quad I/O (1-4-4) and QPI (4-4-4) modes. Micron supports XIP in all Fast Read I/O modes. 4-4 Individual Sector/Block Protection Differences Both devices have the ability to protect individual 64KB sectors/blocks of memory. The methods used are independent of the nonvolatile BP bit configuration in the Status Register. With the Micron flash, it is possible to use both methods of write protection (BP bits and Individual Sector Protection) simultaneously, and the protected area is the combination of the two. When using the Macronix flash, either BP bit Protection or Individual Block Protection can be selected exclusively, with the default being the use of the BP bits. The MT25QL01GB has one Lock Register for each 64KB sector to control the sector’s program/erase protection status. The protection can be turned on or off at any time unless the sector’s Lock Register has been locked by the application. Once locked, its associated sector will remain in the protected or unprotected state until the next power cycle or reset. All sectors not protected by the Status Register BP configuration will be unprotected after power up and all Lock Registers will be unlocked. The MX66L1G45G has one volatile protection register for each of the top sixteen 4KB sectors, bottom sixteen 4KB sectors, and 2046 middle 64KB blocks of memory. These protection registers can only be used after permanently disabling the Status Register BP protection bits. This is done by executing the WPSEL instruction once. Please note that this irreversible and the individual sector/block protection method will be permanently selected. P/N: AN0283 5 Ver.2, Jan.20, 2014 Macronix Proprietary APPLICATION NOTE Comparing Micron MT25QL01GB with Macronix MX66L1G45G After permanently selecting the individual sector/block protection method for the MX66L1G45G, all sectors and blocks will be locked by default on power up. Sectors/blocks must be unlocked before they can be programmed or erased. Unlocking sectors/blocks can be done on an individual basis with the SBULK (Single Block Unlock) command or on all sectors/blocks with the GBULK (Global Block Unlock) command. Sectors and blocks can be relocked as necessary with the SBLK (Single Block Lock) command or GBLK (Global Block Lock) command. Since the smallest individual sector protection size in the MT25QL01GB is 64KB, if an application is currently locking/unlocking the top and/or bottom 64KB sector(s), it will need to lock/unlock each of the 16 top and/or bottom 4KB sectors in the MX66L1G45G for equivalent results. 4-5. Chip Erase Differences The Micron MT25QL01GB supports the Bulk Erase function= 512Mb, which means users have to execute two Bulk Erase Commands (once in each die) to finish a chip erase operation. In the meantime, The Macronix MX66L1G45G device looks and works like a monolithic 1Gb die and only needs one CE command with no address required. P/N: AN0283 6 Ver.2, Jan.20, 2014 Macronix Proprietary APPLICATION NOTE Comparing Micron MT25QL01GB with Macronix MX66L1G45G 5. Performance Tables 5-1 and 5-2 show that the two devices have similar AC and DC performance. Table 5-1: AC Parameter Comparison Symbol Macronix Micron tCH tCH tCL tCL min min tCLQV Tclqv max tCLQX tDVCH tCHDX tCLQX tDVCH tCHDX tVSL tVSL Page Program Time (256 Bytes) tPP tPP Erase 4KB Subsector/Sector tSE tSE Erase 32KB Sector tBE32 - Erase 64KB Sector/Block tBE tSE Bulk Erase / Chip Erase tCE tBE Parameter Clock High Time Clock Low Time Clock Low to Output Valid (STR mode) Output Hold Time Data In Setup Time Data In Hold Time VCC(min) to CS# low min min min min max typ Macronix MX66L1G45G 45% fTSCLK 45% fTSCLK 6ns (15pF) 8ns (30pF) 1ns 2ns 4ns 1500us 0.6ms Micron MT25QL01GB 3.375ns 3.375ns 5ns (10pF) 6ns (30pF) 1ns 1.75ns 2.5ns 300us 0.2ms max typ max typ max typ max typ max 3ms 85ms 400ms 380ms 2s 680ms 4s 480s 1200s 2.8ms 50ms 400ms 100ms 1s 150ms 1s (1) 306s (1) 920s Macronix MX66L1G45G +/- 4uA 60uA 200uA Micron MT25QL01GB +/- 2uA 60uA 200uA - 22mA 40mA - 30mA - 25mA 6mA 60mA 40mA 60mA 25mA 50mA Condition Notes: 1. Calculated with Single Die Erase cycle time (512Mb) x2. Table 5-2: DC Parameter Comparison Parameter Leakage Current Standby Current VCC Read Current (Fast Read) Symbol Macronix Micron ILI/ILO ILI/ILO ISB1 ICC1 ICC1 ICC3 Condition max typ max max @ 133MHz (Quad I/O) max @ 104MHz (Quad I/O) max @ 84MHz max @ 54MHz VCC Program Current VCC Write Status Register Current VCC Erase Current P/N: AN0283 ICC2 ICC3 ICC4 ICC5 max max ICC4 ICC6 max 7 Ver.2, Jan.20, 2014 Macronix Proprietary APPLICATION NOTE Comparing Micron MT25QL01GB with Macronix MX66L1G45G 6. Command Code Both devices use the same basic command set, but there are a few minor differences highlighted in Table 6-1. Table 6-1: Command Code Comparison Instruction Type Read ID Read (STR) Read (DTR) Write Register P/N: AN0283 Instruction Description RDID RDSFDP READ FAST_READ DOFR DIOFR QOFR QIOFR FAST_READ DOFR DIOFR QOFR QIOFR WREN WRDI PP 4PP SE BE 32K SE 64K CE RDSR RDEAR WREAR WRSR RFSR CLFSR RDCR - Read Identification Read Serial Flash Discoverable P. Table Read Data Bytes (3B/4B) Read Data Bytes at Higher Speed (3B/4B) Dual Output Fast Read (3B/4B) Dual Input/Output Fast Read (3B/4B) Quad Output Fast Read (3B/4B) Quad Input/Output Fast Read (3B/4B) Read Data Bytes at Higher Speed Dual Output Fast Read Dual Input/Output Fast Read (3B/4B) Quad Output Fast Read Quad Input/Output Fast Read (3B/4B) Write Enable Write Disable Page Program (3B/4B) Dual Input Fast Program (1-1-2) Dual I/O Fast Program (1-2-2) Quad Page Program (1-4-4) (3B/4B) Sector Erase 4KB (3B/4B) Block Erase 32KB (3B/4B) Block Erase 64KB (3B/4B) Single Die Erase (64MB) Chip Erase (1Gb) Read Status Register Read Extended Address Register Write Extended Address Register Write Status Register Read Flag Status Register Clear Flag Status Register Read Non-volatile Configuration Register Write Non-volatile Configuration Register Read Volatile Configuration Register Write Volatile Configuration Register Read Enhance Volatile Configuration Register Write Enhance Volatile Configuration Register 8 Macronix MX66L1G45G 9Fh 5Ah 03h / 13h 0Bh / 0Ch 3Bh / 3Ch BBh / BCh 6Bh / 6Ch EBh /ECh 0Dh / 0Eh BDh / BEh EDh / EEh 06h 04h 02h / 12h 38h / 3Eh 20h /21h 52h / 5Ch D8h / DCh 60 or C7h 05h C8h C5h 01h 15h - Micron MT25QL01GB 9Eh/9Fh 5Ah 03h / 13h 0Bh / 0Ch 3Bh / 3Ch BBh / BCh 6Bh / 6Ch EBh /ECh 0Dh / 0Eh 3Dh BDh / BEh 6Dh EDh / EEh 06h 04h 02h / 12h A2h D2h 38h / 3Eh 20h /21h 52h D8h / DCh C4h 05h C8h C5h 01h 70h 50h B5h B1h 85h 81h 65h 61h Ver.2, Jan.20, 2014 Macronix Proprietary APPLICATION NOTE Comparing Micron MT25QL01GB with Macronix MX66L1G45G Table 6-1: Command Code Comparison - Continued Instruction Type QPI OTP Security EQIO RSTQIO QPIID ENSO EXSO ROTP POTP RDSCUR Enable QPI Reset (Exit) QPI QPI ID Read Enter Secured OTP Exit Secured OTP Read OTP Area Program OTP Area Read Security Register Macronix MX66L1G45G 35h F5h AFh B1h C1h 2Bh WRSCUR Write Security Register 2Fh - RDLR Read Lock Register 2Dh 2Dh WRLR Write to Lock Register 2Ch 2Ch RDPASS Read Password Register 27h 27h WRPASS Write Password Register 28h 28h PASSULK Password Unlock 29h 29h RDSPB Read SPB E2h E2h WRSPB Write SPB E3h E3h ESSPB Erase All SPB E4h E4h SPBLK Set SPB Lock Bit A6h A6h RDSPBLK Read SPB Lock Register A7h A7h RDDPB Read DPB Register E0h E0h WRDPB Write DPB Register E1h B0h E1h 75h 30h 66h 99h B7h E9h B9h ABh C0h 7Ah 66h 99h B7h E9h B9h ABh 9Bh/27h Note 1 Instruction Description PGM/ERS Suspend Program or Erase Suspend PGM/ERS Resume Program or Erase Resume RSTEN Reset Enable RST Reset Memory EN4B Enter 4-Byte Mode Others EX4B Exit 4-Byte Mode DP Deep Power Down RDP Release from Deep Power Down CRC Cyclic Redundancy Check SBL Set Burst Length Note 1: Micron uses their Volatile Configuration Register to control this function. P/N: AN0283 9 Micron MT25QL01GB 35h F5h AFh 4Bh 42h - Ver.2, Jan.20, 2014 Macronix Proprietary APPLICATION NOTE Comparing Micron MT25QL01GB with Macronix MX66L1G45G 7. Manufacturer and Device ID Table 7-1: Manufacturer and Device ID Comparison Command Type Manufacture ID Device ID Macronix MX66L1G45G C2h Micron MT25QL01GB 20h Memory Type 20h BBh Memory Capacity 1Bh N/A 21h 17 Bytes Unique ID 8. Summary The Macronix MX66L1G45G and Micron MT25QL01GB have similar commands, functions, and features. The devices are command compatible for basic read, program, and erase operations. The devices are essentially pin compatible if the HOLD# function is not used. A more detailed analysis should be done if “special” functions such as XIP or Individual Sector Write Protection are used. If common features are used in standard traditional modes, they may need only minimal software modification primarily due to differences in register bit settings. 9. References Table 9-1 shows the datasheet versions used for comparison in this application note. For the most current, detailed Macronix specification, please refer to the Macronix Website at http://www.macronix.com/. Table 9-1: Datasheet Version Datasheet MX66L1G45G, 3V, 1Gb, v0.0.pdf n25q_1gb_3V_65nm.pdf Location Macronix Website Micron Website Date Issued Dec. 2013 Dec. 2013 Version 0.0 A 10. Appendix Table 10-1 shows the basic part number and package information cross reference between Macronix MX66L1G45G and Micron N25Q128 parts. Table 10-1: Part Number Cross Reference Macronix Part No. Micron Part No. Package MX66L1G45GXDI-10G MT25QL01GBBA1E120SIT 24-BGA MX66L1G45GXDI-10G MT25QL01GBBA3E120SIT 24-BGA MX66L1G45GXDI-10G MT25QL01GBBA8E120SIT 24-BGA Dimension 8x6mm pkg. 5X5ball array 8x6mm pkg. 5X5ball array 8x6mm pkg. 5X5ball array Note Hold# pin Reset# pin Reset# and Hold# pin 11. Revision History Revision 1.0 P/N: AN0283 Description Initial Release Date January 20, 2014 10 Ver.2, Jan.20, 2014 Macronix Proprietary APPLICATION NOTE Comparing Micron MT25QL01GB with Macronix MX66L1G45G Except for customized products which have been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applications only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations; and Macronix as well as it’s suppliers and/or distributors shall be released from any and all liability arisen therefrom. Copyright© Macronix International Co., Ltd. 2014. All rights reserved, including the trademarks and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit, NBiit, Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich Au-dio, Rich Book, Rich TV, and FitCAM. The names and brands of third party referred thereto (if any) are for identification purposes only For the contact and order information, please visit Macronix’s Web site at: http://www.macronix.com P/N: AN0283 11 Ver.2, Jan.20, 2014