SC4212L High PSRR, Very Low Input, Very Low Dropout, 1A Linear Regulator POWER MANAGEMENT Features Description Input Voltage Range from 1.6V to 6.0V 150mV Maximum Dropout @ 1A Adjustable Output from 0.5V with ± 1% Accuracy High PSRR (76dB Typical at 1.8Vin to 0.5Vo, 1A) Noise Bypass Pin Programmable Soft-Start 12µA Quiescent Current in Shutdown Enable Input Power Good Indicator Over Current and Over Temperature Protection Reverse Blocking from Output to Input Full Industrial Temperature Range 3mm x 3mm x 1mm MLPD-8 Package Fully WEEE and RoHS Compliant Applications Telecom and Networking Cards Motherboards and Peripheral Cards Industrial Applications Wireless Infrastructure Medical Equipment The SC4212L is a high performance linear regulator designed for applications requiring very low dropout voltage at load currents up to 1 Ampere. It operates with VIN as low as 1.6V and up to 6V, making it useful for a wide range of different applications and rails. The output voltage is programmable down to 0.5V, set via an external resistor divider, or to a fixed setting of 0.5V depending upon how the FB pin is configured. The SC4212L has an enable pin to further reduce power dissipation while shut down. This device also offers an active-high power good for the system to check the output voltage. An external soft start capacitor can be connected to the SS pin to program the profile of the startup. Additionally, the device provides protection features such as over current protection, over temperature protection and reverse blocking from output to input. A capacitor at the BYP pin can bypass the noise generated in the internal bandgap reference in order to improve the PSRR and the noise at the output. The SC4212L is available in a 3mm x 3mm MLPD-8 package. Typical Application Circuit SC4212L SC4212L PG PG GND V O = 0 .5 V PG PG GND EN EN FB VO EN EN FB V IN V IN VO V IN V IN VO SS BYP SS BYP C IN C SS C BYP R2 CO C IN C SS C BYP VO = 0 .5 (R 1 + R 2 ) R2 VO R1 R2 C3 CO * C3 is a placeholder Rev. 2.0 © 2015 Semtech Corporation SC4212L Pin Configuration Ordering Information TOP VIEW PG 1 8 GND EN 2 7 FB VIN 3 6 VO SS 4 5 BYP Device Package SC4212LMLTRC(1)(2) 3mm x 3mm x 1mm MLPD-8 SC4212LEVB Evaluation Board Notes: (1) Available in tape and reel only. A reel contains 3,000 devices. (2) Available in lead-free package only. Device is WEEE and RoHS compliant and halogen free. 3mm x 3mm x 1mm MLPD-8 θJA = 36.3°C/W Marking Information 212L yyww xxxx yyww = Datecode ( Example : 1352 ) xxxx = Semtech Lot No. ( Example : 2932 ) SC4212L Absolute Maximum Ratings Recommended Operating Conditions VIN, VO, PG to GND (V). . . . . . . . . . . . . . . . . . . . . . -0.3 to 6.5 VIN (V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 ≤ VIN ≤ 6.0 EN, SS, BYP to GND (V) . . . . . . . . . . . . . . . . . -0.3 to VIN + 0.3 Junction Temperature Range (°C). . . . . . . . . . -40 ≤ TJ ≤ +125 FB to GND (V). . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to VIN + 0.3 Output Current Range. . . . . . . . . . . . . . . . . . . . 50 µA ≤ IO ≤ 1A Power Dissipation. . . . . . . . . . . . . . . . . . . . . . Internally Limited Thermal Information ESD Protection Level HBM(1) (kV). . . . . . . . . . . . . . . . . . . 4 ESD Protection Level CDM(2) (kV). . . . . . . . . . . . . . . . . . . 1 Thermal Resistance, Junction to Ambient (3) (°C/W). . 36.3 Thermal Resistance, Junction to Case (°C/W). . . . . . . . 3.77 Storage Temperature (°C). . . . . . . . . . . . . . . . . . . . -65 to +150 Peak IR Reflow Temperature (10s to 30s). . . . . . . . . . +260 Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. NOTES: (1) Tested according to standard ANSI/ESDA/JEDEC JS-001-2012. (2) Tested according to standard JESD-C101E. (3) Calculated from package in still air, mounted to 3” x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. Electrical Characteristics Unless noted otherwise TJ = 25° C for typical, -40° C ≤ TJ ≤ 125° C for min and max. VEN = VIN, VFB = VO, VIN = 1.6V to 6.0V, CIN=10µF, COUT=10µF, CBYP = 470nF. Parameter Symbol Conditions Min Typ Max Units 6.0 V 680 µA 2 mA 50 µA VIN VIN operating range(1) 1.6 VIN = 3.3V, IO = 0A Quiescent current IQ 325 IO = 1A VEN =0V 12 VIN = 3.3V 2 µA 250 µs Soft-Start Soft-start source current ISS tSS without external CSS Feedback Feedback voltage(2) VFB IO = 10mA to 1A Feedback pin current IFB 0.495 0.500 0.505 V VFB = VOUT 80 200 nA IO = 10mA 0.01 0.2 %/V VO Line regulation(2) SC4212L Electrical Characteristics (continued) Parameter Symbol Conditions Load regulation(2) IO = 10mA to 1A IO =0.5A Dropout voltage(3) VDO IO = 1A Current limit Power Supply Rejection Ratio Min Max Units 0.21 1.0 % 1.6V ≤ VIN < 2.2V 86 2.2V ≤ VIN ≤ 6.0V 75 1.6V ≤ VIN < 2.2V 175 2.2V ≤ VIN ≤ 6.0V 150 ICL PSRR Typ mV 1.2 VIN = 1.8V, VO = 0.5V, IO =1A, CBYP = 470nF 2.6 f = 100Hz 80 f = 1kHz 76 f = 10kHz 64 f = 100kHz 43 f = 500kHz 32 f = 1MHz 26 A dB EN Enable pin current Enable pin threshold IEN VEN = 0V, VIN = 1.6V to 6.0V 1.5 10 µA VEN = VIN 80 200 nA VIH 1.2 VIN = 1.6V to 6.0V VIL V 0.4 Over Temperature Protection High trip level Hysteresis THI 150 O C THYST 10 O C Power Good PG threshold Upper limit, VFB > internal 500mV reference Lower limit, VFB < internal 500mV reference 110 % 90 PG pin leakage current VIN=3.3V 0.5 µA PG resistance VIN=3.3V 53 Ω Notes: (1) Minimum VIN = VOUT + VDO or 1.6V, whichever is greater. (2) Low duty cycle pulse testing with Kelvin connections required. (3) VDO = VIN - VO when VFB = GND. SC4212L Pin Descriptions Pin # Pin Name 1 PG Power good output. Open drain, active high. Connect to a positive supply with a pullup resistor. Leave this pin unconnected if not used. 2 EN Enable input. Driving this pin high turns on the regulator. Driving this pin low shuts off the regulator. If not driven from a control circuit, tie this pin directly to the VIN pin, or via a resistor up to 400kΩ. 3 VIN Input supply pin. A large bulk capacitance should be placed close to this pin to ensure that the input supply does not sag below the minimum VIN. 4 SS Soft-start pin. Connecting a ceramic capacitor from this pin to GND sets the startup time. Refer to the EC table (page 3) for the typical tSS with the external soft-start capacitor not populated. 5 BYP Bypass pin. Low noise performance is optimized by connecting a capacitor from this pin to GND. 6 VO Regulator output pin. Refer to the Applications Information section for output capacitor selection. 7 FB Input of the error amplifier. This pin is used to set the output voltage (See typical Application Circuits on page 1). 8 GND THERMAL PAD Pin Function Ground pin. The exposed pad enhances thermal performance and is not electrically connected inside the package. It is recommended to connect the exposed pad to the ground plane using multiple vias. Block Diagram R e ve rse P o la rity P ro te ctio n C ircu itry V IN VO S o ft-S ta rt C ircu itry O ve r-cu rre n t a n d th e rm a l sh u td o w n C ircu itry SS FB EN E n a b le C ircu itry BYP V REF C ircu itry PG PG C ircu itry EN V REF V FB GND SC4212L Typical Characteristics Unless noted otherwise CIN=10µF/10V X7R 0805, COUT=10µF/10V X7R 0805. Dropout Voltage at Vin = 1.6V 1A 0.5A Dropout Voltage at Vin = 6.0V Dropout Voltage at Vin = 2.2V 1A 0.5A Current Limit Threshold 1A 0.5A Input Under-voltage Lockout Threshold Shutdown Current Vin rising threshold Vin = 6.0V Vin = 3.3V Vin falling threshold Vin = 1.6V SC4212L Typical Characteristics (Continued) Unless noted otherwise CIN=10µF/10V X7R 0805, COUT=10µF/10V X7R 0805. Quiescent Current Output Rise Time Output Rise Time ENABLE Rising Threshold Css = NP Io = 0A Css = 10nF Vin = 1.6V Vin = 3.3V ENABLE Falling Threshold Vin = 6.0V PG Threshold Upper Threshold Lower Threshold SC4212L Typical Characteristics (Continued) Unless noted otherwise CIN=10µF/10V X7R 0805, COUT=10µF/10V X7R 0805. Power Supply Ripple Rejection Vin = 1.8V, Vo = 0.5V, Io = 25mA CBYP = NP CBYP = 470nF Output Spectral Noise Density CBYP = NP, RL = 50Ω Vn RMS (10Hz to 100kHz): 36.4µVrms, Vo = 0.5V 83.0µVrms, Vo = 1.2V 225.6µVrms, Vo = 3.3V Power Supply Ripple Rejection Vin = 1.8V, Vo = 0.5V, Io = 1A CBYP = NP CBYP = 470nF Output Spectral Noise Density CBYP = 470nF, RL = 50Ω Vn RMS (10Hz to 100kHz): 15.7µVrms, Vo = 0.5V 36.9µVrms, Vo = 1.2V 85.7µVrms, Vo = 3.3V SC4212L Applications Information Introduction Soft-Start The SC4212L is intended for applications where high current capability and very low dropout voltage are required. It provides a very simple, low cost solution that uses very little PCB area. Additional features include an enable pin to allow for a very low power consumption in standby mode, and a fully adjustable output. By connecting the FB pin directly to the VO pin, the output voltage will be regulated to the 0.5V internal reference. In this configuration, R2 should be 10kΩ. Soft-start is achieved by using a voltage ramp as the voltage reference for the internal error amplifier during startup. This voltage ramp is created by an internal 2µA current source charging an external soft-start capacitor. When the voltage ramp reaches 500mV, the voltage reference for the internal error amplifier switches to the fixed 500mV VREF. Thus, during soft-start, the output tracks the internal voltage ramp, which limits the input inrush current and provides a programmed soft-start profile for a wide range of applications. The soft-start time tSS can be calculated with the below equation: tSS = 0.25x106CSS VO Setting with External Resistors Power Good The use of 1% resistors, and designing for a current flow ≥ 50µA is recommended to ensure a well regulated output (thus R2 ≤ 10kΩ). R1 can then be calculated from R1 = R2 (VO-VREF)/VREF The power good output is an open-drain output which requires a pull-up resistor. The SC4212L features an activehigh power good. During startup, the power good pin will not be pulled high until the soft-start is completed. In any case, the power good output will be low when the FB pin voltage is not within 10% of VREF. VO Setting: VO = VREF Enable Pulling this pin below 0.4V turns the regulator off, reducing the quiescent current to a fraction of its operating value. Driving this pin high enables the regulator. A pull up resistor ≤ 400kΩ should be connected from this pin to the VIN pin in applications where the Enable pin is not driven from a control circuit. Input Capacitor Over-Current and Thermal Shutdown The over-current protection and thermal shutdown functions protect the regulator against damage due to excessive power dissipation. The SC4212L is designed to current limit when the output current reaches 1.6A (typical). When the load exceeds 1.6A, the output voltage is reduced to maintain a constant current limit. A 10µF X5R or X7R ceramic capacitor, along with a 0.1µF ceramic decoupling capacitor is recommended to be placed directly next to the VIN pin. This allows for the device being some distance from the input source, reducing the input droop due to load transients and improving load transient response. Additional capacitance may be needed if large step, fast di/dt load transients are required or the LDO is located far away from the input source. The thermal shutdown function limits the junction temperature to a maximum of 150OC (typical). Thermal shutdown turns off the regulator as the junction temperature reaches the high trip level of 150OC. When the junction temperature drops below 140OC (typical), the regulator is turned on once again. Output Capacitor The power dissipation in the SC4212L is roughly given by the following equation: PD = (VIN - VO)IO A 10µF X5R or X7R ceramic capacitor, along with a 0.1µF ceramic decoupling capacitor is recommended. Thermal Considerations SC4212L Applications Information (Continued) The allowable power dissipation will be dependant upon the thermal impedance achieved in the application. The derating curve below is valid for the thermal impedance specified in the Thermal Information section on page 3. Figure 1. Power Derating Curve 10 SC4212L Outline Drawing — 3mm x 3mm MLPD-8 11 SC4212L Land Pattern — 3mm x 3mm MLPD-8 K Y (C ) H X D IM G Z C G H K P X Y Z D IM E N S IO N S IN C H E S M ILLIM E T E R S (.1 1 6) .0 87 .0 67 .1 02 .0 26 .0 16 .0 30 .1 46 (2 .9 5) 2 .20 1 .70 2 .58 0 .65 0 .40 0 .75 3 .70 P NOTES: 1. C O N T R O L L IN G D IM E N S IO N S A R E IN M IL L IM E T E R S (A N G L E S IN D E G R E E S ). 2. T H IS L A N D P A T T E R N IS F O R R E F E R E N C E P U R P O S E S O N L Y . C O N S U L T Y O U R M A N U F A C T U R IN G G R O U P T O E N S U R E Y O U R C O M P A N Y 'S M A N U F A C T U R IN G G U ID E L IN E S A R E M E T . 3. T H E R M A L V IA S IN T H E L A N D P A T T E R N O F T H E E X P O S E D P A D SH ALL BE C O N N EC TED TO A SYSTEM G RO UND PLANE. F A IL U R E T O D O S O M A Y C O M P R O M IS E T H E T H E R M A L A N D /O R F U N C T IO N A L P E R F O R M A N C E O F T H E D E V IC E . 12 SC4212L © Semtech 2015 All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. 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