IRFI7440GPBF Data Sheet (536 KB, EN)

StrongIRFET™
IRFI7440GPbF
HEXFET® Power MOSFET
Application
 Brushed Motor drive applications
 BLDC Motor drive applications
Battery powered circuits
 Half-bridge and full-bridge topologies
 Synchronous rectifier applications
 Resonant mode power supplies
 OR-ing and redundant power switches
 DC/DC and AC/DC converters
 DC/AC Inverters
2.5m
95A
S
D
TO-220AB Full-Pak
Standard Pack
Form
Quantity
Tube
50
6
D
Drain
S
Source
Orderable Part Number
IRFI7440GPbF
100
ID = 57A
5
80
4
T J = 125°C
3
2
60
40
20
T J = 25°C
1
0
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
max
G
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m )
TO-220 Full-Pak
2.0m
ID
G
Gate
IRFI7440GPbF
RDS(on) typ.
S
Benefits
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free, RoHS Compliant
Package Type
40V
G




Base part number
VDSS
D
25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
2015-12-16
IRFI7440GPbF
Absolute Maximium Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
TJ
TSTG
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Max.
95
67
380
42
0.28
± 20
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Mounting Torque, 6-32 or M3 Screw
Avalanche Characteristics EAS (Thermally limited)
Single Pulse Avalanche Energy 
EAS (Thermally limited)
Single Pulse Avalanche Energy 
IAR
Avalanche Current 
EAR
Repetitive Avalanche Energy 
Thermal Resistance Symbol
Parameter
Junction-to-Case 
RJC
Junction-to-Ambient 
RJA
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
IGSS
RG
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
Units
A
W
W/°C
V
-55 to + 175 300
10 lbf·in (1.1 N·m)
°C 201
407
mJ
See Fig. 15, 16, 23a, 23b
A
mJ
Typ.
–––
–––
Max.
3.6
65
Units
°C/W Min.
40
Typ. Max.
––– –––
Units
Conditions
V
VGS = 0V, ID = 250µA
–––
–––
2.2
–––
–––
–––
–––
–––
37
2.0
3.0
–––
–––
–––
–––
2.3
mV/°C Reference to 25°C, ID = 2mA 
m VGS = 10V, ID = 57A 
V
VDS = VGS, ID = 100µA
VDS = 40V, VGS = 0V
µA
VDS = 40V,VGS = 0V,TJ =125°C
VGS = 20V
nA
VGS = -20V

–––
2.5
3.9
1.0
150
100
-100
–––
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
 Limited by TJmax, starting TJ = 25°C, L = 124µH, RG = 50, IAS = 57A, VGS =10V.
ISD  57A, di/dt  962A/µs, VDD  V(BR)DSS, TJ 175°C.
Pulse width  400µs; duty cycle  2%.
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 29A, VGS =10V.
2
2015-12-16
IRFI7440GPbF
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg – Qgd)
Turn-On Delay Time
Rise Time
Min.
144
–––
–––
–––
–––
–––
–––
Typ. Max. Units
Conditions
––– –––
S VDS = 10V, ID =57A
88
132
ID = 57A
22
–––
VDS = 20V
nC 30
–––
VGS = 10V
58
–––
11
–––
VDD = 20V
ID = 30A
42
–––
ns
56
–––
RG= 2.7
VGS = 10V
36
–––
td(off)
Turn-Off Delay Time
–––
tf
Ciss
Coss
Crss
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
–––
4549
689
450
–––
–––
–––
Coss eff.(ER)
Coss eff.(TR)
Effective Output Capacitance (Energy Related)
Output Capacitance (Time Related)
–––
–––
835
981
–––
–––
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ. Max. Units
–––
–––
95
–––
–––
380
VSD
Diode Forward Voltage
–––
–––
1.3
dv/dt
Peak Diode Recovery dv/dt
VGS = 0V
VDS = 25V
pF ƒ = 1.0MHz, See Fig.7
VGS = 0V, VDS = 0V to 32V
VGS = 0V, VDS = 0V to 32V
Diode Characteristics Symbol
IS
ISM
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
3
A
–––
5.1
–––
–––
–––
–––
–––
36
38
45
49
–––
–––
–––
–––
–––
2.1
–––
V
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
D
G
S
TJ = 25°C,IS = 57A,VGS = 0V 
V/ns TJ = 175°C,IS =57A, VDS = 40V
TJ = 25°C
TJ = 125°C
TJ = 25°C
nC
TJ = 125°C
ns
A
TJ = 25°C
VDD = 34V
IF = 57A,
di/dt = 100A/µs 

2015-12-16
IRFI7440GPbF
1000
1000
100
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
10
BOTTOM
100
4.5V
1
60µs PULSE WIDTH
4.5V
60µs PULSE WIDTH
Tj = 25°C
Tj = 175°C
0.1
10
0.01
0.1
1
10
0.1
V DS, Drain-to-Source Voltage (V)
1000
2.0
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
10
Fig 4. Typical Output Characteristics
Fig 3. Typical Output Characteristics
T J = 175°C
T J = 25°C
10
VDS = 10V
60µs PULSE WIDTH
1.0
ID = 57A
VGS = 10V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
3
4
5
6
7
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
100000
14.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
VGS, Gate-to-Source Voltage (V)
ID= 57A
C oss = C ds + C gd
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
10000
Ciss
Coss
Crss
1000
100
12.0
VDS= 32V
VDS= 20V
10.0
8.0
6.0
4.0
2.0
0.0
1
10
100
0
20
40
60
80
100
VDS, Drain-to-Source Voltage (V)
QG, Total Gate Charge (nC)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
Fig 8. Typical Gate Charge vs.
Gate-to-Source Voltage
4
120
2015-12-16
IRFI7440GPbF
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
T J = 175°C
100
T J = 25°C
10
1msec
100
OPERATION
IN THIS
AREA
LIMITED BY
RDS(on)
10
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
DC
0.1
1.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0.1
1.6
1
10
VDS, Drain-to-Source Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig 9. Typical Source-Drain Diode Forward Voltage
Fig 10. Maximum Safe Operating Area
0.7
50
Id = 2mA
0.6
48
0.5
46
Energy (µJ)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
100µsec
44
42
0.4
0.3
0.2
40
0.1
38
0.0
-5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
5
10
15
20
25
30
35
40
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage
RDS(on), Drain-to -Source On Resistance ( m )
0
Fig 12. Typical Coss Stored Energy
5.0
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS =10V
4.5
4.0
3.5
3.0
2.5
2.0
0
20
40
60
80
100
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
2015-12-16
IRFI7440GPbF
Thermal Response ( Z thJC ) °C/W
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart = 25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
EAR , Avalanche Energy (mJ)
200
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 57A
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav 2015-12-16
IRFI7440GPbF
10
3.5
TJ = 125°C
3.0
2.5
6
ID = 100µA
ID = 250µA
4
ID = 1.0mA
2.0
ID = 1.0A
2
1.5
0
1.0
-75 -50 -25
0
0
25 50 75 100 125 150 175
200
400
600
800
1000
T J , Temperature ( °C )
diF /dt (A/µs)
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
200
10
IF = 57A
V R = 34V
TJ = 25°C
IF = 38A
V R = 34V
8
TJ = 25°C
TJ = 125°C
150
TJ = 125°C
6
QRR (nC)
IRRM (A)
IF = 57A
V R = 34V
TJ = 25°C
8
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
4.0
4
100
50
2
0
0
0
200
400
600
800
0
1000
200
400
600
800
1000
diF /dt (A/µs)
diF /dt (A/µs)
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
200
IF = 38A
V R = 34V
TJ = 25°C
150
QRR (nC)
TJ = 125°C
100
50
0
0
200
400
600
800
1000
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
7
2015-12-16
IRFI7440GPbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
L
VDS
D.U.T
RG
IAS
20V
tp
DRIVER
+
V
- DD
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
Qgd
Qgodr
Fig 25b. Gate Charge Waveform
2015-12-16
IRFI7440GPbF
TO-220 Full–Pak Package Outline (Dimensions are shown in millimeters (inches))
TO-220 Full-Pak Part Marking Information
TO-220AB Full-Pak packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
2015-12-16
IRFI7440GPbF
Qualification Information† Industrial
Qualification Level (per JEDEC JESD47F) ††
Moisture Sensitivity Level
TO-220 Full-Pak
N/A
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
††
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
11/18/2014
12/16/2015
Comments




Updated EAS (L =1mH) = 407mJ on page 2
Updated note 8 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 29A, VGS =10V”. on page 2
Updated datasheet with corporate template
Corrected typo test condition for Switch time ID from “57A” to “30A” on page 3.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
10
2015-12-16