Understanding the LLC Structure in Resonant Applications

AND8311/D
Understanding the LLC
Structure in Resonant
Applications
Prepared By: Christophe Basso
ON Semiconductor
http://onsemi.com
The resonant LLC topology, member of the Series
Resonant Converters (SRC) begins to be widely used in
consumer applications such as LCD TVs or plasma display
panels. In these applications, a high level of safety and
reliability is required to avoid catastrophic failures once
products are shipped and operated in the consumer field. To
face these new challenges, ON Semiconductor has recently
released to new controllers, the NCP1395 (low-voltage) and
the NCP1396 (high-voltage) dedicated to driving resonant
power supplies, usually of LLC type. However, before
rushing to design a converter of this type, it is important to
understand the resonant structure alone, object of the present
application note.
The LLC converter
The LLC converter implies the series association of two
inductors (LL) and one capacitor (C). Figure 1 shows a
simplified representation of the resonant circuit where:
Ls is the series inductor
Lm is the magnetizing inductor
Cs represents the series capacitor
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ÏÏÏÏÏÏÏÏÏÏ
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ÏÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏÏ
Vbulk
ÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏÏÏÏ
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ÎÎÎÎÎÎÎÎÎÎ
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ÎÎÎÎÎÎÎÎÎÎ
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ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
Vbulk
0
QA
N:1
D1
Vout
HB
QB
+
Lm
Cout
CS
Rload
D2
Figure 1. The LLC Topology Uses a Half-Bridge Configuration to Drive the Resonant Circuit
© Semiconductor Components Industries, LLC, 2008
January, 2008 - Rev. 0
1
Publication Order Number:
AND8311/D
AND8311/D
The operating principle is rather simple: a constant 50%
duty-cycle switching pattern drives QA - QB gates and a
high-voltage square wave appears on node HB. By
adjusting the switching frequency, the controller can control
the power flow depending on the output demand. As a
transformer is needed for isolation purposes, its magnetizing
inductance plays the role of the second inductor Lm. The
series inductor, Ls, can either be a separated element or
physically lump into the transformer. In this case, a
voluntary degradation of both primary and secondary
coupling naturally increases the leakage inductance which
can act as the series element. There are pros and cons to
include the leakage element in the transformer. The cost and
the absence of saturation play in favor of the integration but
the difficulty to keep a precise value from lots to lots
associated with leaky transformers (radiated noise) has to be
kept in mind when selecting the final configuration.
When studying the resonant converter, it is convenient to
reduce the architecture to a passive element arrangement
such as presented on Figure 2. The high-voltage square
signal is replaced by its fundamental content thanks to the
first harmonic approximation (the so-called FHA in the
literature): because we operate a tuned LC filter, all
harmonics can be considered as rejected and only the
fundamental passes through. Of course, this statement holds
as long the controller drives the resonating work in the
vicinity of its resonant frequency. Figure 2 offers such a
simplified representation of the resonant cell, actually
pointing out a series impedance (Ls and Cs) with a parallel
impedance (Lm and the reflected load).
Figure 2. The Impedance Representation Makes the LCC Operation Easier to Understand
• RL = ∞, light or no load condition, Lm appears in series
Depending on the loading, the network resonant frequency
varies between two different values:
• RL = 0, short-circuit, Lm disappears and Zseries
becomes a short. The series resonant point for Zseries is
thus
F max + F S +
with Ls and the whole network resonates to
2p
ǸǒLS ) LmǓCS
(eq. 2)
• 0 < RL < ∞, the resonance which combines Lm and Ls ,
1
2p ǸL SC S
1
F min +
(eq. 1)
shifts depending on the total quality coefficient.
At Fsw = FS, Zseries becomes a short and the ac transfer
function drops to 1 or 0 dB.
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24.0
Lm = 600 mH
LS = 100 mH
Vout = 24 V
CS = 33 nF
N=8
Pout = 10 W, Q = 60
Pout = 50 W, Q = 13
12.0
Pout = 100 W, Q = 6.7
20log 10
V out(s)
dB
V in(s)
Pout = 200 W, Q = 3
0
Pout = 300 W, Q = 2
-12.0
-24.0
10k
20k
50k
FREQUENCY (Hz)
1
1
F max + F S
F min +
2p ǸLSC S
2p ǸL S ) Lm)CS
200k
Figure 3. The AC Response of Figure 2 Circuit with Various Load Conditions
This is actually what Figure 3 plots suggest by showing the ac transfer function of Figure 2 as the load changes.
If we now study the impedance seen from the half-bridge node, we have an expression showing a series association of
inductors and a capacitor. Sticking to Figure 2 sketch and writing the impedance seen between ground and Node 3, we have:
Z in + Z L ) Z C ) Z L ŦR ac
Z in +
ƪ
S
ǒ
4
(wL m) R ac 2
ǒR ac
2 ) w 2L
2
m Ǔ
2
(eq. 3)
in
S
) wL S *
R ac2
Ǔƫ
1
) wL m
wC S
R ac 2 ) w2L m 2
2
2
(eq. 4)
In the low frequency portion, the terms associated with inductors are of less importance and Cs dominates. The impedance
is thus capacitive. As the frequency increases, the inductive portion starts to kick-in and the impedance goes up. This is what
Figure 4 describes. As one can see, all the curves go through point A whose value is independent from the resistive loading.
For the sake of a friendly exercise, we can solve Equation 4 with two different Rac values and find the frequency at which input
impedances equal. We obtain:
wA +
ǸL C
2
(eq. 5)
m S ) 2L SC S
If we substitute this value into Equation 4, the impedance at point A is:
Lm
ZA +
2L
S
Ǹ
L Sw S
(eq. 6)
Lm
2L
)1
S
If we define the ratio R by Lm/Ls, we can re-arrange equation 6:
ZA +
R
Ǹ2(R ) 2)
Ǹ
LS
CS
+
R
Ǹ2(R ) 2)
ZO
(eq. 7)
Where Z0 represents the characteristic impedance of the series resonant network. Using the numerical values noted in the
graphs, we obtain a frequency of 43.8 kHz and an impedance of 38.3 dBW (82.6 W).
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5
1
2
3
4
62.0
Inductive Region
Capacitive Region
Pout = 300 W, Q = 2
50.0
38.0
Pout = 100 W, Q = 6.7
A
Pout = 50 W, Q = 13
Pout = 200 W, Q = 3
26.0
dBW
Pout = 10 W, Q = 60
14.0
10k
Lm = 600 mH
LS = 100 mH
Vout = 24 V
CS = 33 nF
N=8
20k
F min
FREQUENCY (Hz)
50k
200k
1
2p ǸL S ) L in)C S
Figure 4. Impedance Plots at Various Power Levels
If we now observe the resonant current waveforms in a LLC
converter working below or above the series resonance Fs ,
we have different types of operation:
• Capacitive mode: in this mode, where the current leads
the voltage, the bridge MOSFETs operate in zero
current switching (ZCS). ZCS means that power
MOSFETs are turned-off at zero current. Back to figure
3, we can see that the output level goes up as the
frequency increases.
• Inductive mode: in this mode, the current lags the
voltage and the power switches are turned-on at zero
volt (ZVS), virtually eliminating all capacitive losses.
This operating way implies that a certain delay exists
before operating the concerned MOSFET so that its
body diode turns on first. Observing figure 3, the output
level goes down as the frequency increases.
Most of the LLC converters operate in the inductive region
for the second bullet reason. Also, given the feedback
polarity, if by mistake the closed-loop LLC enters the left
side of the resonance, the control law reverses and a power
runaway obviously occurs. It is thus extremely important to
clamp down the lower frequency excursion in fault
condition or during the startup sequence to avoid falling on
the other slope of the characteristics.
The inductive region can be split into two other regions,
depending where you operate compared to the resonant
series frequency Fs, as defined by Equation 1. Figure 5
represents the classical set of curves often found in the
dedicated literature:
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Region 2
4.00
Q = 10
Region 1
3.00
Q=5
2.00
Q=2
Q=1
1.00
1
2
3
4
5
0
Q = 0.5
Region 3
200m
600m
1.00
Vf/FS (V)
F sw < F s
1.40
F sw = F s
1.80
F sw > F s
Figure 5. Typical Transmittance Curves with Various Loading Conditions, Highlighting Three Distinct Regions
Region 3 is the capacitive mode where you do not want to
operate since ZVS is a wanted feature for the power
switches. In regions 1 and 2, you still have ZVS on the power
MOSFET's and the output diodes are operated in Zero
Current Switching (ZCS), cancelling all associated losses at
turn-off. Before discussing the benefits of a particular
solution, let us have a look at the various operating phases
the LLC converter is made of.
F max + F S +
1
2p ǸL SC S
1
+
6.28
Ǹ116m
28n
+ 88.3kHz
F min +
1
2p Ǹ(L S ) L m)C S
1
+
6.28
Operating Waveforms Below the Series Resonance,
Fsw < Fs
Ǹ(116m ) 700m)
+ 33kHz
28n
Fsw = 70 kHz at full load and nominal input voltage.
The converter delivers 24 V@10 A from a 380 Vdc input
source and a simulation has been performed using the above
values. Figure 6 shows the main waveforms obtained from
the simulator. Let us study the switching events step by step
to learn about the LLC behavior in this region.
For this example, we have selected a set of elements which
operate the converter below the series resonance defined by
Equation 1. The following value have been used:
Lm = 700 mH
Ls = 116 mH
Cs = 28 nF
N=8
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plot1
vgsl, vgsu in volts
14.0
V
V
GS,lower
GS,upper
23
10.0
Q
6.00
Q
B
A
is on
Q
is off
Q
DT
2.00
B
A
is off
is on
Gate voltages
22
-2.00
V
400
HB
Resonant currents
2.00
0
-2.00
vbridge in volts
plot2
ils, ilmag in amperes
4.00
plot3
id(d3a), idiode in amperes
-4.00
300
I
mag
200
25
26
100
I
I
0
L
=I
L
24
mag
30.0
I
20.0
I
I
d2
d,peak
d1
I
10.0
out
28
27
0
-10.0
Diode current
478u
482u
486u
time in seconds
490u
494u
Figure 6. Waveforms Obtained for a Converter Operated Below the Series Resonant Frequency
QA is off, QB is on, D2 is conducting :
resonates to Fs as Lm is shorted. Figure 7 depicts the
situation during this period of time.
The low-side MOSFET QB imposes a 0 V potential on the
half-bridge node and the current circulates from its drain to
source (first quadrant). The upper parasitic capacitor CossA
is fully charged to the input voltage Vbulk since the HB node
is grounded by QB. The secondary diode D2 is conducting
and imposes a voltage reflection -NVout over the
magnetizing inductor Lm. Its current linearly decreases with
a slope of -NVout/Lin. As this inductor is dynamically
shorted by the voltage reflection, it does not participate to
the on-going resonance between Ls and Cs which deliver the
output energy (the input source is out of the picture). The
current flowing into the transformer primary side (given its
theoretical representation, Lm associated to a perfect
transformer) is the main current IL minus the magnetizing
current Imag. D1 is blocked and undergoes twice the output
voltage given the transformer coupling. The circuit
QA is off, QB is on, D2 turns off:
As the network current IL resonates in a sinusoidal
manner, its amplitude peaks and then starts to dip towards 0.
When it reaches a level equal to that of the magnetizing
current, no current circulates in the transformer anymore: D2
blocks and the voltage reflection over Lm disappears. The
magnetizing inductor now comes back in series with Ls and
Cs and changes the resonant frequency from Fs to Fmin: the
LLC converter is really a multi-resonant structure and the
plateau - actually a small arch of a lower sinewave
oscillation - in the current as it appears on figure 6 testifies
for it. Both diodes are now blocked and this moment lasts
until QB opens. Figure 8 represents the circuit during this
time. As one can see, the output capacitor alone supplies the
energy to the load.
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Vbulk
QA
Vbulk
Vbulk
CossA
QA
IL-Imag
LS
D1
N:1
Imag
VLm
IL
IL-Imag
LS
N:1
Imag
Iout
Vout
IL
+
Lm
QB
CossA
Vout
Iout
Vout
D1
VLm
+
Lm
QB
Vout
Imag
Imag
IL-Imag
IL
D2
IL-Imag
Iout
D2
CS
IL
CS
IL
IL
IL
Figure 8. QA is Off, QB is On and Diode D2 Blocked.
Lm Comes Back Again in the Resonating Network
and Changes the Resonant Frequency to Fmin.
Figure 7. QA is Off, QB is On and Diode D2 Conducts
Current. Lm is Off the Picture as it is Dynamically
Shorted by the Output Voltage Reflection.
QA is off, QB is Off, Both Secondary Diodes are
Blocked
reversing (Figure 9). At this moment, when the HB node
reaches Vbulk + Vf, the body-diode of QA conducts and
ensures energy re-cycling through the input source
(Figure 10). You understand that this dead-time period must
last a time long enough to allow for the complete discharge
of CossA before re-activating QA so that its body-diode
turns on first. If not, hard switching occurs and efficiency
suffers.
As currents are oscillating, a time is reached where IL and
Imag are no longer equal (end of the plateau) and a current
circulates again in the primary side. D1 starts to conduct and
NVout appears across Lm :the resonant frequency goes back
from Fs to Fmin. Figure 10 describes this moment.
Both transistors are now open, this is the dead-time period
(DT on Figure 6). The dead-time is placed here to avoid
cross-conduction between both MOSFETs but also to favor
Zero Voltage Switching as we will see in a moment. Because
the current was circulating from drain to source in QB, the
circuit no longer sees an ohmic path when this transistor
opens. The current strives to find a way through the parasitic
drain-source capacitors Coss of both QA and QB: CossB starts
to charge (it was previously discharged by QB being on) and
given the rise of VHB towards the high voltage rail, CossA
sees its terminals voltage going down to zero and then
Vbulk
Vbulk
The Voltage is Falling
CossA
QA
Reaches (Vin + Vf) when
QA Body-Diode Conducts
The Voltage is Rising
LS
IL
Imag
N:1
D1
Vout
QA
Vf
LS
IL
VLm
+
Lm
QB
Iout
Imag
N:1
VLm
+
Lm
CossB
QB
Imag
Vout
D1
CossB
Imag
IL-Imag
D2
D2
CS
CS
IL
IL
Figure 9. QA is Off, QB is Off. The Current Finds a
Circulating Path Through Both Transistors Coss,
Both Secondary-Side Diodes are Off.
The Voltage is Rising
Figure 10. QA and QB are Still Off. The Current Finds
a Circulating Path through the Upper-side Body
Diode. D1 Starts Conducting at the End of the
Plateau when IL 0 Imag.
QA is on, QB is off, D1 is on
can therefore safely turn it on and benefit from Zero Voltage
Conditions. As we have a sinusoidal waveform in the
network, the resonating current reaches zero and reverses.
Now that QA body-diode is conducting, we have a
negligible voltage across its drain and source terminals: we
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AND8311/D
Lm is still dynamically shorted as D1 is conducting. The
energy is delivered by the source to the output load. This is
illustrated by Figure 11.
Figure 6. At this point, no current circulates in the
transformer and D1 naturally blocks. As explained before,
the magnetizing inductor re-appears in the circuit since the
output voltage reflection is gone. The resonant frequency
changes from Fmin to Fs and the energy to the load is
delivered by the output capacitor alone. Figure 12 shows the
circuit state during this event.
QA is on, QB is off, D1 turns off
The current IL is moving down and reaches the
magnetizing current level, we are the second plateau on
Vbulk
Vbulk
QA
+
IL
IL-Imag N:1
LS
LS
Imag
IL
+
CossB
VLm
+
Lm
Vout
CossB
QB
Imag
Imag
IL-Imag
D2
CS
CS
IL
IL
Figure 11. The Current is Now Flowing from the
Source to the Output Via the Upper-Side
Transistor QA.
Figure 12. As Both Diodes are Off, the Network
Includes the Magnetizing Inductance which
Changes the Resonant Frequency.
QA is of, QB is off, both secondary diodes are blocked
towards ground. The drain falls down in a resonating
manner, involving both Coss in parallel and the equivalent
inductor made of Ls + Lm. Figure 13 represents the circuit
during this event.
At a certain time, both transistors block and only their
drain-source capacitors remain in the circuit. The current
keeps circulating in the same direction but CossA starts to
charge: the voltage on the HB node drops and CossB depletes
Vbulk
LS
IL
Imag
N:1
CossA
QA
The Voltage is Falling
+
+
Vout
D1
LS
IL
VLm
N:1
Imag
+
Lm
QB
Vbulk
The Voltage is Rising
CossA
QA
Vout
N:1
Imag
Vout
VLm
Lm
QB
QA
+
Vout
D1
VLm
+
Lm
CossB
Vout
D1
QB
Imag
Imag
D2
D2
CS
CS
IL
IL
Figure 14. When the Voltage on the Node HB
Swings Below Ground, QB Body-Diode Conducts.
Figure 13. The Current is Still Flowing through the
Source and Contributes to Discharge CossB.
The bridge voltage further dips and becomes negative
until the body-diode of QB conducts. This is what Figure 14
suggests. At the end of the plateau, where IL = Imag, D2 will
start conducting, reflecting -NVout over the primary
inductance. The energy comes from Cs and Ls, as the source
is not playing any role here. The controller now activates QB
in ZVS and the transistor conducts in its 3rd quadrant for a
few moments, until the current reaches zero and swings
negative: we are back at the beginning of the first phase.
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Zero Voltage Switching
Figure 15 zooms on these ZVS events and show the
various signals in play. The MOSFET current starts to be
negative before the appearance of its gate-source bias: this
is the body-diode conduction period. Then the MOSFET
turns-on at a Vf across its drain-source terminals but the
current is still negative: we are in the 3rd quadrant
conduction. Finally, the current becomes positive and flows
from drain to source, back to the 1st quadrant.
400
V GS,lower
8
V HB
Vbridge (V)
200
I D,lower
0
6
2
-200
Body
1st
diode
quadrant
3rd
-400
Q B
quadrant
7
9
V GS,upper
400
Vbridge (V)
V HB
200
I D,upper
3
0
1st
Body -200
quadrant
Diode
-400
3rd
quadrant
Q A
485u
488u
491u
TIME (s)
494u
497u
Figure 15. Simulation Results Zooming on the MOSFET Variables
ZVS A
V bridge
V gsB
V gsA
I L(t)
ZVS B
Figure 16. Measured Signals on a Demonstration Board Showing the ZVS Operation on QA.
Zero Current Switching
The selection of a controller where the dead-time is
adjustable therefore represents an important selection
argument to fine tune the behavior and ensure a minimum
conduction period of both body-diodes.
By the term ZCS, we assume a natural blocking event
when the current in the semiconductor is zero. When
operating the LLC converter below Fs, as it is the case in this
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example, both secondary-side diodes are operated in ZCS.
The current in the concerned diode (D1 or D2) naturally
reaches 0 when the magnetizing current Imag equals the main
resonating current IL. This is the plateau on figure 6.
Observing the diode current in this particular mode gives
smooth signals as shown on Figure 17.
I
48.0
22.0
d
4.00
I
L
-I
mag
Diode blocks
24.0
2.00
11.0
0
iprim in amperes
0
idiodein amperes
Plot1
vdiodein volts
here as
I
d
=0
0
12
10
Both diodes
are blocked.
-24.0
-11.0
11
-2.00
The other diode
-48.0
-22.0
conducts,
-4.00
484u
487u
490u
493u
V
R
=
-2 V
out
495u
TIME (s)
Figure 17. The Secondary-Side Diodes are Naturally Blocked When the Primary Current Vanishes to Zero
Startup sequence and short-circuit
differentiating the voltage across the capacitor Cs and
routing the resulting voltage to a fast latch input. Figure 19
shows this solution where the component values must be
adjusted to avoid false triggering in normal operating
transients.
Reference [1] has experimented a solution where the
resonating capacitor is split in two values - Cs/2 - and two
high voltage diodes clamp the voltage excursion between
ground and the bulk rail. As the voltage across the capacitor
is limited, the resonant current is also clamped. The solution
appears in Figure 20. There are several drawbacks
associated to the usage of this diode arrangement such as a
variable clamping level in relationship to the high-voltage
rail. However, experience shows that this simple circuit
brings an efficient protection to the converter experiencing
a short-circuit. The diodes must be of fast types, MUR260
can be selected for this purpose.
During startup or short-circuit, the magnetizing inductor
is shorted and the resonant frequency becomes Fs. Because
we designed the LLC converter to operate at a frequency
lower than Fs, the operating fault mode (lack of feedback) of
the controller naturally lies below Fs. In other words, if the
LLC converter quickly starts-up, without soft-start at all,
the controller will quickly sweep from a high frequency
value down to the minimum authorized in case of fault. The
current in the network can therefore peak to a high value (at
resonance, the LC impedance is only limited by ohmic
losses) and destroy the power MOSFETs instantaneously.
Figure 18a shows an oscilloscope shot captured on a LLC
circuit started with a short soft-start period (≈20 ms): the
current peaks to 6 A. Increasing the soft-start period to a few
hundred of milliseconds clearly helps to smooth the peak
and keep it below 4 A.
Short-circuit protection is more difficult to achieve given
the resonating nature of the circuit. Some solutions exist like
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Imax = 6.2 A
Imax = 3.8 A
Css = 1 μF
Css = 10 μF
IL(t)
a
IL(t)
b
Figure 18. The LLC converter peaks to a high current if started too quickly. Increasing the soft-start sequence
naturally calms down the current excursion.
Vbulk
QA
LS
R15
10k
C4
10n
D1
Lm
QB
To Latch
Open
N:1
R16
D2
1k 1N4937
+
C8
100p
R14
10k
Vout
Cout
Rload
D2
CS
Figure 19. Differentiating the Voltage Across the Resonant Capacitor Gives an Indication of the Current Flowing
Through it
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Vbulk
QA
CS/2
LS
N:1
D1
Lm
QB
Vout
+
Cout
Rload
D2
CS/2
Figure 20. To Keep the Voltage Excursion on the Resonant Capacitor within Safe Limits, a Diode Network Forbids
any Lethal Runaways
Operating Waveforms Above the Series Resonance,
Fsw > Fs
secondary diode is always conducting. In other
words, a single resonance occurs in this mode at
full power, implying Ls and Cs only. Lm is out of
the picture as long as the converter operates in
continuous conduction mode (full load operation).
2. Observing Figure 21, we can see that the main
resonant current IL changes from a sinusoidal
waveshape to a straight line, implying a change in
the operating mode. This change occurs when a
voltage discontinuity appears across Ls terminals.
This discontinuity comes from the delay between
the bridge signal VHB and the reflected voltage
polarity across the magnetizing inductor Lm.
Figure 22 zooms on this particular moment where
we can see that the bridge voltage goes down to
zero via the body-diode activation of QB, but
because there is still current flowing in the
transformer primary side (IL is different than Imag),
one of the secondary diode is still conducting,
imposing a constant reflected output voltage
across Lm. The voltage across Ls is up by one step
which starts to reset it towards zero. This is the
beginning of the linear segment, if we consider the
voltage across Ls almost constant. When IL
reaches the magnetizing current Imag, the
conducting diode blocks and the primary current
transitions to the second diode which now
conducts. The voltage polarity across Lm reverses
and the resonant current goes back to its sinusoidal
shape. The next segment occurs when QB opens
and the bridge voltage jumps to Vin via QA
body-diode. This segment lasts until IL reaches
Imag again.
For this example, we have selected a set of elements which
operate the converter above the series resonance defined by
equation 1. The following values have been used:
Lm = 1.2 mH
Ls = 200 mH
Cs = 44 nF
N=6
F max + F S +
1
2p ǸL SC S
1
+
6.28
Ǹ200m
44n
+ 53.7kHz
F min +
1
2p Ǹ(L S ) L m)C S
1
+
6.28
Ǹ(200m ) 1.2m)
+ 20kHz
44n
Fsw = 70 kHz at full load and nominal input voltage.
The converter still delivers 24 V@10 A from a 380 Vdc
input source and a simulation has been conducted using the
above values. Figure 21 shows the main waveforms
obtained from the simulator. There are several differences
between this operating mode and the previous one:
1. In the previous mode, the magnetizing inductance
was released at a point where both secondary-side
diodes were blocked (IL = Imag). The resonant
frequency was therefore moved from Fs to Fmin
during a certain time (the plateau on Figure 6).
When operated above the series frequency Fs, the
magnetizing inductance is always shorted by the
reflected voltage NVout or -NVout as one of the
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AND8311/D
Plot1
vgsl,vgsuin volts
14.0
V GS,upper
V GS,lower
5
10.0
Q B is on
Q A is off
6.00
2.00
Q B is off
Q A is on
DT
6
4.00
2.00
0
-2.00
Gate voltages
400
vbridge in volts
Plot2
ils,i(lmag)in amperes
-2.00
Resonant currents
300
V HB
I mag
200
9
100
IL
0
Plot3
id(d3a),id(d3b)in amperes
-4.00
35.0
8
7
Diode current
25.0
I d,peak
I d2
I d1
11
15.0
I out
5.00
10
-5.00
473u
477u
481u
time in seconds
485u
490u
4.00
0
-4.00
-8.00
200
vprim in volts
Plot2
ils in amperes
8.00
100
0
-100
vbridge in volts
Figure 21. Figure 6 Waveforms Updated with a Converter now Operating Above the Series-Resonant Frequency
Fs
400
VL mag
200
14
IL s
100
V HB
0 S [( V
Lmag+ VC s ) L s
-200
15
ZVS
300
19
S [ ( V L + V bulk) L s
mag
ZVS
Plot1
vgsl,vgsuin volts
14.0
10.0
17
V GS,upper
V GS,lower
V GS,upper
6.00
2.00
16
Plot3
vls,vcapresoin volts
-2.00
800
VL
+ VC s
mag
400
VC s
21
7
0
VL s
-400
VL
+ V in
mag
-800
484u
487u
490u
494u
497u
time in seconds
Figure 22. The Voltage Discontinuity Across Ls Induces a Linear Segment in the Resonant Waveform
1. The diode are still operated in ZCS despite a
switching frequency above Fs. This is thanks to the
linear reset taking place on the resonant current
(the segment on IL(t)) which smoothly leads the
concerned diode to a blocking state. Figure 23
illustrates this fact.
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AND8311/D
I
4.00
20.0
40.0
d
I
S [ (V L
+ VC
mag
0
-I
mag
20.0
vdiodein volts
0
10.0
idiodein amperes
Plot1
iprimin amperes
2.00
L
s)
L s
2
0
-2.00
-10.0
-20.0
-4.00
-20.0
-40.0
1
The other diode
conducts,
V
R
=
-2 V
out
3
481u
484u
487u
time in seconds
490u
493u
Figure 23. A Zoom on the Switching Diodes Reveal a ZCS Operation for Fsw greater than Fs
Operating Waveforms at the Series Resonance, Fsw =
Fs
F min +
For this final example, we have selected a set of elements
which operate the converter at the series resonance defined
by Equation 1. The following values have been used:
Lm = 1.6 mH
Ls = 277 mH
Cs = 17 nF
N=8
F max + F S +
1
2p ǸL SC S
6.28
Ǹ277m
2p Ǹ(L S ) L m)C S
1
+
6.28
Ǹ(277m ) 1.6m)
+ 28.2kHz
44n
Fsw = 73 kHz at full load and nominal input voltage.
When operated at the tank resonant frequency, the main
current IL(t) is sinusoidal as confirmed by Figure 24.
1
+
1
17n
+ 73.4kHz
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AND8311/D
plot3
vgsu, vgsl in volts
16.0
Gate voltages
12.0
V
8.00
V
GS,upper
Q
4.00
Q
B
A
15
GS,lower
is off
Q
B
DT
is on
Q
A
is on
is off
plot1
vbridge in volts
400
300
200
100
ils, i(lmag) in amperes
0
plot2
id(d3a), id(d3b) in amperes
0
14
4.00
16
2.00
I
mag
17
20
0
-2.00
I
I
=I
L
mag
V
-4.00
L
I
=I
L
mag
HB
Resonant currents
20.0
I
I
d,peak
I
d1
10.0
d2
I
0
out
19
18
-10.0
-20.0
Diode current
677u
681u
685u
time in seconds
688u
692u
Figure 24. At the Resonant Frequency, the Main Current is Sinusoidal. Also, There is no Deadtime Between the
Secondary-Side Diode Conduction Periods.
In this mode, the EMI signature is excellent as the
distortion is least compared to the other modes. The
secondary-side currents are at the boundary between the
segment-like shape and the dead-time period, as
respectively observed for Fsw > Fs and Fsw < Fs. As we
observed before, the diode block when the resonant current
equal the magnetizing current Imag.
Operating the LLC at the series resonant frequency offers
another advantage. Back to Figure 3, we can see a point
where all curves cross. This point, for which Vout/Vin = 1, is
reached at the series resonance. When operated at this
particular position, the LLC resonant network transfer
function becomes insensitive to load variations. This
characteristics is sometimes exploited when a LLC
converter is designed to operate at a fixed switching
frequency locked to Fs and the feedback loop drives the
output voltage of a pre-converter.
The RMS current in the output capacitor is also at its
lowest value as no discontinuity, or deadtime, exists as
shown on figure 6 for Fsw < Fs. We can quickly derive its
value in presence of sinusoidal signals:
I d.RMS +
I d.peak
Ǹ2
I dc +
2I d.peak
(eq. 9)
p
We can then evaluate the ac current flowing into the output
capacitor applying the following equation:
I Cou.RMS +
ǸI2RMS * I2dc +
Ǹ
I2
peak
2
4I 2
*
d.peak
p2
(eq. 10)
[ 0.3I d.peak
In the simulated example, if we have a diode peak current of
15.7 A at steady-state, the RMS current flowing in the
capacitor is therefore 4.7 A. If we simulate a similar
converter in a 100 kHz 2-switch forward configuration, the
RMS current in the output capacitor reduces down to 0.5
Arms. That is one of the major disadvantage of the resonant
operation. The switching losses are almost removed,
allowing high-frequency operation, but conduction losses
increase significantly.
Conclusion
This quick study of the LLC converter explores the
various operating modes of the power supply, mainly
dictated by the switching frequency value in relationship to
the series resonant frequency Fs. Most of LLC designs are
operated at the series resonance in full load and nominal
input voltage conditions. The controller allows operation
below Fs during an input voltage drop and lets the frequency
exceed Fs in light load conditions. Despite sinusoidal
(eq. 8)
The total dc current contributed by both diodes in the output
current delivered by the converter. This dc current can be
linked to the equivalent full-wave rectification and equals:
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15
AND8311/D
currents, care must be taken in the selection of the output
capacitor given the high ac ripple. Compared to
buck-derived applications, this is the penalty to pay with
LLC converters, however, largely compensated by the
reduction in switching losses on both the primary transistors
(ZVS) and the secondary-side diodes (ZCS).
2. Bo Yang, “Topology Investigation for Front-End
dc-dc Power Conversion for Distributed Power
System”, Virginia Tech Dissertation, 2003”
http://scholar.lib.vt.edu/theses/available/etd-09152
003-180228/unrestricted/
References:
1. Bo Yang, Fred C. Lee, Matthew Concannon, Over
Current Protection Methods for LLC Resonant
Converter, IEEE Conference 2003
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