Digital Potentiometer (POT), Log Taper, 100-Tap

CAT5116
Log‐taper, 100‐tap
Digital Potentiometer (POT)
Description
The CAT5116 is a log-taper single digital POT designed as an
electronic replacement for mechanical potentiometers.
Ideal for automated adjustments on high volume production lines,
ICs are well suited for applications where equipment requiring
periodic adjustment is either difficult to access or located in a
hazardous or remote environment.
The CAT5116 contains a 100-tap series resistor array connected
between two terminals RH and RL. An up/down counter and decoder
that are controlled by three input pins, determines which tap is
connected to the wiper, RW.
The wiper setting, stored in nonvolatile memory, is not lost when the
device is powered down and is automatically reinstated when power is
returned. The wiper can be adjusted to test new system values without
effecting the stored setting.
Wiper-control of the CAT5116 is accomplished with three input
control pins, CS, U/D, and INC. The INC input increments the wiper
in the direction which is determined by the logic state of the U/D input.
The CS input is used to select the device and also store the wiper
position prior to power down.
The digital POT can be used as a three-terminal resistive divider or
as a two-terminal variable resistor.
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SOIC−8
V SUFFIX
CASE 751BD
MSOP−8
Z SUFFIX
CASE 846AD
PDIP−8
L SUFFIX
CASE 646AA
TSSOP−8
Y SUFFIX
CASE 948AL
PIN CONFIGURATIONS
INC
U/D
RH
GND
Features








100-position, Log-taper Potentiometer
Non-volatile EEPROM Wiper Storage
10 nA Ultra-low Standby Current
Single-supply Operation: 2.5 V − 5.5 V
Increment Up/Down Serial Interface
Resistance Value: 32 kW
Available in 8-pin MSOP, TSSOP, SOIC and DIP Packages
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
1
VCC
CS
RL
RWB
PDIP (L), SOIC (V), MSOP (Z)
CS
VCC
INC
U/D
1
RL
RW
GND
RH
TSSOP (Y)
(Top Views)
PIN FUNCTION
Pin Name
Function
Applications
INC
Increment Control







U/D
Up/Down Control
RH
Potentiometer High Terminal
Automated Product Calibration
Remote Control Adjustments
Offset, Gain and Zero Control
Audio Volume Control
Sensor Adjustment
Motor Controls and Feedback Systems
Programmable Analog Functions
GND
Ground
RW
Buffered Wiper Terminal
RL
Potentiometer Low Terminal
CS
Chip Select
VCC
Supply Voltage
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
 Semiconductor Components Industries, LLC, 2013
June, 2013 − Rev. 14
1
Publication Order Number:
CAT5116/D
CAT5116
Functional Diagram
VCC
RH
165 
VCC
RH
U/D
INC
CS
Control
and
Memory
Power On
Recall
GND
U/D
INC
CS
LOG
TAPER
RTOT = 32 kW
Interface
&
Wiper
Control
Potentiometer
R = 32 k
RW
11 
GND
10.4 
RL
Figure 1. General
RW
RW
EEPROM
RL
RH
Figure 2. Block Diagram
RL
Figure 3. Potentiometer
Schematic
Device Operation
The CAT5116 operates like a digitally controlled
potentiometer with RH and RL equivalent to the high and low
terminals and RW equivalent to the mechanical
potentiometer’s wiper. There are 100 tap positions including
the resistor end points, RH and RL. There are 99 resistor
elements connected in series between the RH and RL
terminals. The wiper terminal is connected to one of the 100
taps and controlled by three inputs, INC, U/D and CS. These
inputs control a seven-bit up/down counter whose output is
decoded to select the wiper position. The selected wiper
position can be stored in nonvolatile memory using the INC
and CS inputs.
With CS set LOW the CAT5116 is selected and will
respond to the U/D and INC inputs. HIGH to LOW
transitions on INC will increment or decrement the wiper
(depending on the state of the U/D input and seven-bit
counter). The wiper, when at either fixed terminal, acts like
its mechanical equivalent and does not move beyond the last
position. The value of the counter is stored in nonvolatile
memory whenever CS transitions HIGH while the INC input
is also HIGH. When the CAT5116 is powered-down, the last
stored wiper counter position is maintained in the
nonvolatile memory. When power is restored, the contents
of the memory are recalled and the counter is set to the value
stored.
With INC set low, the CAT5116 may be deselected and
powered down without storing the current wiper position in
nonvolatile memory. This allows the system to always
power up to a preset value stored in nonvolatile memory.
Pin Description
INC: Increment Control Input
The INC input moves the wiper in the up or down direction
determined by the condition of the U/D input.
U/D: Up/Down Control Input
The U/D input controls the direction of the wiper movement.
When in a high state and CS is low, any high-to-low
transition on INC will cause the wiper to move one
increment toward the RH terminal. When in a low state and
CS is low, any high-to-low transition on INC will cause the
wiper to move one increment towards the RL terminal.
RH: High End Potentiometer Terminal
RH is the high end terminal of the potentiometer. It is not
required that this terminal be connected to a potential greater
than the RL terminal. Voltage applied to the RH terminal
cannot exceed the supply voltage, VCC or go below ground,
GND.
RW: Wiper Potentiometer Terminal
RW is the wiper terminal of the potentiometer. Its position on
the resistor array is controlled by the control inputs, INC,
U/D and CS. Voltage applied to the RW terminal cannot
exceed the supply voltage, VCC or go below ground, GND.
RL: Low End Potentiometer Terminal
RL is the low end terminal of the potentiometer. It is not
required that this terminal be connected to a potential less
than the RH terminal. Voltage applied to the RL terminal
cannot exceed the supply voltage, VCC or go below ground,
GND. RL and RH are electrically interchangeable.
CS: Chip Select
The chip select input is used to activate the control input of
the CAT5116 and is active low. When in a high state, activity
on the INC and U/D inputs will not affect or change the
position of the wiper.
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2
CAT5116
Table 1. OPERATION MODES
INC
CS
U/D
Operation
High to Low
Low
High
Wiper toward H
High to Low
Low
Low
Wiper toward L
High
Low to High
X
Store Wiper Position
Low
Low to High
X
No Store, Return to Standby
X
High
X
Standby
RH
CH
RWI
RW
CW
CL
RL
Figure 4. Potentiometer Equivalent Circuit
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Supply Voltage
VCC to GND
−0.5 to +7
Inputs
CS to GND
−0.5 to VCC +0.5
Units
V
V
INC to GND
−0.5 to VCC +0.5
V
U/D to GND
−0.5 to VCC +0.5
V
RH to GND
−0.5 to VCC +0.5
V
RL to GND
−0.5 to VCC +0.5
V
RW to GND
−0.5 to VCC +0.5
V
Operating Ambient Temperature
Industrial (‘I’ suffix)
C
−40 to +85
Junction Temperature (10 s)
+150
C
Storage Temperature
+150
C
Lead Soldering (10 s max)
+300
C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. RELIABILITY CHARACTERISTICS
Symbol
Parameter
VZAP (Note 1)
ESD Susceptibility
MIL−STD−883, Test Method 3015
2000
V
Latch-up
JEDEC Standard 17
100
mA
Data Retention
MIL−STD−883, Test Method 1008
100
Years
Endurance
MIL−STD−883, Test Method 1003
1,000,000
Stores
ILTH (Notes 1, 2)
TDR
NEND
Test Method
Min
Typ
1. This parameter is tested initially and after a design or process change that affects the parameter.
2. Latch-up protection is provided for stresses up to 100 mA on address and data pins from −1 V to VCC + 1 V.
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3
Max
Units
CAT5116
Table 4. DC ELECTRICAL CHARACTERISTICS (VCC = +2.5 V to +5.5 V unless otherwise specified)
Parameter
Min
Typ
Max
Units
2.5
–
5.5
V
VCC = 5.5 V, f = 1 MHz, IW = 0
–
–
100
mA
VCC = 5.5 V, f = 250 kHz, IW = 0
–
–
50
mA
Programming, VCC = 5.5 V
–
–
1
mA
VCC = 3 V
–
–
500
mA
Supply Current (Standby)
CS = VCC − 0.3 V
U/D, INC = VCC − 0.3 V or GND
–
0.01
1
mA
IIH
Input Leakage Current
VIN = VCC
–
–
10
mA
IIL
Input Leakage Current
VIN = 0 V
–
–
−10
mA
VIH1
TTL High Level Input Voltage
4.5 V  VCC  5.5 V
2
–
VCC
V
VIL1
TTL Low Level Input Voltage
0
–
0.8
V
VIH2
CMOS High Level Input Voltage
VCC x 0.7
–
VCC + 0.3
V
VIL2
CMOS Low Level Input Voltage
−0.3
–
VCC x 0.2
V
Symbol
Conditions
POWER SUPPLY
VCC
ICC1 (Note 5)
ICC2
ISB1
Operating Voltage Range
Supply Current (Increment)
Supply Current (Write)
LOGIC INPUTS
2.5 V  VCC  5.5 V
POTENTIOMETER PARAMETERS
RPOT
Potentiometer Resistance
RTOL
Pot. Resistance Tolerance
VRH
Voltage on RH pin
0
0
VRL
Voltage on RL pin
RV (Note 6)
Relative Variation
RWI
Wiper Resistance
IW
TC of Pot Resistance
TCRATIO
Ratiometric TC
CH/CL/CW
fc
3.
4.
5.
6.
Noise
20
%
VCC
V
VCC
V
VCC = 5 V, IW = 1 mA
200
400
W
VCC = 2.5 V, IW = 1 mA
400
1000
W
1
mA
300
ppm/C
20
100 kHz / 1 kHz
Potentiometer Capacitances
Frequency Response
kW
0.05
Wiper Current
TCRPOT
VN
32
Passive Attenuator, 10 kW
nV/Hz
8/8/25
pF
1.7
MHz
Latch-up protection is provided for stresses up to 100 mA on address and data pins from −1 V to VCC + 1 V.
This parameter is tested initially and after a design or process change that affects the parameter.
IW = source or sink.
Relative variation is a measure of the error in step size between taps = log (VW(N)) − log(VW(N−1)) = 0.045  0.003.
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ppm/C
8/24
CAT5116
Table 5. AC TEST CONDITIONS
VCC Range
2.5 V  VCC  5.5 V
Input Pulse Levels
0.2 VCC to 0.7 VCC
Input Rise and Fall Times
10 ns
Input Reference Levels
0.5 VCC
Table 6. AC OPERATING CHARACTERISTICS (VCC = +2.5 V to +5.5 V, VH = VCC, VL = 0 V, unless otherwise specified)
Parameter
Symbol
Min
Typ (Note 7)
Max
Units
100
−
−
ns
tCI
CS to INC Setup
tDI
U/D to INC Setup
50
−
−
ns
tID
U/D to INC Hold
100
−
−
ns
tIL
INC LOW Period
250
−
−
ns
tIH
INC HIGH Period
250
−
−
ns
tIC
INC Inactive to CS Inactive
1
−
−
ms
tCPH1
CS Deselect Time (NO STORE)
100
−
−
ns
tCPH2
CS Deselect Time (STORE)
10
−
−
ms
INC to VOUT Change
−
1
5
ms
INC Cycle Time
1
−
−
ms
INC Input Rise and Fall Time
−
−
500
ms
Power-up to Wiper Stable
–
–
1
ms
Store Cycle
–
5
10
ms
tIW
tCYC
tR, tF (Note 8)
tPU (Note 8)
tWR
7. Typical values are for TA = 25C and nominal supply voltage.
8. This parameter is periodically sampled and not 100% tested.
9. MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
CS
tCI
tIL
tCYC
tIC
tIH
(store)
tCPH
90%
INC
90%
10%
tDI
tID
tF
U/D
tR
MI(3)
tIW
RW
Figure 5. A.C. Timing
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CAT5116
TYPICAL CHARACTERISTICS
(VCC = 5 V, TAMB = 25C, unless otherwise specified)
100
100
RH − RW
80
TOTAL RESISTANCE (%)
TOTAL RESISTANCE (%)
90
70
60
50
40
30
20
RW − RL
10
1
10
0
0
10
20
30
40
50
60
70
80
90
0.1
100
20
30
40
50
60
70
80
90 100
WIPER POSITION
Figure 6. Wiper-Low/High Resistances vs.
Wiper Position
Figure 7. Wiper-Low Resistance vs. Wiper
Position (Log Scale)
100
VCC = 3.0 V
Tap 84
500
STANDBY CURRENT (nA)
WIPER RESISTANCE (W)
10
WIPER POSITION
600
400
300
VCC = 4.4 V
Tap 84
200
100
0
0
80
60
VCC = 5 V
40
20
VCC = 2.5 V
0
1
2
3
4
5
0
−40
6
−15
10
35
60
WIPER VOLTAGE (V)
TEMPERATURE (C)
Figure 8. Wiper Resistance vs. Wiper Voltage
Figure 9. Standby Supply Current vs.
Temperature
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85
CAT5116
Table 7. ORDERING INFORMATION
Package
Shipping†
CAT5116LI−G
PDIP−8
(Pb−Free)
50 Units / Rail
CAT5116VI−G
SOIC−8
(Pb−Free)
100 Units / Rail
CAT5116VI−GT3
SOIC−8
(Pb−Free)
3000 / Tape & Reel
CAT5116YI−G
TSSOP−8
(Pb−Free)
100 Units / Rail
CAT5116YI−GT3
TSSOP−8
(Pb−Free)
3000 / Tape & Reel
CAT5116ZI
MSOP−8
(Pb−Free)
96 Units / Rail
CAT5116ZI−T3
MSOP−8
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
10. For detailed information and a breakdown of device nomenclature and numbering systems, please see the ON Semiconductor Device
Nomenclature document, TND310/D, available at www.onsemi.com.
11. All packages are RoHS-compliant (Lead-free, Halogen-free).
12. The standard lead finish is NiPdAu.
13. Contact factory for Matte-Tin finish.
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CAT5116
PACKAGE DIMENSIONS
PDIP−8, 300 mils
CASE 646AA
ISSUE A
SYMBOL
MIN
NOM
A
E1
5.33
A1
0.38
A2
2.92
3.30
4.95
b
0.36
0.46
0.56
b2
1.14
1.52
1.78
c
0.20
0.25
0.36
D
9.02
9.27
10.16
E
7.62
7.87
8.25
E1
6.10
6.35
7.11
e
PIN # 1
IDENTIFICATION
MAX
2.54 BSC
eB
7.87
L
2.92
10.92
3.30
3.80
D
TOP VIEW
E
A2
A
A1
c
b2
L
e
eB
b
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-001.
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CAT5116
PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD
ISSUE O
E1
E
SYMBOL
MIN
A
1.35
1.75
A1
0.10
0.25
b
0.33
0.51
c
0.19
0.25
D
4.80
5.00
E
5.80
6.20
E1
3.80
MAX
4.00
1.27 BSC
e
PIN # 1
IDENTIFICATION
NOM
h
0.25
0.50
L
0.40
1.27
θ
0º
8º
TOP VIEW
D
h
A1
θ
A
c
e
b
L
END VIEW
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
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CAT5116
PACKAGE DIMENSIONS
MSOP 8, 3x3
CASE 846AD
ISSUE O
SYMBOL
MIN
NOM
MAX
1.10
A
E
A1
0.05
0.10
0.15
A2
0.75
0.85
0.95
b
0.22
0.38
c
0.13
0.23
D
2.90
3.00
3.10
E
4.80
4.90
5.00
E1
2.90
3.00
3.10
E1
0.65 BSC
e
L
0.60
0.40
0.80
L1
0.95 REF
L2
0.25 BSC
θ
0º
6º
TOP VIEW
D
A
A2
A1
DETAIL A
e
b
c
SIDE VIEW
END VIEW
q
L2
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-187.
L
L1
DETAIL A
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CAT5116
PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL
ISSUE O
b
SYMBOL
MIN
NOM
1.20
A
E1
E
MAX
A1
0.05
A2
0.80
b
0.19
0.15
0.90
1.05
0.30
c
0.09
D
2.90
3.00
3.10
E
6.30
6.40
6.50
E1
4.30
4.40
4.50
0.20
0.65 BSC
e
L
1.00 REF
L1
0.50
θ
0º
0.60
0.75
8º
e
TOP VIEW
D
A2
c
q1
A
A1
L1
SIDE VIEW
L
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
Sales Representative
CAT5116/D
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