1920 (H) X 1080 (V) INTERLINE CCD IMAGE SENSOR

KAI-2093 IMAGE SENSOR
1920 (H) X 1080 (V) INTERLINE CCD IMAGE SENSOR
JUNE 11, 2014
DEVICE PERFORMANCE SPECIFICATION
REVISION 1.1 PS-0026
KAI-2093 Image Sensor
TABLE OF CONTENTS
Summary Specification ......................................................................................................................................................................................... 5
Description .................................................................................................................................................................................................... 5
Features ......................................................................................................................................................................................................... 5
Applications .................................................................................................................................................................................................. 5
Ordering Information ............................................................................................................................................................................................ 6
Device Description ................................................................................................................................................................................................. 7
Architecture .................................................................................................................................................................................................. 7
Pin Description and Physical Orientation .............................................................................................................................................. 8
Imaging Performance ............................................................................................................................................................................................ 9
Typical Operational Conditions................................................................................................................................................................ 9
Optical Specifications ................................................................................................................................................................................. 9
CCD Specifications ...................................................................................................................................................................................... 9
Output Amplifier Specifications ........................................................................................................................................................... 10
General Specifications ............................................................................................................................................................................. 10
Typical Performance Curves ............................................................................................................................................................................ 11
Monochrome Quantum Efficiency ....................................................................................................................................................... 11
Monochrome with Microlens Angular Quantum Efficiency ........................................................................................................... 11
Color with Microlens Quantum Efficiency .......................................................................................................................................... 12
Frame Rates ............................................................................................................................................................................................... 13
Defect Definitions ................................................................................................................................................................................................ 14
Operational Conditions ........................................................................................................................................................................... 14
Specifications............................................................................................................................................................................................. 14
Defect Zones ............................................................................................................................................................................................. 15
Defect Classes ........................................................................................................................................................................................... 15
KAI-2093-ABA-CB-B1 ........................................................................................................................................................................... 15
All Other Part Numbers ...................................................................................................................................................................... 15
Operation .................................................................................................................................................................................................................. 16
Absolute Maximum Ratings ................................................................................................................................................................... 16
DC Bias Operating Conditions ............................................................................................................................................................... 16
AC Operating Conditions ........................................................................................................................................................................ 17
Clock Capacitance..................................................................................................................................................................................... 17
Operation Notes ....................................................................................................................................................................................... 18
Progressive and Interlaced Timing................................................................................................................................................... 18
Single Output Mode ............................................................................................................................................................................ 18
Dual Output Mode ................................................................................................................................................................................... 18
Exposure Control ...................................................................................................................................................................................... 19
Dark References ....................................................................................................................................................................................... 19
Connections to the Image Sensor ........................................................................................................................................................ 19
Timing ......................................................................................................................................................................................................................... 20
Requirements and Characteristics ....................................................................................................................................................... 20
Frame Timing ............................................................................................................................................................................................. 21
Frame Timing – Progressive Scan ..................................................................................................................................................... 21
Vertical Clock Edge Alignment .............................................................................................................................................................. 22
Frame Timing – Field Integration Mode .............................................................................................................................................. 23
Frame Timing – Frame Integration Mode ........................................................................................................................................... 24
Line Timing ................................................................................................................................................................................................. 25
Electronic Shutter Timing ....................................................................................................................................................................... 26
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Revision 1.1 PS-0026 Pg 2
KAI-2093 Image Sensor
Storage and Handling .......................................................................................................................................................................................... 27
Storage Conditions................................................................................................................................................................................... 27
ESD ............................................................................................................................................................................................................... 27
Cover Glass Care and Cleanliness ......................................................................................................................................................... 27
Environmental Exposure ........................................................................................................................................................................ 27
Soldering Recommendations ................................................................................................................................................................ 27
Mechanical Drawings ........................................................................................................................................................................................... 28
Completed Assembly ............................................................................................................................................................................... 28
Cover Glass ................................................................................................................................................................................................. 30
Clear Cover Glass .................................................................................................................................................................................. 30
Quartz Cover Glass with AR Coatings .................................................................................................................................................. 31
Glass Transmission ................................................................................................................................................................................... 32
Quality Assurance and Reliability .................................................................................................................................................................. 33
Quality and Reliability ............................................................................................................................................................................. 33
Replacement .............................................................................................................................................................................................. 33
Liability of the Supplier ........................................................................................................................................................................... 33
Liability of the Customer ........................................................................................................................................................................ 33
Test Data Retention ................................................................................................................................................................................. 33
Mechanical.................................................................................................................................................................................................. 33
Life Support Applications Policy .................................................................................................................................................................... 33
Revision Changes................................................................................................................................................................................................... 34
MTD/PS-0307 ............................................................................................................................................................................................. 34
PS-0026 ....................................................................................................................................................................................................... 34
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Revision 1.1 PS-0026 Pg 3
KAI-2093 Image Sensor
TABLE OF FIGURES
Figure 1: Sensor Architecture ...................................................................................................................................................................... 7
Figure 2: Package Pin Designations - Top View....................................................................................................................................... 8
Figure 3: Quantum Efficiency Spectrum for Monochrome Sensors .................................................................................................11
Figure 4: Angular Dependence of Quantum Efficiency .......................................................................................................................11
Figure 5: Quantum Efficiency Spectrum for Color Filter Array Sensors..........................................................................................12
Figure 6: Color Filter Array Pattern ..........................................................................................................................................................12
Figure 7: Progressive Frame Rate vs. HCCD Clock Frequency ...........................................................................................................13
Figure 8: Defect Zones ................................................................................................................................................................................15
Figure 9: Progressive Frame Timing .........................................................................................................................................................21
Figure 10: Ideal Vertical Clock Edge Position ........................................................................................................................................22
Figure 11: Interlaced Frame Timing - Field Integration Mode ...........................................................................................................23
Figure 12: Interlaced Frame Timing - Frame Integration Mode ........................................................................................................24
Figure 13: Line Timing .................................................................................................................................................................................25
Figure 14: Electronic Shutter Timing Diagram ......................................................................................................................................26
Figure 15: Completed Assembly (1 of 2) .................................................................................................................................................28
Figure 16: Completed Assembly (2 of 2) .................................................................................................................................................29
Figure 17: Clear Cover Glass Drawing ......................................................................................................................................................30
Figure 18: Quartz Cover Glass with AR Coating Drawing ...................................................................................................................31
Figure 19: Cover Glass Transmission ........................................................................................................................................................32
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Revision 1.1 PS-0026 Pg 4
KAI-2093 Image Sensor
Summary Specification
KAI-2093 Image Sensor
DESCRIPTION
The KAI-2093 Image Sensor is a high-performance multimegapixel image sensor designed for a wide range of
medical imaging and machine vision applications.
The 7.4 µm square pixels with microlenses provide high
sensitivity and the large full well capacity results in high
dynamic range. The split horizontal register offers a
choice of single or dual output allowing either 15 or 30
frame per second (fps). The architecture allows for either
progressive scan or interlaced readout. The imager
features 5 V clocking to facilitate camera design. The
vertical overflow drain structure provides antiblooming
protection, and enables electronic shuttering for precise
exposure control.
FEATURES

Progressive scan (non-interlaced)

HCCD and output amplifier capable of 40 MHz
operation


5 V HCCD clocking
Single or dual video output operation
Parameter
Typical Value
Architecture
Interline CCD, Progressive Scan
or Interlaced Readout
Total Number of Pixels
1984 (H) x 1092 (V)
Number of Effective Pixels
1928 (H) x 1084(V)
Number of Active Pixels
1920 (H) x 1080 (V)
Pixel Size
7.4 µm (H) x 7.4 µm (V)
Active Image Size
14.208 mm (H) x 7.992 mm (V)
16.3 mm (diagonal)
Aspect Ratio
16:9
Number of Outputs
1 or 2
Saturation Signal
40,000 electrons
Output Sensitivity
14 µV/electron
Quantum Efficiency KAI-2093-ABA
(490 nm)
40%
Quantum Efficiency KAI-2093-CBA
R(620 nm), G(540nm), B(460nm)
37%, 34%, 30%
Total Noise
40 electrons rms
Dark Current (Typical)
<0.5 nA/cm2
Dynamic Range
60 dB

28 light shielded reference columns per output
Blooming Suppression
100 X

Only 2 vertical CCD clocks and 2 horizontal CCD
clocks
Smear
<0.03%
Image Lag
<10 electrons

Electronic shutter

Low Dark Current
Frame Rate
Single Output, 20 MHz
Single Output, 35 MHz
Dual Outputs, 20 MHz
Dual Outputs, 37 MHz
9 fps
15 fps
17 fps
30 fps
Maximum Data Rate
40 MHz/Channel (2 channels)
Package
32 pin cerDIP
APPLICATIONS

Intelligent Transportation Systems

Machine Vision

Surveillance
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Clear Glass or
Quartz Glass with AR Coating,
2 sides
Parameters above are specified at T = 40 °C unless otherwise noted.
Cover Glass
Revision 1.1 PS-0026 Pg 5
KAI-2093 Image Sensor
Ordering Information
Product Name
Description
KAI- 2093-AAA-CP-AE
Monochrome, No Microlens, CERDIP Package (sidebrazed),
Taped Clear Cover Glass (no coatings), Engineering Sample
2H4617
KAI- 2093-AAA-CP-BA
Monochrome, No Microlens, CERDIP Package (sidebrazed),
Taped Clear Cover Glass (no coatings), Standard Grade
2H4728
KAI- 2093-ABA-CB-AE
Monochrome, Telecentric Microlens, CERDIP Package (sidebrazed),
Clear Cover Glass (no coatings), Engineering Sample
4H0174
KAI- 2093-ABA-CB-B1
Monochrome, Telecentric Microlens, CERDIP Package (sidebrazed),
Clear Cover Glass (no coatings), Grade 1
2H4725
KAI- 2093-ABA-CB-B2
Monochrome, Telecentric Microlens, CERDIP Package (sidebrazed),
Clear Cover Glass (no coatings), Grade 2
2H4923
KAI- 2093-ABA-CK-AE
Monochrome, Telecentric Microlens, CERDIP Package (sidebrazed),
Quartz Cover Glass with AR coating (both sides), Engineering Sample
2H4920
KAI- 2093-ABA-CK-BA
Monochrome, Telecentric Microlens, CERDIP Package (sidebrazed),
Quartz Cover Glass with AR coating (both sides), Standard Grade
2H4618
KAI- 2093-ABA-CP-AE
Monochrome, Telecentric Microlens, CERDIP Package (sidebrazed),
Taped Clear Cover Glass (no coatings), Engineering Sample
2H4616
KAI- 2093-ABA-CP-BA
Monochrome, Telecentric Microlens, CERDIP Package (sidebrazed),
Taped Clear Cover Glass (no coatings), Standard Grade
4H0137
KAI- 2093-CBA-CB-AE
Color (Bayer RGB), Telecentric Microlens, CERDIP Package (sidebrazed),
Clear Cover Glass (no coatings), Engineering Sample
4H0136
KAI- 2093-CBA-CB-BA
Color (Bayer RGB), Telecentric Microlens, CERDIP Package (sidebrazed),
Clear Cover Glass (no coatings), Standard Grade
4H0705
KEK-4H0705-KAI-2093-10-40
Evaluation Board, 10 Bit, 40 MHz (Complete Kit)
n/a
4H0706
KEK-4H0706-KAI-2093-12-20
Evaluation Board, 12 Bit, 20 MHz (Complete Kit)
n/a
2H4736
Marking Code
KAI-2093
Serial Number
KAI-2093M
Serial Number
KAI-2093CM
Serial Number
See Application Note Product Naming Convention for a full description of the naming convention used for image
sensors. For reference documentation, including information on evaluation kits, please visit our web site at
www.truesenseimaging.com.
Please address all inquiries and purchase orders to:
Truesense Imaging, Inc.
1964 Lake Avenue
Rochester, New York 14615
Phone: (585) 784-5500
E-mail: [email protected]
ON Semiconductor reserves the right to change any information contained herein without notice. All information
furnished by ON Semiconductor is believed to be accurate.
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Revision 1.1 PS-0026 Pg 6
KAI-2093 Image Sensor
Device Description
Single Output
or
Dual Output
1920 x 1080
imaging pixels
28 light shielded columns
4 buffer columns
4 buffer columns
28 light shielded columns
4 light shielded rows
2 buffer rows
2 buffer rows
4 light shielded rows
4
28
4
4
28
4
1920
960
960
4
28
4
28
4 empty pixels
Video L
4 empty pixels
ARCHITECTURE
Video R
4
Figure 1: Sensor Architecture
There are 4 light shielded rows followed by 1084 photoactive rows and finally 4 more light shielded rows. The first and
last 2 photoactive rows are buffer rows giving a total of 1080 lines of image data.
In the single output mode all pixels are clocked out of the Video L output in the lower left corner of the sensor. The
first four empty pixels of each line do not receive charge from the vertical shift register. The next 28 pixels receive
charge from the left light shielded edge followed by 1928 photoactive pixels and finally 28 more light shielded pixels
from the right edge of the sensor. The first and last 4 photoactive pixels are buffer pixels giving a total of 1920 pixels
of image data.
In the dual output mode the clocking of the right half of the horizontal CCD is reversed. The left half of the image is
clocked out Video L and the right half of the image is clocked out Video R. Each row consists of 4 empty pixels
followed by 28 light shielded pixels followed by 964 photoactive pixels. When reconstructing the image, data from
Video R will have to be reversed in a line buffer and appended to the Video L data.
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Revision 1.1 PS-0026 Pg 7
KAI-2093 Image Sensor
PIN DESCRIPTION AND PHYSICAL ORIENTATION
1
fR
fH2BL
fH1BL
fH1SL
fH2SL
GND
OG
RD
RD
OG
GND
fH2SR
fH1SR
fH1BR
fH2BR
fR
16
32
Pixel
(1,1)
VSS
VOUTL
ESD
fV2
fV1
VSUB
GND
VDDL
VDDR
GND
VSUB
fV1
fV2
GND
VOUTR
VSS
17
Figure 2: Package Pin Designations - Top View
Pin
Label
Pin
1
φR
17
Label
VSS
2
φH2BL
18
VOUTR
3
φH1BL
19
GND
4
φH1SL
20
φV2O
5
φH2SL
21
φV1
6
GND
22
VSUB
7
OG
23
GND
8
RD
24
VDDR
9
RD
25
VDDL
10
OG
26
GND
11
GND
27
VSUB
12
φH2SR
28
φV1
13
φH1SR
29
φV2E
14
φH1BR
30
ESD
15
φH2BR
31
VOUTL
16
φR
32
VSS
The horizontal shift register is on the side of the sensor parallel to the row of pins 1 through 16. In single output mode
the pixel closest to pin 1 will be read out first through Video L, the pixel closest to pin 17 will be read out last. In dual
output mode the pixel closest to pin 16 will be read out first through Video R.
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Revision 1.1 PS-0026 Pg 8
KAI-2093 Image Sensor
Imaging Performance
TYPICAL OPERATIONAL CONDITIONS
Description
Condition
Temperature
40 °C
Integration Time
33 ms (40 MHz HCCD frequency, 30 fps frame rate)
Operation
Nominal voltages and timing
Image defects are excluded from performance tests.
OPTICAL SPECIFICATIONS
Symbol
Description
QEmax
Peak Quantum Efficiency
Min
Nom
Unit
Notes
33
36
λQE
Peak Quantum Efficiency Wavelength
QE(540)
Quantum Efficiency at 540nm
θQEh
θQEv
NL
%
1
490
nm
1
31
33
%
1
Microlens Acceptance Angle (horizontal)
12
13
degrees
2
Microlens Acceptance Angle (vertical)
25
30
degrees
2
Maximum Photoresponse Nonlinearity
2
%
3, 4
ΔG
Maximum Gain Difference Between Outputs
10
%
3, 4
ΔNL
Maximum Signal Error caused by Nonlinearity Differences
1
%
3, 4
Notes:
1.
2.
3.
4.
Max
For monochrome sensors.
Value is the angular range of incident light for which the quantum efficiency is at least 50% of QE max at a wavelength of
λQE. Angles are measured with respect to the sensor surface normal in a plane parallel to the horizontal axis (θQEh) or in a
plane parallel to the vertical axis (θQEv).
Value is over the range of 10% to 90% of photodiode saturation.
Value is for the sensor operated without binning.
CCD SPECIFICATIONS
Symbol
Description
Min
Max
Unit
Vertical CCD Charge Capacity
HNe
Horizontal CCD Charge Capacity
PNe
Photodiode Charge Capacity
Id
Dark Current
0.3
1.0
nA/cm2
Lag
Image Lag
< 10
50
e-
Xab
Antiblooming factor
Smr
Vertical Smear
-72
dB
2.
3.
4.
5.
6.
35
100
50
ke
100
ke-
40
ke-
300
-75
Notes
-
VNe
Notes:
1.
45
Nom
1
2
3, 4, 5, 6
3, 4
This value depends on the substrate voltage setting. Higher photodiode saturation charge capacities will lower the
antiblooming specification. Substrate voltage will be specified with each part for nominal photodiode charge capacity.
This is the first field decay lag at 70% saturation. Measured by strobe illumination of the device at 70% of photodiode
saturation, and then measuring the subsequent frame’s average pixel output in the dark.
Measured with a spot size of 100 vertical pixels.
Measured with F/4 imaging optics and continuous green illumination centered at 550 nm.
A blooming condition is defined as when the spot size doubles in size.
Antiblooming factor is the light intensity which causes blooming divided by the light intensity which first saturates the
photodiodes.
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Revision 1.1 PS-0026 Pg 9
KAI-2093 Image Sensor
OUTPUT AMPLIFIER SPECIFICATIONS
Symbol
Description
Nominal
Unit
Notes
Pd
Power Dissipation
120
mW
1
F-3dB
Bandwidth
140
MHz
1
CL
Max Off-chip Load
10
pF
2
Av
Gain
ΔV/ΔN
Sensitivity
Notes:
1.
2.
0.75
14
1
μV/e-
1
For a 5 mA output load on each amplifier. Per amplifier.
With total output load capacitance of CL= 10 pF between the outputs and AC ground.
GENERAL SPECIFICATIONS
Symbol
Description
Nominal
Unit
Notes
ne-T
Total Noise
40
e- rms
1
DR
Dynamic Range
60
dB
2
Notes:
1.
2.
Includes system electronics noise, dark pattern noise and dark current shot noise at 20 MHz.
Uses 20LOG(PNe/ne-T).
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Revision 1.1 PS-0026 Pg 10
KAI-2093 Image Sensor
Typical Performance Curves
MONOCHROME QUANTUM EFFICIENCY
0.50
0.45
0.40
Without Cover Glass
0.35
Absolute
Quantum
Efficiency
0.30
0.25
With Clear Cover Glass
0.20
0.15
Without Cover Glass, without Microlens
0.10
0.05
0.00
300
400
500
600
700
800
900
1000
Wavelength (nm)
Figure 3: Quantum Efficiency Spectrum for Monochrome Sensors
MONOCHROME WITH MICROLENS ANGULAR QUANTUM EFFICIENCY
100
90
80
70
Relative
Quantum 60
Efficiency 50
(%)
40
30
20
10
0
Vertical
Horizontal
0
5
10
15
20
25
30
Angle (degrees)
Figure 4: Angular Dependence of Quantum Efficiency
For the curve marked “Horizontal”, the incident light angle is varied in a plane parallel to the HCCD.
For the curve marked “Vertical”, the incident light angle is varied in a plane parallel to the VCCD.
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Revision 1.1 PS-0026 Pg 11
KAI-2093 Image Sensor
COLOR WITH MICROLENS QUANTUM EFFICIENCY
0.40
0.35
With clear
cover glass
Absolute Quantum Efficiency
0.30
0.25
0.20
0.15
0.10
0.05
0.00
400
500
600
700
800
900
1000
Wavelength (nm)
Red
Green
Figure 5: Quantum Efficiency Spectrum for Color Filter Array Sensors
Blue
Green
Green
Red
Vertical
Register
First Imaging Pixel
Horizontal
Register
Figure 6: Color Filter Array Pattern
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Revision 1.1 PS-0026 Pg 12
KAI-2093 Image Sensor
FRAME RATES
40
35
30
25
Frame Rate
20
(frames/s)
15
Dual Output
10
5
Single Output
0
0
5
10
15
20
25
30
35
40
HCCD Clock Frequency (MHz)
Figure 7: Progressive Frame Rate vs. HCCD Clock Frequency
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Revision 1.1 PS-0026 Pg 13
KAI-2093 Image Sensor
Defect Definitions
OPERATIONAL CONDITIONS
Description
Condition
Temperature
40 °C
Integration Time
33 ms (40 MHz HCCD frequency, no binning, 30 fps frame rate)
Light source
Continuous green illumination centered at 550 nm
Operation
Nominal voltages and timing
SPECIFICATIONS
Name
Definition
Major Defective
Pixel
A pixel whose signal deviates by more than 25 mV from the mean value of all active pixels under dark field condition or by
more than 15% from the mean value of all active pixels under uniform illumination of 80% of saturation
Minor Defective
Pixel
A pixel whose signal deviates by more than 8 mV from the mean value of all active pixels under dark field conditions
Cluster Defect
A group of 2 to 10 contiguous major defective pixels with a width no wider than 2 defective pixels
Column Defect
A group of more than 10 contiguous major defective pixels along a single column
Notes:
1.
2.
There will be at least two non-defective pixels separating any two major defective pixels.
Buffer and dark reference pixels are not used for defect tests.
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Revision 1.1 PS-0026 Pg 14
KAI-2093 Image Sensor
Single Output
or
Dual Output
4 buffer columns
640 columns
Zone A
640 x 380
380 rows
28 light shielded columns
380 rows
640 columns
4 buffer columns
28 light shielded columns
4 light shielded rows
2 buffer rows
4 empty pixels
Video L
4 empty pixels
DEFECT ZONES
2 buffer rows
4 light shielded rows
4
28
4
4
28
4
1920
960
960
4
28
4
28
Video R
4
Figure 8: Defect Zones
DEFECT CLASSES
KAI-2093-ABA-CB-B1
Maximum Number of Defects
Major Point
Minor Point
Cluster
Column
Within Zone A
Outside Zone A
Within Zone A
Outside Zone A
Within Zone A
Outside Zone A
Within Zone A
Outside Zone A
3
10
20
100
0
4
0
0
All Other Part Numbers
Zone A is not used
Maximum Number of Defects
Major Point
Minor Point
Cluster
Column
10
100
4
0
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Revision 1.1 PS-0026 Pg 15
KAI-2093 Image Sensor
Operation
ABSOLUTE MAXIMUM RATINGS
Temperature
Voltage between pins
Current
Notes:
1.
2.
3.
Min
Max
Unit
-50
70
°C
VSUB to GND
8
20
V
VDD, OG to GND
0
17
V
VRD to GND
0
14
V
φV1 to φV2
-20
20
V
φH1 to φH2
-15
15
V
φR to GND
-15
15
V
φH1, φH2 to OG
-15
15
V
φH1, φH2 to φV1, φV2
-15
15
V
0
10
mA
Operation without damage
Video Output Bias Current
Notes
1, 3
2
For electronic shuttering VSUB may be pulsed to 50 V for up to 10 µs.
Total for both outputs. Current is 5 mA for each output. Note that the current bias affects the amplifier bandwidth.
Refer to Application Note Using Interline CCD Image Sensors in High Intensity Visible Lighting Conditions.
DC BIAS OPERATING CONDITIONS
Symbol
Description
Min
Nom
Max
Unit
OG
Output Gate
-3.0
-2.5
-2.0
V
VRD
Reset Drain
10.0
10.5
11.0
V
VSS
Output Amplifier Return
0.0
0.7
1.0
V
VDD
Output Amplifier Supply
14.5
15.0
15.5
V
GND
Ground, P-well
VSUB
Substrate
8.0
TBD
17.0
V
2
VESD
ESD Protection
-8.0
-7.0
-6.0
V
1
Notes:
1.
2.
0.0
Notes
V
VESD must be at least 1 V more negative than φH1L and φH2L during sensor operation AND during camera power turn on.
Refer to Application Note Using Interline CCD Image Sensors in High Intensity Visible Lighting Conditions.
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Revision 1.1 PS-0026 Pg 16
KAI-2093 Image Sensor
AC OPERATING CONDITIONS
Symbol
Description
Min
Nom
Max
Unit
φV2H
Vertical CCD Clock High
7.5
8.0
8.5
V
φV1M, φV2M
Vertical CCD Clocks Midlevel
-1.6
-1.5
-1.4
V
φV1L, φV2L
Vertical CCD Clocks Low
-9.5
-9.0
-8.5
V
φH1H, φH2H
Horizontal CCD Clocks High
0.5
1.0
2.0
V
φH1L, φH2L
Horizontal CCD Clocks Low
-5.0
-4.0
-3.8
V
φR
Reset Clock Amplitude
φRL
Reset Clock Low
-4.0
-3.5
-3.0
V
VShutter
Electronic Shutter Voltage
44
48
52
V
Notes:
1.
5.0
Notes
V
1
Refer to Application Note Using Interline CCD Image Sensors in High Intensity Visible Lighting Conditions.
The figure below shows the DC bias (VSUB) and AC clock (VES) applied to the SUB pin. Both the DC bias and AC clock are referenced
to ground.
VES
VSUB
GND
GND
CLOCK CAPACITANCE
Clocks
Capacitance
Units
Notes
φV1 to GND
25
nF
1
φV2 to GND
25
nF
1
φV1 to φV2
5
nF
φH1S to GND
45
pF
2
φH2S to GND
38
pF
2
φH1B to GND
21
pF
2
φH2B to GND
20
pF
2
φH2B to φH1S
10
pF
2
φH1B to φH1S
10
pF
2
φH2B to φH2S
10
pF
2
φH1B to φH2S
10
pF
2
φR to GND
10
pF
Notes:
1.
2.
Gate capacitance to GND is voltage dependent. Value is for nominal VCCD clock voltages.
For nominal HCCD clock voltages, total capacitance for one half (H1SR only or H1SL only).
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Revision 1.1 PS-0026 Pg 17
KAI-2093 Image Sensor
OPERATION NOTES
Progressive and Interlaced Timing
Progressive and interlaced output modes are achieved by the applying the proper waveforms to the vertical clock
input pins φV1, φV2E and φV2O. For progressive output, φV2 = φV2E = φV2O, with each of the 1092 lines read out
individually using the timing in Figure 9.
For interlaced output, there are two modes, field integration mode and frame integration mode. In both modes,
1092/2 = 546 lines are read in each frame readout, with one even frame readout and one odd frame readout necessary
for a complete frame. Field integration mode bins together alternate lines, and the timing is shown in Figure 11. As
with progressive readout, φV2 = φV2E = φV2O.
Frame integration mode reads out the photodiodes of the even and odd lines separately, and the timing is shown in
Figure 12. In this case, φV2E and φV2O are clocked individually.
Single Output Mode
When operating the sensor in single output mode all pixels of the image sensor will be shifted out the Video L output
(pin 31). To conserve power and lower heat generation the output amplifier for Video R may be turned off by
connecting VDDR (pin 24) and VOUTR (pin 18) to GND (zero volts).
The φH1 timing from the timing diagrams should be applied to φH1SL, φH1BL, φH1SR, φH2BR, and the φH2 timing
should be applied φH2SL, φH2BL, φH2SR, φH1BR. In other words, the clock driver generating the φH1 timing should
be connected to pins 4, 3, 13, and 15. The clock driver generating the φH2 timing should be connected to pins 2, 5, 12,
and 14.
The horizontal CCD should be clocked for 4 empty pixels plus 28 light shielded pixels plus 1928 photoactive pixels plus
28 light shielded pixels for a total of 1988 pixels.
DUAL OUTPUT MODE
In dual output mode the connections to the φH1BR and φH2BR pins are swapped from the single output mode to
change the direction of charge transfer of the right side horizontal shift register. In dual output mode both VDDL and
VDDR (pins 25, 24) should be connected to 15 V.
The φH1 timing from the timing diagrams should be applied to φH1SL, φH1BL, φH1SR, φH1BR, and the φH2 timing
should be applied to φH2SL, φH2BL, φH2SR, φH2BR. The clock driver generating the φH1 timing should be connected
to pins 4, 3, 13, and 14. The clock driver generating the φH2 timing should be connected to pins 2, 5, 12, and 15.
The horizontal CCD should be clocked for 4 empty pixels plus 28 light shielded pixels plus 964 photoactive pixels for a
total of 996 pixels.
If the camera is to have the option of dual or single output mode, the clock driver signals sent to φH1BR and φH2BR
may be swapped by using a relay. Another alternative is to have two extra clock drivers for φH1BR and φH2BR and
invert the signals in the timing logic generator. If two extra clock drivers are used, care must be taken to ensure the
rising and falling edges of the φH1BR and φH2BR clocks occur at the same time (within 3 ns) as the other HCCD clocks.
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Revision 1.1 PS-0026 Pg 18
KAI-2093 Image Sensor
EXPOSURE CONTROL
If the sensor is operated at 20 MHz horizontal CCD frequency then the frame rate will be 9 fps and the integration time
will be 1/9 s or 111 ms. To achieve shorter integration times, the electronic shutter option may be used by applying a
pulse to the substrate (pins 22 and 27). The time between the falling edge of the substrate pulse and the falling edge
of the transition of the φV2 clock from φV2H to φV2M is defined as the integration time. The substrate pulse and
integration time are shown in Figure 14.
Integration times longer than one frame time (111 ms in this example) do not require use of the electronic shutter.
Without the electronic shutter the integration time is defined as the time between when the φV2 clock is at the φV2H
level of 9.5 V (when the φV2 clock is at the φV2H level charge collected in the photodiodes is transferred to the
vertical shift register). To extend the integration time, increase the time between each φV2H level of the φV2 clock.
While the photodiodes are integrating photoelectrons the vertical and horizontal shift registers should be
continuously clocked to prevent the collection of dark current in the vertical shift register. This is most easily done by
increasing the number of lines read out of the image sensor. For example, to double the integration time read out
2184 lines instead of 1092 lines (but remember only the first 1092 lines will contain image data).
Depending on the image quality desired and temperature of the sensor, integration times longer than one second may
require the sensor to be cooled to control dark current. The output amplifiers will also generate a non-uniform dark
current pattern near the bottom corners of the sensor. This can be reduced at long integration times by only turning
on VDD to each amplifier during image readout. If the vertical and horizontal shift registers are also stopped during
integration time, the dark current in the shift registers should be flushed out completely before transferring charge
from the photodiodes to the vertical shift register.
DARK REFERENCES
There are 28 light shielded columns at the left and right side of the image sensor. The first and last two light shielded
columns should not be used as a dark reference due to some light leakage under the edges of the light shielding. Only
the center 24 columns should be used for dark reference line clamping. There are 4 light shielded rows at the top and
bottom of the image sensor. Only the center two light shielded rows should be used as a dark reference.
CONNECTIONS TO THE IMAGE SENSOR
The reset clock signal operates at the pixel frequency. The traces on the circuit board to the reset clock pins should be
kept short and of equal length to ensure that the reset pulse arrives at each pin simultaneously. The circuit board
traces to the horizontal clock pins should also be placed to ensure that the clock edges arrive at each pin
simultaneously. If reset pulses and the horizontal clock edges are misaligned the noise performance of the sensor will
be degraded and balancing the offset and gain of the two output amplifiers will be difficult.
The bias voltages on OG, RD, VSS and VDD should be well filtered with capacitors placed as close to the pins as
possible. Noise on the video outputs will be most strongly affected by noise on VSS, VDD, GND, and VSUB. If the
electronic shutter is not used then a filtering capacitor should also be placed on VSUB. If the electronic shutter is used,
the VSUB voltage should be kept as clean and noise free as possible.
The voltage on VSS may be set by using the 0.6 to 0.7 volt drop across a diode. Place the diode from VSS to GND. To
disable one of the output amplifiers connect VDD to GND, do not let VDD float.
The ESD voltage must reach its operating point before any of the horizontal clocks reach their low level. If any pin on
the sensor comes within 1 V of the ESD pin the electrostatic damage protection circuit will become active and will not
turn off until all voltages are powered down. Operating the sensor with the ESD protection circuit active may damage
the sensor.
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Revision 1.1 PS-0026 Pg 19
KAI-2093 Image Sensor
Timing
REQUIREMENTS AND CHARACTERISTICS
Symbol
Description
Min
Nom
Max
Unit
THD
HCCD Delay
1.3
1.5
10.0
μs
TVCCD
VCCD Transfer time
1.3
1.5
TV3rd
Photodiode Transfer time
8.0
12.0
15.0
μs
T3P
VCCD Pedestal time
20.0
25.0
50.0
μs
T3D
VCCD Delay
15.0
20.0
100.0
μs
TR
Reset Pulse time
5.0
10.0
TS
Shutter Pulse time
3.0
5.0
10.0
μs
TSD
Shutter Pulse delay
1.0
1.6
10.0
μs
TH
HCCD Clock Period
25.0
50.0
200.0
ns
TVR
VCCD rise/fall time
0.0
0.1
1.0
μs
TVE
Vertical Clock Edge Alignment
0.0
100.0
ns
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Notes
μs
ns
Revision 1.1 PS-0026 Pg 20
KAI-2093 Image Sensor
FRAME TIMING
Frame Timing – Progressive Scan
Progressive Frame Timing
f V1
TL
TV3rd
f V2
= f V2E
= f V2O
T3P
Line 1091
TL
T3D
Line 1092
Line 1
f H1
f H2
Frame Timing for Vertical Binning by 2
f V1
TL
TV3rd
f V2
= f V2E
= f V2O
T3P
Line 545
TL
T3D
Line 546
Line 1
f H1
f H2
Figure 9: Progressive Frame Timing
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Revision 1.1 PS-0026 Pg 21
KAI-2093 Image Sensor
VERTICAL CLOCK EDGE ALIGNMENT
KAI-2093 Vertical Clock Timing - Edge Position
V1
See Detail B
V2
Detail A
V1
This falling edge of V2
should be the same as
the rising edge of V1
or slightly after it.
V2
This rising edge of V2
should be the same as
the falling edge of V1
or slightly before it.
tve
tve
Detail B
V1
This rising edge of V2
should be the same as
the falling edge of V1 or
slightly before it.
V2
tve
Figure 10: Ideal Vertical Clock Edge Position
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Revision 1.1 PS-0026 Pg 22
KAI-2093 Image Sensor
FRAME TIMING – FIELD INTEGRATION MODE
Interlaced Frame Timing - Field Integration Mode - Even Field Readout
fV1
TL
fV2
= fV2E
= fV2O
T3P
T3D
TV3rd
TL
Interlaced Frame Timing - Field Integration Mode - Odd Field Readout
fV1
TL
fV2
= fV2E
= fV2O
T3P
TV3rd
T3D
TL
Figure 11: Interlaced Frame Timing - Field Integration Mode
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Revision 1.1 PS-0026 Pg 23
KAI-2093 Image Sensor
FRAME TIMING – FRAME INTEGRATION MODE
Interlaced Frame Timing - Frame Integration Mode - Even Field Readout
fV1
TL
fV2E
T3P
T3D
fV2O
TV3rd
TL
Interlaced Frame Timing - Frame Integration Mode - Odd Field Readout
fV1
TL
fV2E
T3P
T3D
fV2O
TV3rd
TL
Figure 12: Interlaced Frame Timing - Frame Integration Mode
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Revision 1.1 PS-0026 Pg 24
KAI-2093 Image Sensor
LINE TIMING
Progressive Line Timing
TL
f V1
TVCCD
f V2
THD
f H1
f H2
1986
1987
1988
31
32
33
34
35
36
31
32
33
34
35
36
994
995
996
1
2
3
4
5
6
Dual Output
Pixel Count
1957
1958
1959
1960
1961
1962
Single Output
Pixel Count
1
2
3
4
5
6
fR
Interlaced Line Timing
and Line Timing for Vertical Binning by Two
TL
f V1
f V2E,
f V2O
3 x TVCCD
THD
f H1
f H2
1986
1987
1988
31
32
33
34
35
31
32
33
34
35
994
995
996
1
2
3
4
5
6
Dual Output
Pixel Count
1958
1959
1960
1961
1962
Single Output
Pixel Count
1
2
3
4
5
6
fR
Figure 13: Line Timing
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Revision 1.1 PS-0026 Pg 25
KAI-2093 Image Sensor
ELECTRONIC SHUTTER TIMING
Electronic Shutter Line Timing
fV1
fV2
TVCCD
THD
Vshutter
TS
VSUB
TSD
fH1
fH2
fR
Integration Time Definition
fV2
Integration Time
Vshutter
VSUB
Figure 14: Electronic Shutter Timing Diagram
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Revision 1.1 PS-0026 Pg 26
KAI-2093 Image Sensor
Storage and Handling
ENVIRONMENTAL EXPOSURE
STORAGE CONDITIONS
Description
Temperature
Humidity
Notes:
1.
2.
Symbol
Minimum
Maximum
Units
Notes
T
-55
80
°C
1
RH
5
90
%
2
Long-term exposure toward the maximum
temperature will accelerate color filter degradation.
T=25 °C. Excessive humidity will degrade MTTF.
ESD
1. This device contains limited protection against
Electrostatic Discharge (ESD). ESD events may
cause irreparable damage to a CCD image sensor
either immediately or well after the ESD event
occurred. Failure to protect the sensor from
electrostatic discharge may affect device
performance and reliability.
2. Devices should be handled in accordance with
strict ESD procedures for Class 0 (<250V per
JESD22 Human Body Model test), or Class A
(<200V JESD22 Machine Model test) devices.
Devices are shipped in static-safe containers and
should only be handled at static-safe
workstations.
3. See Application Note Image Sensor Handling Best
Practices for proper handling and grounding
procedures. This application note also contains
workplace recommendations to minimize
electrostatic discharge.
4. Store devices in containers made of electroconductive materials.
COVER GLASS CARE AND CLEANLINESS
1. The cover glass is highly susceptible to particles
and other contamination. Perform all assembly
operations in a clean environment.
2. Touching the cover glass must be avoided.
3. Improper cleaning of the cover glass may
damage these devices. Refer to Application Note
Image Sensor Handling Best Practices.
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1. Extremely bright light can potentially harm CCD
image sensors. Do not expose to strong sunlight
for long periods of time, as the color filters
and/or microlenses may become discolored. In
addition, long time exposures to a static high
contrast scene should be avoided. Localized
changes in response may occur from color
filter/microlens aging. For Interline devices, refer
to Application Note Using Interline CCD Image
Sensors in High Intensity Visible lighting
Conditions.
2. Exposure to temperatures exceeding maximum
specified levels should be avoided for storage
and operation, as device performance and
reliability may be affected.
3. Avoid sudden temperature changes.
4. Exposure to excessive humidity may affect
device characteristics and may alter device
performance and reliability, and therefore should
be avoided.
5. Avoid storage of the product in the presence of
dust or corrosive agents or gases, as
deterioration of lead solderability may occur. It is
advised that the solderability of the device leads
be assessed after an extended period of storage,
over one year.
SOLDERING RECOMMENDATIONS
1. The soldering iron tip temperature is not to
exceed 370 °C. Higher temperatures may alter
device performance and reliability.
2. Flow soldering method is not recommended.
Solder dipping can cause damage to the glass
and harm the imaging capability of the device.
Recommended method is by partial heating using
a grounded 30 W soldering iron. Heat each pin
for less than 2 seconds duration.
Revision 1.1 PS-0026 Pg 27
KAI-2093 Image Sensor
Mechanical Drawings
COMPLETED ASSEMBLY
Figure 15: Completed Assembly (1 of 2)
Notes:
1.
2.
See Ordering Information for marking code.
Cover glass is manually placed and visually aligned over die – location accuracy is not guaranteed.
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Revision 1.1 PS-0026 Pg 28
KAI-2093 Image Sensor
Figure 16: Completed Assembly (2 of 2)
Notes:
1.
2.
Center of image is nominally coincident with the center of the package.
Die is aligned within  2 degree of any package cavity edge.
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Revision 1.1 PS-0026 Pg 29
KAI-2093 Image Sensor
COVER GLASS
Clear Cover Glass
Figure 17: Clear Cover Glass Drawing
Notes:
1.
2.
Cover Glass Material:
Dust/Scratch:
www.truesenseimaging.com
Schott D263T eco or equivalent.
5 microns maximum.
Revision 1.1 PS-0026 Pg 30
KAI-2093 Image Sensor
QUARTZ COVER GLASS WITH AR COATINGS
Figure 18: Quartz Cover Glass with AR Coating Drawing
Notes:
1.
2.
3.
Cover Glass Material:
SK1300 or equivalent.
Dust/Scratch:
10 microns maximum.
MAR Coat Each Side:
340nm - 360nm: Reflectance ≤ 0.5%.
520nm - 550nm: Reflectance ≤ 4%.
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Revision 1.1 PS-0026 Pg 31
KAI-2093 Image Sensor
GLASS TRANSMISSION
100
90
80
Transmission (%)
70
60
50
40
30
20
10
0
200
300
400
500
600
700
800
900
Wavelength (nm)
Clear Glass
Quartz Glass w ith AR Coatings
Figure 19: Cover Glass Transmission
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Revision 1.1 PS-0026 Pg 32
KAI-2093 Image Sensor
Quality Assurance and Reliability
QUALITY AND RELIABILITY
All image sensors conform to the specifications stated in this document. This is accomplished through a combination of
statistical process control and visual inspection and electrical testing at key points of the manufacturing process, using
industry standard methods. Information concerning the quality assurance and reliability testing procedures and results
are available from ON Semiconductor upon request. For further information refer to Application Note Quality and
Reliability.
REPLACEMENT
All devices are warranted against failure in accordance with the Terms of Sale. Devices that fail due to mechanical and
electrical damage caused by the customer will not be replaced.
LIABILITY OF THE SUPPLIER
A reject is defined as an image sensor that does not meet all of the specifications in this document upon receipt by the
customer. Product liability is limited to the cost of the defective item, as defined in the Terms of Sale.
LIABILITY OF THE CUSTOMER
Damage from mishandling (scratches or breakage), electrostatic discharge (ESD), or other electrical misuse of the
device beyond the stated operating or storage limits, which occurred after receipt of the sensor by the customer, shall
be the responsibility of the customer.
TEST DATA RETENTION
Image sensors shall have an identifying number traceable to a test data file. Test data shall be kept for a period of 2
years after date of delivery.
MECHANICAL
The device assembly drawing is provided as a reference.
ON Semiconductor reserves the right to change any information contained herein without notice. All information
furnished by ON Semiconductor is believed to be accurate.
Life Support Applications Policy
ON Semiconductor image sensors are not authorized for and should not be used within Life Support Systems without
the specific written consent of ON Semiconductor.
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Revision 1.1 PS-0026 Pg 33
KAI-2093 Image Sensor
Revision Changes
MTD/PS-0307
Revision Number
Description of Changes
0.0
 Initial Formal Version.
1.0







2.0
 Section 4.2, new color quantum efficiency
3.0






3.1
 Changed cover glass material to D263T eco or equivalent
 Updated Storage and Handling page references to Application Note Image Sensor Handling and Best Practices
4.0
 Added the note “Refer to Application Note Using Interline CCD Image Sensors in High Intensity Visible Lighting Conditions”
to the following sections
o
Absolute Maximum Ratings
o
DC Bias Operating Conditions
o
AC Operating Conditions
o
Storage and Handling
Page 8 section 3.5 AC Timing Conditions table: Added Tve: Vertical Clock Edge Alignment
Page 10: Added Figure 5 Vertical Clock Timing – Edge Position
Page 15: Updated Figure 9 Frame Rate to show dual mode out to 40 MHz. Previous plot cut off dual mode at 35 MHz
Page 22: Added that a cluster defect will be no wider that two defective pixels.
Page 22: Added a note that there will be at least two good pixels between any two major defects (pixels or clusters)
Removed appendix 1
Added revision changes
Updated format
Updated defect definitions section
Added Storage and Handling section
Updated completed assembly drawing
Added cover glass drawings
Added cover glass transmission curves
PS-0026
Revision Number
Description of Changes
1.0
 Initial release with new document number, updated branding and document template
 Updated Storage and Handling and Quality Assurance and Reliability sections
1.1
 Updated branding
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© 2014, Semiconductor Components Industries, LLC.
Revision 1.1 PS-0026 Pg 34
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