MC3425 Power Supply Supervisory/ Over and Undervoltage Protection Circuit The MC3425 is a power supply supervisory circuit containing all the necessary functions required to monitor over and undervoltage fault conditions. These integrated circuits contain dedicated over and undervoltage sensing channels with independently programmable time delays. The overvoltage channel has a high current Drive Output for use in conjunction with an external SCR Crowbar for shutdown. The undervoltage channel input comparator has hysteresis which is externally programmable, and an open−collector output for fault indication. • Dedicated Over and Undervoltage Sensing • Programmable Hysteresis of Undervoltage Comparator • Internal 2.5 V Reference • 300 mA Overvoltage Drive Output • 30 mA Undervoltage Indicator Output • Programmable Time Delays • 4.5 V to 40 V Operation http://onsemi.com POWER SUPPLY SUPERVISORY/ OVER AND UNDERVOLTAGE PROTECTION CIRCUIT SEMICONDUCTOR TECHNICAL DATA 8 1 MAXIMUM RATINGS Rating Power Supply Voltage Comparator Input Voltage Range (Note 1) Symbol Value Unit VCC 40 Vdc VIR −0.3 to +40 Vdc IOS(DRV) Internally Limited mA Indicator Output Voltage VIND 0 to 40 Vdc Indicator Output Sink Current IIND 30 mA Power Dissipation and Thermal Characteristics Maximum Power Dissipation @ TA = 70°C Thermal Resistance, Junction−to−Air PD RθJA 1000 80 mW °C/W Drive Output Short Circuit Current Operating Junction Temperature TJ +150 °C Operating Ambient Temperature Range TA 0 to +70 °C Storage Temperature Range Tstg −55 to +150 °C P1 SUFFIX PLASTIC PACKAGE CASE 626 PIN CONNECTIONS O.V. DRV Output 1 8 VCC O.V. DLY 2 7 O.V. Sense 3 6 Gn d U.V. IND Output U.V. Sense 4 5 U.V. DLY (Top View) NOTE: 1. The input signal voltage should not be allowed to go negative by more than 300 mV NOTE: 1. or positive by more than 40 V, independent of VCC, without device destruction. ORDERING INFORMATION Simplified Application Overvoltage Crowbar Protection, Undervoltage Indication Vin Vout DC Power Supply + Cout © Semiconductor Components Industries, LLC, 2006 July, 2006 − Rev. 4 MC3425 Device Operating Temperature Range Package MC3425P1 TA = 0° to +70°C Plastic DIP Undervoltage Indication 1 Publication Order Number: MC3425/D MC3425 ELECTRICAL CHARACTERISTICS (4.5 V ≤ VCC ≤ 40 V; TA = Tlow to Thigh [Note 2], unless otherwise noted.) Characteristics Symbol Min Typ Max Unit REFERENCE SECTION Sense Trip Voltage (Referenced Voltage) VCC = 15 V TA= 25°C Tlow to Thigh (Note 2) VSense Line Regulation of VSense 4.5 V ≤ VCC ≤ 40 V; TJ = 25°C Power Supply Voltage Operating Range Power Supply Current VCC = 40 V; TA = 25°C; No Output Loads O.V. Sense (Pin 3) = 0 V; U.V. Sense (Pin 4) = VCC O.V. Sense (Pin 3) = VCC; U.V. Sense (Pin 4) = 0 V Vdc 2.4 2.33 2.5 2.5 2.6 2.63 Regline − 7.0 15 mV VCC 4.5 − 40 Vdc ICC(off) − 8.5 10 mA ICC(on) − 16.5 19 mA IIB − 1.0 2.0 μA INPUT SECTION Input Bias Current, O.V. and U.V. Sense Hysteresis Activation Voltage, U.V. Sense VCC = 15 V; TA = 25°C; IH = 10% IH = 90% VH(act) V − − 0.6 0.8 − − IH 9.0 12.5 16 VOL(DLY) VOH(DLY) − VCC−0.5 0.2 VCC−0.15 0.5 − Delay Pin Source Current VCC = 15 V; VDLY = 0 V IDLY(source) 140 200 260 μA Delay Pin Sink Current VCC = 15 V; VDLY = 2.5V IDLY(sink) 1.8 3.0 − mA Drive Output Peak Current (TA = 25°C) IDRV(peak) 200 300 − mA Drive Output Voltage IDRV = 100 mA; TA = 25° C VOH(DRV) VCC−2.5 VCC−2.0 − V Drive Output Leakage Current VDRV = 0 V IDRV(leak) − 15 200 nA di/dt − 2.0 − A/μs IDRV(trans) − 1.0 − mA (Peak) Indicator Output Saturation Voltage IIND = 30 mA; TA = 25°C VIND(sat) − 560 800 mV Indicator Output Leakage Current VOH(IND) = 40 V IIND(leak) − 25 200 nA Vth(OC) 2.33 2.5 2.63 V tPLH(IN/OUT) − 1.7 − μs tPLH(IN//DLY) − 700 − ns Hysteresis Current, U.V. Sense VCC = 15 V; TA = 25°C; U.V. Sense (Pin 4) = 2.5 V Delay Pin Voltage (IDLY = 0 mA) Low State High State μA V OUTPUT SECTION Drive Output Current Slew Rate (TA = 25°C) Drive Output VCC Transient Rejection VCC = 0 V to 15 V at dV/dt = 200 V μs; O.V. Sense (Pin 3) = 0 V; TA = 25°C Output Comparator Threshold Voltage (Note 3) Propagation Delay Time (VCC = 15 V; TA = 25°C) Input to Drive Output or Indicator Output 100 mV Overdrive, CDLY = 0 μF Input to Delay 2.5 V Overdrive (0 V to 5.0 V Step) NOTES: 2. Tlow to Thigh = 0° to +70°C 3. The Vth(OC) limits are approximately the VSense limits over the applicable temperature range. http://onsemi.com 2 1 4 12 V H(act) , HYSTERESIS ACTIVATION VOLTAGE (V) IH, HYSTERESIS CURRENT (μA) MC3425 TA = 25°C 10 8.0 VCC = 40 V 6.0 VCC =15V 4.0 VCC = 5.0 V 2.0 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 VH(act), HYSTERESIS ACTIVATION VOLTAGE (V) 1.6 1.2 0.8 VCC = 15 V VCC = 40 V 0.6 0.4 0.2 0 −55 IH, HYSTERESIS CURRENT (μA) 15.0 U.V. Sense = 2.5 V 13.0 12.0 11.0 10.0 −55 −25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 0 IDLY(source) , DELAY PIN SOURCE CURRENT (A) μ t DLY , OUTPUT DELAY TIME (mS) 10 1.0 0.001 0.0001 0.001 0.01 0.1 125 * = 2.500 V * = 2.600 V −10 −20 VCC = 15 V *VSense at TA = 25°C −30 −40 −50 −55 −25 0 25 50 75 100 125 Figure 4. Sense Trip Voltage Change versus Temperature VCC = 15 V TA = 25°C 0.01 100 TA, AMBIENT TEMPERATURE (°C) 100 tDLY = 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) VSense* = 2.400 V Figure 3. Hysteresis Current versus Temperature 0.1 −25 Figure 2. Hysteresis Activation Voltage versus Temperature Δ V Sense , SENSE TRIP VOLTAGE CHANGE (mW) Figure 1. Hysteresis Current versus Hysteresis Activation Voltage 14.0 VH(act) = Voltage Level at which Hysteresis Current (IH) is 90% of full value. VCC = 5.0 V 1.0 2.5 CDLY 200 μA 1.0 10 260 240 VCC = 40 V 220 VCC = 15 V 200 VCC = 5.0 V 180 160 −55 CDLY, DELAY PIN CAPACITANCE (μF) 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) Figure 5. Output Delay Time versus Delay Capacitance Figure 6. Delay Pin Source Current versus Temperature http://onsemi.com 3 −25 100 125 V IND(sat) , INDICATOR OUTPUT SATURATION VOLTAGE (V) 5.0 VCC = 15 V 1.0% Duty Cycle @ 300 Hz TA = 25°C 4.0 3.0 2.0 1.0 0 0 100 200 300 400 IDRV(peak), DRIVE OUTPUT PEAK CURRENT (mA) Figure 7. Drive Output Saturation Voltage versus Output Peak Current 2.500 I CC, POWER SUPPLY CURRENT (mA) V OH(DRV), DRIVE OUTPUT SATURATION VOTLAGE (V) V OH(DRV), DRIVE OUTPUT SATURATION VOLTAGE (V) MC3425 VCC = 15 V IDRV(peak) = 200 mA 1.0% Duty Cycle @ 300 Hz 2.460 2.420 2.380 2.340 2.300 −55 0.4 0.3 0.2 VCC = 15 V TA = 25°C 0.1 0 0 10 20 30 40 IIND, INDICATOR OUTPUT SINK CURRENT (mA) Figure 8. Indicator Output Saturation Voltage versus Output Sink Current 28 Curve O.V. Sense U.V. Sense Gnd A VCC B Gnd VCC 24 20 A 16 12 B 8.0 4.0 TA = 25°C 0 −25 0 25 50 75 100 0 125 5.0 10 15 20 25 30 TA, AMBIENT TEMPERATURE (°C) VCC, POWER SUPPLY VOLTAGE (V) Figure 9. Drive Output Saturation Voltage versus Temperature Figure 10. Power Supply Current versus Voltage http://onsemi.com 4 35 40 MC3425 APPLICATIONS INFORMATION +VO R1A Vin VO = 5.0 V VO(trip) = 6.25 V +5.0V Power Supply 8 VCC 15k R1B 4 8 VCC + Power Supply 4.5V to 40V − 4 IH R2B CDLY O.V. U.V. DLY Gnd DLY 2 7 5 100 U.V. O.V. DLY Gnd DLY 2 7 5 U.V. Sense Pin 4 Gnd 1+ 2.5V U.V. DLY Pin 5 U.V. IND Pin 6 R1A R2A tDLY = 12500 CDLY 2.5V OFF ON Figure 12. Overvoltage Protection of 5.0 V Supply with Line Loss Detector Figure 11. Overvoltage Protection and Undervoltage Fault Indication with Programmable Delay Input Signal I.V. p−p 12V 8 VCC 5.0μF +VO 4 3 12V Power Supply Alarm On when: VO = 13.6 V O.V. Sense 2.7k O.V. DRV 1 4 82k 6.8k 5 CDLY 100Ω U.V. Sense U.V. DLY 1 25000 CDLY U.V. Sense U.V. O.V. DLY Gnd DLY 5 7 2 0.1μF MC3425 f(input) < 1.0k MC3425 8 + O.V. 1 DRV O.V. Sense 10k VCC Output Pulse when: 10k 3 12k 0.33μF 0.01μF CDLY Line Loss Output O.V. 1 DRV O.V. Sense 10k O.V. 1 DRV R1B R2B , VO(trip) − 2.5 V R1B + R2B U.V. Hysteresis = IH 3 MC3425 O.V. Sense U.V. 6 IND U.V. Sense MC3425 U.V. Fault Indicator U.V. 6 IND U.V. Sense 3 R2A AC Line 1.0k O.V. DLY Gnd 2 7 O.V. Sense Pin 3 2.5V O.V. DLY Pin 2 2.5V ON 0.1μF O.V. DRV Pin 1 Gnd Figure 13. Overvoltage Audio Alarm Circuit OFF Figure 14. Programmable Frequency Switch http://onsemi.com 5 MC3425 CIRCUIT DESCRIPTION constant current source, IDLY(source), charging the external delay capacitor (CDLY) to 2.5 V. The MC3425 is a power supply supervisory circuit containing all the necessary functions required to monitor over and undervoltage fault conditions. The block diagram is shown below in Figure 15. The Overvoltage (O.V.) and Undervoltage (U.V.) Input Comparators are both referenced to an internal 2.5 V regulator. The U.V. Input Comparator has a feedback activated 12.5 μA current sink (IH) which is used for programming the input hysteresis voltage (VH). The source resistance feeding this input (RH) determines the amount of hysteresis voltage by VH = IHRH = 12.5 × 10−6 RH. Separate Delay pins (O.V. DLY, U.V. DLY.) are provided for each channel to independently delay the Drive and Indicator outputs, thus providing greater input noise immunity. The two Delay pins are essentially the outputs of the respective input comparators, and provide a constant current source, IDLY(source), of typically 200 μA when the noninverting input voltage is greater than the inverting input level. A capacitor connected from these Delay pins to ground, will establish a predictable delay time (tDLY) for the Drive and Indicator outputs. The Delay pins are internally connected to the noninverting inputs of the O.V. and U.V. Output Comparators, which are referenced to the internal 2.5 V regulator. Therefore, delay time (tDLY) is based on the tDLY = Vref CDLY = IDLY(source) 2.5 CDLY 200 μA = 12500 CDLY Figure 5 provides CDLY values for a wide range of time delays. The Delay pins are pulled low when the respective input comparator’s noninverting input is less than the inverting input. The sink current, IDLY(sink), capability of the Delay pins is ≥ 1.8 mA and is much greater than the typical 200 μA source current, thus enabling a relatively fast delay capacitor discharge time. The Overvoltage Drive Output is a current−limited emitter−follower capable of sourcing 300 mA at a turn−on slew rate at 2.0 A/μs, ideal for driving “Crowbar” SCR’s. The Undervoltage Indicator Output is an open−collector, NPN transistor, capable of sinking 30 mA to provide sufficient drive for LED’s, small relays or shut−down circuitry. These current capabilities apply to both channels operating simultaneously, providing device power dissipation limits are not exceeded. The MC3425 has an internal 2.5 V bandgap reference regulator with an accuracy of ± 4.0% for the basic device. VCC 8 + + O.V. Sense 200μA + Input Comparator − O.V. 3 + − Output Comparator U.V. + + 200μA + Input Comparator U.V. − U.V. Sense + +Output Comparator − O.V. 4 2.5V Reference Regulator IH 12.5μA Input Section 5 2 U.V. O.V. DLY DLY Note: All voltages and currents are nominal. Figure 15. Representative Block Diagram http://onsemi.com 6 7 Gnd Output Section 1 O.V. DRV 6 U.V. IND MC3425 CROWBAR SCR CONSIDERATIONS current densities can occur in the gate region if high anode currents appear quickly (di/dt). This can result in immediate destruction of the SCR or gradual degradation of its forward blocking voltage capabilities − depending on the severity of the occasion. The value of di/dt that an SCR can safely handle is influenced by its construction and the characteristics of the gate drive signal. A center−gate−fire SCR has more di/dt capability than a corner−gate−fire type, and heavily overdriving ( 3 to 5 times IGT) the SCR gate with a fast < 1.0 μs rise time signal will maximize its di/dt capability. A typical maximum number in phase control SCRs of less than 50 A(RMS) rating might be 200 A/μs, assuming a gate current of five times IGT and < 1.0 μs rise time. If having done this, a di/dt problem is seen to still exist, the designer can also decrease the di/dt of the current waveform by adding inductance in series with the SCR, as shown in Figure 18. Of course, this reduces the circuit’s ability to rapidly reduce the dc bus voltage and a tradeoff must be made between speedy voltage reduction and di/dt. Referring to Figure 16, it can be seen that the crowbar SCR, when activated, is subject to a large current surge from the output capacitance, Cout. This capacitance consists of the power supply output capacitors, the load’s decoupling capacitors, and in the case of Figure 16A, the supply’s input filter capacitors. This surge current is illustrated in Figure 17, and can cause SCR failure or degradation by any one of three mechanisms: di/dt, absolute peak surge, or I2t. The interrelationship of these failure methods and the breadth of the applications make specification of the SCR by the semiconductor manufacturer difficult and expensive. Therefore, the designer must empirically determine the SCR and circuit elements which result in reliable and effective OVP operation. However, an understanding of the factors which influence the SCR’s di/dt and surge capabilities simplifies this task. 1. di/dt As the gate region of the SCR is driven on, its area of conduction takes a finite amount of time to grow, starting as a very small region and gradually spreading. Since the anode current flows through this turned−on gate region, very high (A) SCR Across Input of Regulator Series Regulator Vin Vout + MC3425 + Cout Cin (B) SCR Across Output of Regulator * Series Regulator Vin + Vout Cout Cin + *Needed if supply is not current limited. Figure 16. Typical Crowbar Circuit Configurations http://onsemi.com 7 MC3425 MC3425 l A WORD ABOUT FUSING lpk Before leaving the subject of the crowbar SCR, a few words about fuse protection are in order. Referring back to Figure 16A, it will be seen that a fuse is necessary if the power supply to be protected is not output current limited. This fuse is not meant to prevent SCR failure but rather to prevent a fire! In order to protect the SCR, the fuse would have to possess an I2t rating less than that of the SCR and yet have a high enough continuous current rating to survive normal supply output currents. In addition, it must be capable of successfully clearing the high short circuit currents from the supply. Such a fuse as this is quite expensive, and may not even be available. The usual design compromise then is to use a garden variety fuse (3AG or 3AB style) which cannot be relied on to blow before the thyristor does, and trust that if the SCR does fail, it will fail short circuit. In the majority of the designs, this will be the case, though this is difficult to guarantee. Of course, a sufficiently high surge will cause an open. These comments also apply to the fuse in Figure 16B. di dt Surge Due to Output Capacitor Current Limited Supply Output t Figure 17. Crowbar SCR Surge Current Waveform 2. Surge Current If the peak current and/or the duration of the surge is excessive, immediate destruction due to device overheating will result. The surge capability of the SCR is directly proportional to its die area. If the surge current cannot be reduced (by adding series resistance − see Figure 18) to a safe level which is consistent with the system’s requirements for speedy bus voltage reduction, the designer must use a higher current SCR. This may result in the average current capability of the SCR exceeding the steady state current requirements imposed by the DC power supply. RLead LLead ESR Output Cap ESL CROWBAR SCR SELECTION GUIDE As an aid in selecting an SCR for crowbar use, the following selection guide is presented. R L To MC3423 Device IRMS ITSM MCR310 Series MCR16 Series MCR25 Series 2N6501 Series MCR69 Series MCR264 Series MCR265 Series 10 A 16 A 25 A 25 A 25 A 40 A 55 A 100 A 150 A 300 A 300 A 750 A 400 A 550 A R & L EMPIRICALLY DETERMINED! Figure 18. Circuit Elements Affecting SCR Surge & di/dt UNDERVOLTAGE SENSING An undervoltage sense circuit with hysteresis may be designed, as shown in Figure 11, using the following equations: R1 + V * V CCU CC1 12.5 mA 2.5 R1 * 2.5 CC1 where: VCCU is the designed upper trip point (output indicator goes off) VCC1 is the lower trip point (output indicator goes on) R2 + V http://onsemi.com 8 MC3425 PACKAGE DIMENSIONS P1 SUFFIX PLASTIC PACKAGE CASE 626−05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 −B− 1 4 F −A− NOTE 2 L C J −T− MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC −−− 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC −−− 10_ 0.030 0.040 N SEATING PLANE D H DIM A B C D F G H J K L M N M K G 0.13 (0.005) M T A M B M ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 9 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC3425/D