NCP4350
Supervisory IC for Desktop
Power Supply Monitoring
The NCP4350 provides all the necessary functions to monitor and
control a multi-output power supply providing fault protection
shutdown signals, and On/Off control. The NCP4350 provides the
ability to monitor the status of the +5 Vdc, +12 Vdc (A and B outputs),
and +3.3 Vdc output (voltage and current). The controller has built in
delay to prevent tripping during transient conditions to eliminate false
shutdowns.
OVP/UVP (OverVoltage/UnderVoltage Protection) monitors 3.3V,
5V, and dual 12V to protect the power supply, FPOB output goes high
when one of these supply voltages exceed their limits.
OCP (OverCurrent Protection) monitors 3.3V, 5V, and dual 12V
output current. Overcurrent limit is adjustable by IREF and current
protection resistor.
The PGI (Power Good Input) and OTP (OverTemperature
Protection) input pin provides the flexibility for design protection
circuit.
The PGO (Power Good Output) signal gives personal computer
notice when the output supplies are ready or power supply is going to
shutdown or fail, therefore it can provide a reliable power supply
environment.
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MARKING DIAGRAM
NCP4350DG
AWLYWW
SOIC-16
D SUFFIX
CASE 751B
1
A
WL
Y
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Device
PIN CONNECTIONS
Features
•Individual Overvoltage and Undervoltage Monitoring for +3.3V,
+5V, +12VA, +12VB Outputs and Lockout
•Individual Overcurrent Monitoring for +3.3V, +5V, +12VA,
+12VB Outputs and Lockout
•Fault Output with 5 mA of Sink Capability
•Remote On/Off
•Power Good Output Signal with 5 mA of Sink Capability
•Built-in Delays for OVP, UVP, and Overload to avoid False Tripping
•Low Power Consumption 10 mW at VCC = 5V Typical
•Overtemperature Input
•Wide Power Supply Range (4 V - 16 V)
PGI
1
16
PGO
GND
2
15
VCC
FPOB
3
14
VS5
PSONB
4
13
VS33
IS12A
5
12
VS12A
RI
6
11
IS33
IS12B
7
10
IS5
VS12B
8
9
OTP
(Top View)
ORDERING INFORMATION
Typical Applications
•ATX Computers
Device
Package
Shipping{
NCP4350DR2G
SOIC-16
(Pb-Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2007
September, 2007 - Rev. 0
1
Publication Order Number:
NCP4350/D
NCP4350
Internal VCC
170 mA
Remote On/Off
Delay
38 ms (typ)
Vref (1.25 V)
On OTP
+
OTP
VS33
+
-
0.8 V - 2.0 V
Fault (FPOB)
POR
UN
+ OV
-
4 ms One
Shot
UV Fault Delay
1 ms (typ)
VS5
PSONB
R
Q
S
Q
+ UN
+
-
VS12A
+
-
VS12B
OV
OV Fault Delay
14 ms (typ)
UN
Q
S
Q
Reset
Dominate
+
-
OV
+
-
UN
+
-
OV
UV/OL Blanking
75 ms (typ)
PGO
PWR Good Delay
300 ms (typ)
Vref
IS33
R
+
IREF x 8
IS5
+
20 ms OCP
IREF x 8
IS12A
+
IREF x 8
Vref
IS12B
+
IREF x 8
+
-
IREF x 8
Buffer
IREF x 8
Vref
1.25 V ±3%
Bandgap
Reference
Internal
Power
GND
PGI
RI
Figure 1. Detailed Block Diagram
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2
+VCC
NCP4350
PIN DESCRIPTION
Pin
Pin#
PGI
1
The pin is used for a power good input signal.
Description
GND
2
Ground
FPOB
3
This is an open drain output for Fault protection shutdown.
PSONB
4
This pin is used for a REMOTE on/off switch input and acts as a reset signal after a fault condition.
IS12A
5
This pin is an input to the +12 VA output current monitoring comparator.
RI
6
A resistor to ground sets the IREF current for overcurrent monitoring.
IS12B
7
This pin is an input to the +12 VB output current monitoring comparator.
VS12B
8
This pin is an input to the +12 VB output voltage monitoring comparator.
OTP
9
Overtemperature or external protection input.
IS5
10
This pin is an input to the +5 V output current monitoring comparator.
IS33
11
This pin is an input to the +3.3 V output current monitoring comparator.
VS12A
12
This pin is an input to the +12 VA output voltage monitoring comparator.
VS33
13
This pin is an input to the +3.3 V output voltage monitoring comparator.
VS5
14
This pin is an input to the +5 V output voltage monitoring comparator.
+VCC
15
This is the input pin for VCC.
PGO
16
This pin provides an open drain power good output signal.
+16 V
OTP L12V
+12 V
RECT
IS12B
L5V
TRANSFORMER
SYNC RECT
+ DRV
W2
+12 VB
W1
+12 VA
IS12A
R12VA
R12VB
+5 V
L33V
+3.3 V
SYNC RECT
+ DRV
R5V
OTP
VS12A
VS12B
VS5
VS33
R33V
IS5V
IS33V
IS12B
IS12A
IS33
IS5
OTP
GND
RI
PGO
PGO
+VCC FPOB PSONB PGI
L+5VSTBY
PSONB
+5 Vstandby
R1
R2
R3
4
3
1
2
1
2
1
2
4
3
4
3
Figure 2. Typical Application
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3
NCP4350
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC
-0.3 to 16
100
V
mA
Maximum Voltage
Current
VS12A
VS12B
IS12A
IS12B
-0.3 to 16
100
V
mA
Maximum Voltage
Current
PGI
PSONB
OTP
VS33
IS33
-0.3 to 5.5
100
V
mA
Maximum Voltage
VRI
2.0
V
IPGO
IFPOB
5.0
mA
VOHPGO, VOHFPOB
VS5
IS5
7.5
V
IREF
100
mA
Maximum Junction Temperature
TJMAX
150
°C
Storage Temperature Range
TSMAX
-65 to 150
°C
Lead Temperature (Soldering, 10s)
TLMAX
300
°C
PD
TBD
W
Power Supply Input
Current
Power Good Output and FPOB Sink Current
Maximum Voltage
Output Current from RI
Total Power Dissipation
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Pins 1-16: Human Body Model 2000V per Mil-Std-883, Method 3015.
Machine Model Method 200V
2. This device contains Latch-up protection and exceeds ±100ma per JEDEC Standard JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Rating
Min
Typ
Max
Unit
VCC
Operating Supply Voltage
4.0
16
V
IREF
Output Current from RI
12.5
62.5
mA
0
105
°C
TJ
Operating Junction Temperature Range
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NCP4350
ELECTRICAL CHARACTERISTICS (VCC = 12V, for typical values TJ = 25°C, for min/max values, TJ = 0°C to +105°C,
Max TJ = 150°C, RI =33 kW, unless otherwise noted.)
Rating
Min
Typ
Max
Unit
-
1.5
2.0
mA
3.8
3.9
4.0
V
-
40
-
mV
5.6
5.8
6.0
V
-
60
-
mV
13.5
13.85
14.2
V
-
130
-
mV
2.8
2.9
3.0
V
-
30
-
mV
4.2
4.4
4.6
V
-
45
-
mV
10.3
10.65
11.0
V
-
100
-
mV
Low Level Output Voltage Fault (ISink = 5 mA)
0.4
V
ILFAULT
Leakage Current (VDS= 5V)
10
mA
VTHPGI
Input Voltage Threshold
1.32
V
VOLPGO
Low Level Output Voltage (ISink = 5 mA)
0.4
V
Leakage Current (VDS = 5V)
10
mA
0.8
V
Symbol
ICC
Operating Supply Current (VCC = 16V, FPOB↓ and PGO↑)
Overvoltage/Undervoltage Protection
V33OVP
V33OVPHYS
V5OVP
V5OVPHYS
V12OVP
(A and B)
V12OVPHYS
(A and B)
V33UVP
V33UVPHYS
V5UVP
V5UVPHYS
V12UVP
(A and B)
V12UVPHYS
(A and B)
+3.3V Output Overvoltage Threshold (includes VIO)
TJ =0°C to +105°C
Hysteresis (Note 3)
+5 V Output Overvoltage Threshold (includes VIO)
TJ =0°C to +105°C
Hysteresis (Note 3)
+12V Output Overvoltage Threshold (includes VIO)
TJ =0°C to +105°C
Hysteresis (Note 3)
+3.3V Output Undervoltage Threshold (includes VIO)
TJ =0°C to +105°C
Hysteresis (Note 3)
+5 V Output Undervoltage Threshold (includes VIO)
TJ =0°C to +105°C
Hysteresis (Note 3)
+12V Output Undervoltage Threshold (includes VIO)
TJ =0°C to +105°C
Hysteresis (Note 3)
Interface I/O
VOLFPOB
ILPGO
1.18
VOLPSONB
Low Level Input Voltage
VOHPSONB
High Level Input Voltage
2.0
VPSONBHYS
PSONB Input Hysteresis
300
PSONBVIH
Open Circuit Voltage (IIN = 0 mA)
2.5
Input Pull-up Current (VPSONB = 0V)
120
ILPSONB
1.25
V
-
170
-
mV
5.25
V
220
mA
Current Monitoring Comparators
IS12AVIO
Input Offset Voltage 12VA Comparator, TJ = +25°C
-4.0
4.0
mV
IS12BVIO
Input Offset Voltage 12VB Comparator, TJ = +25°C
-4.0
4.0
mV
IS33VIO
Input Offset Voltage 33V Comparator, TJ = +25°C
-4.0
4.0
mV
IS5VIO
Input Offset Voltage 5V Comparator, TJ = +25°C
-4.0
4.0
mV
AVOL
IIB
IREFGAIN
Voltage Gain (Note 3)
50
Input Bias Current (VIS12x = 12V, VIS5 = 5V, VIS33 = 3.3V)
The Gain of the IREF signal, RI=33 k ±0.1%, IREF = 1.25/RI,
TJ=+25°C
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5
7.68
200
V/mV
300
500
8.0
8.32
nA
NCP4350
ELECTRICAL CHARACTERISTICS (VCC = 12V, for typical values TJ = 25°C, for min/max values, TJ = 0°C to +105°C,
Max TJ = 150°C, RI =33 kW, unless otherwise noted.)
Symbol
Rating
Min
Typ
Max
Unit
Time delay On/Off PSONB (PGO↓) 50% of the pull up voltage
(PSONB>VOHPSONB, Rpull-up FPOB =1k, Vpull-up = +5 V)
24
38
62
msec
TdlyFOP
Time delay between PGO↓ and FPOB↑
2.0
4.0
8.0
msec
TdlyOV
Time delay from an OV to FPOB↑ and PGO↓ 50% of the pull up
voltage (PSONB<VOLPSONB, Rpull-up FPOB =1k, Vpull-up = +5 V)
9.0
14
19
msec
TdlyUV
Time delay from an UV to FPOB↑ and PGO↓ 50% of the pull up
voltage (PSONB<VOLPSONB, Rpull-up FPOB =1k, Vpull-up = +5 V)
0.5
1.0
2.0
msec
Time delay PGI↑ to PGO↓
(PSONB<VOLPSONB, Rpull-up PGO =1k, Vpull-up = +5 V)
100
300
438
msec
TdllySTART
Time delay on start-up UV, OC, OTP lockout
45
75
130
msec
TdelayOTP
Time delay from an OTP↑ to FPOB↑ and PGO↓ 50% of the pull up
voltage (PSONB<VOLPSONB, Rpull-up FPOB and PGO =1k, Vpull-up
= +5 V) OTP↓
0.5
1.0
2.0
msec
TdlyOCP
Time delay from an OCP to FPOB↑ and PGO↓ 50% of the pull up
voltage (PSONB<VOLPSONB, Rpull up FPOB and PGO =1k, Vpull-up
= +5 V)
11
20
32
msec
TdlyPGI
Time delay from PSONB↓ to PGO↑ 10-90% of the pull up voltage
(PGI>VTHPGI, Rpull-up PGO=1k, Vpull-up = +5V)
124
338
500
msec
1.18
1.25
1.32
V
Delay Characteristics
TdlyPSONB
TdlyPGO
Overtemperature Input
VOTP
VOTPHYS
Voltage threshold for OTP↓(PGO↓, FPOB↑, PSONB < VOLPSONB,
Rpull-up FPOB and PGO =1k, Vpull-up = +5 V)
Overtemperature Comparator Hysteresis (Note 3)
50
3. Guaranteed by design.
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6
mV
NCP4350
6.0V
4.0V
2.0V
0V
V(PSONB:OUT)
5.0V
2.5V
0V
V(PGI:OUT)
6.0V
4.0V
2.0V
0V
V(OTP:OUT)
6.0V
4.0V
2.0V
0V
V(OVP:OUT)
5.0V
2.5V
0V
V(FPOB:3)
5.0V
SEL>>
0V
0s
50ms
100ms
150ms
200ms
250ms
300ms
350ms
400ms
450ms
300ms
350ms
400ms
450ms
V(PGO:3)
Time
Figure 3. PSONB ON/OFF
6.0V
4.0V
2.0V
0V
V(PSONB:OUT)
5.0V
2.5V
0V
V(PGI:OUT)
6.0V
4.0V
2.0V
0V
V(OTP:OUT)
6.0V
4.0V
2.0V
0V
V(OVP:OUT)
5.0V
2.5V
0V
V(FPOB:3)
5.0V
SEL>>
0V
0s
50ms
100ms
150ms
200ms
250ms
V(PGO:3)
Time
Figure 4. AC Turn-On - UVP, OVP, OCP, OTP Fault
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7
NCP4350
6.0V
4.0V
2.0V
0V
V(PSONB:OUT)
5.0V
2.5V
0V
V(PGI:OUT)
6.0V
4.0V
2.0V
0V
V(OTP:OUT)
6.0V
4.0V
2.0V
0V
V(OVP:OUT)
5.0V
2.5V
0V
V(FPOB:3)
5.0V
SEL>>
0V
0s
50ms
100ms
150ms
200ms
250ms
300ms
350ms
400ms
450ms
350ms
400ms
450ms
V(PGO:3)
Time
Figure 5. PSONB Turn-On - AC Turn-Off
6.0V
4.0V
2.0V
0V
V(PSONB:OUT)
5.0V
2.5V
0V
V(PGI:OUT)
6.0V
4.0V
2.0V
0V
V(OTP:OUT)
6.0V
4.0V
2.0V
0V
V(OVP:OUT)
5.0V
2.5V
0V
V(FPOB:3)
5.0V
SEL>>
0V
0s
50ms
100ms
150ms
200ms
250ms
300ms
V(PGO:3)
Time
Figure 6. AC Turn-On with OTP, UVP or OCP Fault
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8
NCP4350
TABLE 1: ASIC TRUTH TABLE
PGI
PSONB (REMOTE)
UVP,OVP,OCP
FPOB (FAULT)
PGO
<1.25V(L)
<1.25V(L)
L
No
L
L
L
Yes
L
L
>1.25V(H)
L
No
L
H
>1.25V(H)
L
Yes
H
L
Overload Current Monitoring
Output Voltage Sensing
In ATX power supplies the output power must be
monitored and limited. In the present ATX specification the
+3.3 V and +5 V outputs have a very relaxed tolerance for
the over current limit set point. As a result customers
typically use the dc resistance in the output filter inductor. If
very accuracy current sensing is required, as is the case for
the +12 V outputs, a precision current shunt is used.
Four output voltage sense lines are provided +3.3V,
+5.0V, +12VA, +12VB. Each of the sensed input signals is
inputted into an undervoltage (UVP) and overvoltage
(OVP) comparators. In the event of an output fault (OVP or
UVP) the fault trigger signal is delayed and then latch. The
delay has been added to prevent the Latch from being set
during output transient conditions. During start-up the UVP,
OTP and OCP comparators output are ignored.
IL
VL
RL
R
Power Good Input
Vout
Vsense
The Power Good input (PGI) can be used to monitor an
additional logic event, for example the temperature inside an
ATX power supply. When the input voltage at the PGI is
below the threshold 1.25 V, the Power Good Output (PGO)
signal remains in a low state, even if all of the voltage and
current sensed inputs are within the voltage and current
limits.
VS
VR
IS
+
OUT
I3
8xIREF
PSONB
The PSONB input is active low and is used to turn on/off
the primary side controller. The PSONB signal can also be
used to reset the PGO output after a fault a condition has
occurred. When the PSONB signal is low (the external
connection), the Fault signal between the monitoring
controller and the power supply is enabled (FAULT will be
low, no Fault). In order to reset the Fault latch a minimum
width pulse should be applied to the PSONB input, the pulse
should be greater than 38 msec (typical).
The circuit operates as shown, when the load current
increases the voltage drop across the inductor, or current
shunt, in series (the dc resistance) with the output increases
reducing the voltage at the negative input of the overcurrent
comparator. The voltage at the positive input to the
comparator is set by the IREF current source, if the voltage
at the negative input to the comparator is less than the
voltage at the positive input to the comparator; the
comparator output goes high indicating an overload
condition. The overload trip level can be determined by the
following relationships:
VR + 8
R+
I REF
Power Good Output
The Power Good (PGO) signal is intended to warn the
motherboard that the output voltage or current of at least one
of the four outputs is out of tolerance. The PGO signal is
delayed by 300 msec (typical) to avoid false tripping due to
transient conditions. The PGO output is capable of sinking
5 mA of current.
R
RL @ IL
IREF @ 8
Example:
RI = 33 kW
RL = 0.002 W
R = 150 W
FPOB Output
I REF +
In a typical application (refer to Figure 2) the Fault pin is
activated (high level) when any one of four outputs is out of
range, or there is an output overload condition. The Fault
output is the link between the output monitoring circuits and
the primary PWM. The Fault output is capable of sinking
5 mA of current.
V REF
+ 1.25V
RI
33k
I L + I REF @ 8 @ R + 37.87mA @ 8 @ 150 + 22.72Adc
0.002
RL
This calculation neglects input voltage offset, biases
currents, and other tolerances.
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NCP4350
PACKAGE DIMENSIONS
SOIC-16
D SUFFIX
CASE 751B-05
ISSUE J
-A-
16
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
9
-B1
P
8 PL
0.25 (0.010)
8
M
B
S
G
R
K
F
X 45 _
C
-T-
SEATING
PLANE
J
M
D
16 PL
0.25 (0.010)
M
T B
S
A
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
S
The product described herein (NCP4350), may be covered by U.S. patents including 6,373,734. There may be other patents pending.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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NCP4350/D