Complementary Bias Resistor Transistors

MUN5336DW1
Complementary Bias
Resistor Transistors
R1 = 100 kW, R2 = 100 kW
NPN and PNP Transistors with Monolithic
Bias Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
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PIN CONNECTIONS
(3)
(2)
R1
(1)
R2
Q1
Features
•
•
•
•
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
Q2
R2
(4)
R1
(5)
(6)
MARKING
DIAGRAM
MAXIMUM RATINGS
(TA = 25°C both polarities Q1 (PNP) & Q2 (NPN), unless otherwise noted)
Rating
Symbol
Max
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
IC
100
mAdc
Input Forward Voltage
VIN(fwd)
40
Vdc
Input Reverse Voltage
VIN(rev)
10
Vdc
Collector Current − Continuous
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
Device
MUN5336DW1T1G
Package
Shipping†
SOT−363
3,000 / Tape & Reel
6
SOT−363
CASE 419B
36 M G
G
1
36
M
G
= Specific Device Code
= Date Code*
= Pb-Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2014
January, 2014 − Rev. 0
1
Publication Order Number:
DTC115EP/D
MUN5336DW1
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
187
256
1.5
2.0
mW
MUN5336DW1 (SOT−363) ONE JUNCTION HEATED
Total Device Dissipation
TA = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
PD
RqJA
mW/°C
670
490
°C/W
250
385
2.0
3.0
mW
MUN5336DW1 (SOT−363) BOTH JUNCTION HEATED (Note 3)
Total Device Dissipation
TA = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
Junction and Storage Temperature Range
PD
RqJA
RqJL
TJ, Tstg
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 × 1.0 Inch Pad.
3. Both junction heated values assume total power is sum of two equally powered channels.
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2
493
325
188
208
−55 to +150
mW/°C
°C/W
°C/W
°C
MUN5336DW1
ELECTRICAL CHARACTERISTICS (TA = 25°C both polarities Q1 (PNP) & Q2 (NPN), unless otherwise noted)
Symbol
Characteristic
Min
Typ
Max
−
−
100
−
−
500
−
−
0.05
50
−
−
50
−
−
80
150
−
−
−
0.25
−
−
1.2
1.2
0.5
0.5
3.0
3.0
1.7
1.6
−
−
−
−
0.2
4.9
−
−
Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
Collector-Emitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
Emitter-Base Cutoff Current
(VEB = 6.0 V, IC = 0)
IEBO
Collector-Base Breakdown Voltage
(IC = 10 mA, IE = 0)
V(BR)CBO
Collector-Emitter Breakdown Voltage (Note 4)
(IC = 2.0 mA, IB = 0)
V(BR)CEO
nAdc
nAdc
mAdc
Vdc
Vdc
ON CHARACTERISTICS
hFE
DC Current Gain (Note 4)
(IC = 5.0 mA, VCE = 10 V)
Collector-Emitter Saturation Voltage (Note 4)
(IC = 10 mA, IB = 0.3 mA)
VCE(sat)
Input Voltage (Off)
(VCE = 5.0 V, IC = 100 mA) (NPN)
(VCE = 5.0 V, IC = 100 mA) (PNP)
Vi(off)
Input Voltage (On)
(VCE = 0.3 V, IC = 3.0 mA) (NPN)
(VCE = 0.3 V, IC = 3.0 mA) (PNP)
Vi(on)
Output Voltage (On)
(VCC = 5.0 V, VB = 5.5 V, RL = 1.0 kW)
VOL
Output Voltage (Off)
(VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
VOH
Input Resistor
R1
70
100
130
Resistor Ratio
R1/R2
0.8
1.0
1.2
V
Vdc
Vdc
Vdc
Vdc
kW
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle ≤ 2%.
PD, POWER DISSIPATION (mW)
400
350
300
(1)
250
(1) SOT−363; 1.0 × 1.0 Inch Pad
200
150
100
50
0
−50
−25
0
25
50
75
100
125
150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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3
MUN5336DW1
1000
1
VCE = 10 V
IC/IB = 10
TA = −25°C
hFE, DC CURRENT GAIN
VCE(sat), COLLECTOR−EMITTER VOLTAGE (V)
TYPICAL CHARACTERISTICS
MUN5336DW1 − NPN
25°C
75°C
0.1
0.01
75°C
TA = −25°C
100
0
5
15
25
10
20
30
IC, COLLECTOR CURRENT (mA)
35
10
40
10
1
IC, COLLECTOR CURRENT (mA)
0.1
Figure 2. VCE(sat) vs. IC
100
IC, COLLECTOR CURRENT (mA)
2.4
2.0
1.6
1.2
0.8
0.4
0
0
10
20
30
40
VR, REVERSE VOLTAGE (V)
TA = −25°C
10
25°C
1
0.1
50
75°C
VO = 5 V
0
Figure 4. Output Capacitance
VO = 0.2 V
5
10
15
20
25
30
Vin, INPUT VOLTAGE (V)
25°C
TA = −25°C
75°C
10
1
0.1
0
5
35
Figure 5. Output Current vs. Input Voltage
100
Vin, INPUT VOLTAGE (V)
Cob, CAPACITANCE (pF)
f = 10 kHz
lE = 0 A
TA = 25°C
2.8
100
Figure 3. DC Current Gain
3.6
3.2
25°C
10
20
15
25
IC, COLLECTOR CURRENT (mA)
30
Figure 6. Input Voltage vs. Output Current
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4
35
40
MUN5336DW1
TYPICAL CHARACTERISTICS
MUN5336DW1 − PNP
1000
IC/IB = 10
150°C
hFE, DC CURRENT GAIN
VCE(sat), COLLECTOR−EMITTER
VOLTAGE (V)
10
1
25°C
150°C
0.1
−55°C
10
−55°C
0.01
0
VCE = 10 V
10
20
30
40
1
50
1
100
Figure 7. VCE(sat) vs. IC
Figure 8. DC Current Gain
100
IC, COLLECTOR CURRENT (mA)
f = 10 kHz
IE = 0 A
TA = 25°C
8
6
4
2
10
20
30
40
−55°C
10
25°C
1
0.1
VO = 5 V
0.01
50
150°C
0
4
8
12
16
20
24
VR, REVERSE VOLTAGE (V)
Vin, INPUT VOLTAGE (V)
Figure 9. Output Capacitance
Figure 10. Output Current vs. Input Voltage
100
Vin, INPUT VOLTAGE (V)
0
10
IC, COLLECTOR CURRENT (mA)
10
0
0.1
IC, COLLECTOR CURRENT (mA)
12
Cob, OUTPUT CAPACITANCE (pF)
100
25°C
−55°C
25°C
10
150°C
1
0.1
VO = 0.2 V
0
10
20
30
40
IC, COLLECTOR CURRENT (mA)
Figure 11. Input Voltage vs. Output Current
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5
50
28
MUN5336DW1
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
2X
aaa H D
D
A
D
6
5
GAGE
PLANE
4
2
L
L2
E1
E
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
H
DETAIL A
3
aaa C
2X
bbb H D
2X 3 TIPS
e
B
6X
ddd
TOP VIEW
C A-B D
M
A2
DETAIL A
A
6X
ccc C
DIM
A
A1
A2
b
C
D
E
E1
e
L
L2
aaa
bbb
ccc
ddd
b
A1
SIDE VIEW
C
SEATING
PLANE
END VIEW
c
MILLIMETERS
MIN
NOM MAX
−−−
−−−
1.10
0.00
−−−
0.10
0.70
0.90
1.00
0.15
0.20
0.25
0.08
0.15
0.22
1.80
2.00
2.20
2.00
2.10
2.20
1.15
1.25
1.35
0.65 BSC
0.26
0.36
0.46
0.15 BSC
0.15
0.30
0.10
0.10
INCHES
NOM MAX
−−− 0.043
−−− 0.004
0.035 0.039
0.008 0.010
0.006 0.009
0.078 0.086
0.082 0.086
0.049 0.053
0.026 BSC
0.010 0.014 0.018
0.006 BSC
0.006
0.012
0.004
0.004
MIN
−−−
0.000
0.027
0.006
0.003
0.070
0.078
0.045
RECOMMENDED
SOLDERING FOOTPRINT*
6X
6X
0.30
0.66
2.50
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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