Dual 4-Input Multiplexer

MC74AC352, MC74ACT352
Dual 4−Input Multiplexer
The MC74AC352/74ACT352 is a very high-speed dual 4-input
multiplexer with common Select inputs and individual Enable inputs
for each section. It can select two bits of data from four sources. The
two buffered outputs present data in the inverted (complementary)
form. The MC74AC352/74ACT352 is the functional equivalent of the
MC74AC153/74ACT153 except with inverted outputs.
•
•
•
•
Inverted Version of the MC74AC153/74ACT153
Separate Enables for Each Multiplexer
Outputs Source/Sink 24 mA
′ACT352 Has TTL Compatible Inputs
VCC
Eb
S0
I3b
I2b
I1b
I0b
Zb
16
15
14
13
12
11
10
9
http://onsemi.com
DUAL 4-INPUT MULTIPLEXER
PIN NAMES
I0a−I3a
I0b−I3b
S0, S1
Ea
Eb
Za, Zb
1
2
3
4
5
6
7
8
Ea
S1
I3a
I2a
I1a
I0a
Za
GND
N SUFFIX
CASE 648-08
PLASTIC
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Enable Input
Side B Enable Input
Multiplexer Outputs
D SUFFIX
CASE 751B-05
PLASTIC
TRUTH TABLE
Select Inputs
Inputs (a or b)
Output
S0
S1
E
I0
I1
I2
I3
Z
X
L
L
H
H
L
L
H
H
X
L
L
L
L
H
H
H
H
H
L
L
L
L
L
L
L
L
X
L
H
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
L
H
H
H
L
H
L
H
L
H
L
LOGIC SYMBOL
S0
S1
Ea I0a I1a I2a I3a I0b I1b I2b I3b Eb
Za
Zb
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 4
1
Publication Order Number:
MC74AC352/D
MC74AC352, MC74ACT352
FUNCTIONAL DESCRIPTION
The MC74AC352/74ACT352 can be used to move data
from a group of registers to a common output bus. The
particular register from which the date came would be
determined by the state of the Select inputs. A less obvious
application is as a function generator. The MC74AC352/
74ACT352 can generate two functions of three variables.
This is useful for implementing highly irregular random logic.
The MC74AC352/74ACT352 is a dual 4-input multiplexer.
It selects two bits of data from up to four sources under the
control of the common Select inputs (S0, S1). The two 4-input
multiplexer circuits have individual active LOW Enables (Ea,
Eb) which can be used to strobe the outputs independently.
When the Enables (Ea, Eb) are HIGH, the corresponding
outputs (Za, Zb) are forced HIGH.
The logic equations for the outputs are shown below:
Za = Ea•(I0a•S1•S0+I1a•S1•S0+
I2a•S1•S0+I3a•S1•S0)
Zb = Eb•(I0b•S1•S0+I1b•S1•S0+
I2b•S1•S0+I3b•S1•S0)
LOGIC DIAGRAM
Ea I0a
I1a
I2a
I3a
S0
S0
I0b
I1b
Za
I2b
Zb
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
http://onsemi.com
2
I3b Eb
MC74AC352, MC74ACT352
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
−0.5 to +7.0
V
Vin
DC Input Voltage (Referenced to GND)
−0.5 to VCC +0.5
V
Vout
DC Output Voltage (Referenced to GND)
−0.5 to VCC +0.5
V
Iin
DC Input Current, per Pin
±20
mA
Iout
DC Output Sink/Source Current, per Pin
±50
mA
ICC
DC VCC or GND Current per Output Pin
±50
mA
Tstg
Storage Temperature
−65 to +150
°C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended
Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Supply Voltage
Vin, Vout
DC Input Voltage, Output Voltage (Ref. to GND)
tr, tf
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
tr, tf
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
TJ
Junction Temperature (PDIP)
TA
Operating Ambient Temperature Range
IOH
IOL
Min
Typ
Max
′AC
2.0
5.0
6.0
′ACT
4.5
5.0
5.5
0
VCC
VCC @ 3.0 V
150
VCC @ 4.5 V
40
VCC @ 5.5 V
25
VCC @ 4.5 V
10
VCC @ 5.5 V
8.0
Unit
V
V
ns/V
ns/V
140
°C
85
°C
Output Current — High
−24
mA
Output Current — Low
24
mA
−40
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
http://onsemi.com
3
25
MC74AC352, MC74ACT352
DC CHARACTERISTICS
Symbol
Parameter
VCC
(V)
74AC
74AC
TA = +25°C
TA =
−40°C to +85°C
Typ
Unit
Conditions
Guaranteed Limits
VIH
Minimum High Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
VOUT = 0.1 V
or VCC − 0.1 V
VIL
Maximum Low Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
VOUT = 0.1 V
or VCC − 0.1 V
VOH
Minimum High Level
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
V
2.56
3.86
4.86
2.46
3.76
4.76
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
5.5
±0.1
±1.0
μA
VI = VCC, GND
5.5
75
mA
VOLD = 1.65 V Max
5.5
−75
mA
VOHD = 3.85 V Min
80
μA
VIN = VCC or GND
3.0
4.5
5.5
VOL
Maximum Low Level
Output Voltage
IIN
Maximum Input
Leakage Current
IOLD
†Minimum Dynamic
Output Current
IOHD
ICC
Maximum Quiescent
Supply Current
3.0
4.5
5.5
0.002
0.001
0.001
5.5
8.0
* All outputs loaded; thresholds on input associated with output under test.
† Maximum test duration 2.0 ms, one output loaded at a time.
Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
http://onsemi.com
4
V
V
V
IOUT = −50 μA
*VIN = VIL or VIH
−12 mA
IOH
−24 mA
−24 mA
IOUT = 50 μA
*VIN = VIL or VIH
12 mA
IOL
24 mA
24 mA
MC74AC352, MC74ACT352
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)
Symbol
VCC*
(V)
Parameter
74AC
74AC
TA = +25°C
CL = 50 pF
TA = −40°C
to +85°C
CL = 50 pF
Min
Typ
Max
Min
Max
Unit
Fig.
No.
tPLH
Propagation Delay
Sn to Zn
3.3
5.0
2.0
2.0
8.5
6.5
15.0
11.0
1.0
1.0
17.5
12.5
ns
3-6
tPHL
Propagation Delay
Sn to Zn
3.3
5.0
2.0
2.0
8.0
6.0
14.5
11.0
1.0
1.0
16.5
12.0
ns
3-6
tPLH
Propagation Delay
En to Zn
3.3
5.0
2.0
2.0
6.0
4.5
13.5
9.5
1.0
1.0
16.0
11.0
ns
3-6
tPHL
Propagation Delay
En to Zn
3.3
5.0
2.0
2.0
5.5
4.0
11.0
8.0
1.0
1.0
12.5
9.0
ns
3-6
tPLH
Propagation Delay
In to Zn
3.3
5.0
2.0
2.0
7.0
5.0
12.5
9.0
1.0
1.0
14.5
10.5
ns
3-5
tPHL
Propagation Delay
In to Zn
3.3
5.0
2.0
2.0
7.0
5.0
11.5
8.5
1.0
1.0
13.0
10.0
ns
3-5
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
DC CHARACTERISTICS
Symbol
Parameter
VCC
(V)
74ACT
74ACT
TA = +25°C
TA =
−40°C to +85°C
Unit
Conditions
Typ
Guaranteed Limits
VIH
Minimum High Level
Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
VOUT = 0.1 V
or VCC − 0.1 V
VIL
Maximum Low Level
Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
VOUT = 0.1 V
or VCC − 0.1 V
VOH
Minimum High Level
Output Voltage
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
V
3.86
4.86
3.76
4.76
0.1
0.1
0.1
0.1
4.5
5.5
0.36
0.36
0.44
0.44
V
±0.1
±1.0
μA
VI = VCC, GND
1.5
mA
VI = VCC − 2.1 V
4.5
5.5
VOL
Maximum Low Level
Output Voltage
4.5
5.5
0.001
0.001
V
V
IOUT = −50 μA
*VIN = VIL or VIH
−24 mA
IOH
−24 mA
IOUT = 50 μA
*VIN = VIL or VIH
24 mA
IOL
24 mA
IIN
Maximum Input
Leakage Current
5.5
ΔICCT
Additional Max. ICC/Input
5.5
IOLD
†Minimum Dynamic
Output Current
5.5
75
mA
VOLD = 1.65 V Max
5.5
−75
mA
VOHD = 3.85 V Min
80
μA
VIN = VCC or GND
IOHD
ICC
Maximum Quiescent
Supply Current
0.6
5.5
8.0
* All outputs loaded; thresholds on input associated with output under test.
† Maximum test duration 2.0 ms, one output loaded at a time.
http://onsemi.com
5
MC74AC352, MC74ACT352
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)
Symbol
VCC*
(V)
Parameter
74ACT
74ACT
TA = +25°C
CL = 50 pF
TA = −40°C
to +85°C
CL = 50 pF
Min
Typ
Max
Min
Max
Unit
Fig.
No.
tPLH
Propagation Delay
Sn to Zn
5.0
3.0
6.0
10.5
1.0
11.5
ns
3-6
tPHL
Propagation Delay
Sn to Zn
5.0
3.0
6.0
10.0
1.0
11.5
ns
3-6
tPLH
Propagation Delay
En to Zn
5.0
2.0
4.5
8.0
1.0
8.5
ns
3-6
tPHL
Propagation Delay
En to Zn
5.0
2.0
4.5
8.0
1.0
8.5
ns
3-6
tPLH
Propagation Delay
In to Zn
5.0
2.0
5.5
10.0
1.0
11.0
ns
3-5
tPHL
Propagation Delay
In to Zn
5.0
2.0
6.5
8.5
1.0
9.0
ns
3-5
* Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Parameter
Value
Typ
Unit
Test Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
50
pF
VCC = 5.0 V
http://onsemi.com
6
MC74AC352, MC74ACT352
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC DIP PACKAGE
CASE 648−08
ISSUE R
−A−
16
9
1
8
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
B
F
C
DIM
A
B
C
D
F
G
H
J
K
L
M
S
L
S
−T−
SEATING
PLANE
K
H
G
D
M
J
16 PL
0.25 (0.010)
T A
M
M
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B−05
ISSUE J
−A−
16
9
1
8
−B−
P
M
B
S
G
R
K
F
X 45 _
C
−T−
SEATING
PLANE
J
M
D
16 PL
0.25 (0.010)
M
T B
S
A
MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
8 PL
0.25 (0.010)
INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0_
10 _
0.020
0.040
S
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
7
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
MC74AC352/D
Similar pages