NL27WZ02 Dual 2-Input NOR Gate The NL27WZ02 is a high performance dual 2−input NOR Gate operating from a 1.65 V to 5.5 V supply. Features • • • • • • • • • • Extremely High Speed: tPD 2.5 ns (typical) at VCC = 5.0 V Designed for 1.65 V to 5.5 V VCC Operation Over Voltage Tolerant Inputs LVTTL Compatible − Interface Capability With 5.0 V TTL Logic with VCC = 3.0 V LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current Substantially Reduces System Power Requirements Replacement for NC7WZ02 Chip Complexity: FET = 112 These Devices are Pb−Free and are RoHS Compliant http://onsemi.com MARKING DIAGRAM 8 L3 M G G US8 US SUFFIX CASE 493 L3 M G 1 = Specific Device Code = Date Code* = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. A1 B1 1 8 2 7 VCC PIN ASSIGNMENT Y1 Y2 3 6 B2 GND 4 5 A2 Pin Function 1 A1 2 B1 3 Y2 4 GND 5 A2 6 B2 7 Y1 8 VCC Figure 1. Pinout FUNCTION TABLE A1 B1 w1 A2 Output Y1 Input A Y2 B2 Figure 2. Logic Symbol Y=A+B B Y L L H L H L H L L H H L ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. © Semiconductor Components Industries, LLC, 2013 March, 2013 − Rev. 12 1 Publication Order Number: NL27WZ02/D NL27WZ02 MAXIMUM RATINGS Symbol Value Units DC Supply Voltage −0.5 to +7.0 V VI DC Input Voltage −0.5 to +7.0 V VO DC Output Voltage −0.5 to +7.0 V IIK DC Input Diode Current VI < GND −50 mA IOK DC Output Diode Current VO < GND −50 mA VCC Parameter IO DC Output Sink Current ±50 mA ICC DC Supply Current per Supply Pin ±100 mA IGND DC Ground Current per Ground Pin ±100 mA TSTG Storage Temperature Range −65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature under Bias +150 °C qJA Thermal Resistance (Note 1) 250 °C/W PD Power Dissipation in Still Air at 85°C 250 mW MSL FR VESD ILATCHUP Moisture Sensitivity Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in ESD Withstand Voltage Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) V > 2000 > 200 N/A Latchup Performance Above VCC and Below GND at 125°C (Note 5) mA ±100 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min Max 1.65 1.5 5.5 5.5 0 5.5 Units Supply Voltage Operating Data Retention Only VCC Input Voltage (Note 6) VI Output Voltage (HIGH or LOW State) VO 0 5.5 V Operating Free−Air Temperature TA −55 +125 °C Input Transition Rise or Fall Rate VCC = 1.8 V ±0.15 V VCC = 2.5 V ±0.2 V VCC = 3.0 V ±0.3 V VCC = 5.0 V ±0.5 V Dt/DV 0 0 0 0 20 20 10 5 6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level. http://onsemi.com 2 V V ns/V NL27WZ02 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Condition TA = 255C VCC (V) Min 0.75 VCC 0.7 VCC VIH High−Level Input Voltage 1.65 2.3 to 5.5 VIL Low−Level Input Voltage 1.65 2.3 to 5.5 VOH High−Level Output Voltage VIN = VIL or VIH IOH = −100 mA IOH = −4 mA IOH = −8 mA IOH = −12 mA IOH = −16 mA IOH = −24 mA IOH = −32 mA 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 VOL Low−Level Output Voltage VIN = VIH or VOH IOL = 100 mA IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 Input Leakage Current VIN = 5.5 V or GND IOFF Power Off Leakage Current VIN = 5.5 V or VOUT = 5.5 V ICC Quiescent Supply Current VIN = 5.5 V or GND IIN Typ −555C 3 TA 3 1255C Max Min Max 0.75 VCC 0.7 VCC 0.25 VCC 0.3 VCC VCC − 0.1 1.29 1.9 2.2 2.4 2.3 3.8 VCC 1.5 2.1 2.4 2.7 2.5 4.0 0.0 0.08 0.20 0.22 0.28 0.38 0.42 Units V 0.25 VCC 0.3 VCC VCC − 0.1 1.29 1.90 2.20 2.40 2.30 3.80 V V 0.1 0.24 0.3 0.4 0.4 0.55 0.55 0.1 0.24 0.3 0.4 0.4 0.55 0.55 V 0 to 5.5 ±0.1 ±1.0 mA 0 1 10 mA 5.5 1 10 mA AC ELECTRICAL CHARACTERISTICS tR = tF = 3.0 ns TA = 255C VCC −555C 3 TA 3 1255C Parameter Condition Symbol (V) Min Typ Max Min Max Propagation Delay (Figure 3 and 4) RL = 1 MW, CL = 15 pF tPLH tPHL 1.8 ± 0.15 2.0 7.4 9.5 2.0 9.7 Units ns 2.5 ± 0.20 1.2 3.3 5.4 1.2 5.8 RL = 1 MW, CL = 15 pF RL = 500 W, CL = 50 pF 3.3 ± 0.30 0.8 1.2 2.6 3.2 3.9 4.8 0.8 1.2 4.3 5.2 RL = 1 MW, CL = 15 pF RL = 500 W, CL = 50 pF 5.0 ± 0.50 0.5 0.8 1.9 2.5 3.1 3.7 0.5 0.8 3.3 4.0 CAPACITIVE CHARACTERISTICS Parameter Condition Symbol Typical Units Input Capacitance VCC = 5.5 V, VI = 0 V or VCC CIN 2.5 pF Power Dissipation Capacitance (Note 7) 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 10 MHz, VCC = 5.5 V, VI = 0 V or VCC CPD 9.0 11.0 pF 7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 3 NL27WZ02 tf = 3 ns tf = 3 ns 90% INPUT A and B 50% VCC 90% 50% 10% 10% tPHL INPUT OUTPUT GND RL tPLH CL VOH OUTPUT Y 50% 50% A 1−MHz square input wave is recommended for propagation delay tests. VOL Figure 3. Switching Waveform Figure 4. Test Circuit ORDERING INFORMATION Device NL27WZ02USG Package Shipping† US8 (Pb−Free) 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 4 NL27WZ02 PACKAGE DIMENSIONS US8 CASE 493−02 ISSUE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION “A” DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. MOLD FLASH. PROTRUSION AND GATE BURR SHALL NOT EXCEED 0.140 MM (0.0055”) PER SIDE. 4. DIMENSION “B” DOES NOT INCLUDE INTER−LEAD FLASH OR PROTRUSION. INTER−LEAD FLASH AND PROTRUSION SHALL NOT E3XCEED 0.140 (0.0055”) PER SIDE. 5. LEAD FINISH IS SOLDER PLATING WITH THICKNESS OF 0.0076−0.0203 MM. (300−800 “). 6. ALL TOLERANCE UNLESS OTHERWISE SPECIFIED ±0.0508 (0.0002 “). −X− A 8 J −Y− 5 DETAIL E B L 1 4 R S G P U C −T− SEATING PLANE H 0.10 (0.004) T K D DIM A B C D F G H J K L M N P R S U V N R 0.10 TYP 0.10 (0.004) M T X Y V M F DETAIL E MILLIMETERS MIN MAX 1.90 2.10 2.20 2.40 0.60 0.90 0.17 0.25 0.20 0.35 0.50 BSC 0.40 REF 0.10 0.18 0.00 0.10 3.00 3.20 0_ 6_ 5_ 10 _ 0.23 0.34 0.23 0.33 0.37 0.47 0.60 0.80 0.12 BSC INCHES MIN MAX 0.075 0.083 0.087 0.094 0.024 0.035 0.007 0.010 0.008 0.014 0.020 BSC 0.016 REF 0.004 0.007 0.000 0.004 0.118 0.126 0_ 6_ 5_ 10 _ 0.010 0.013 0.009 0.013 0.015 0.019 0.024 0.031 0.005 BSC SOLDERING FOOTPRINT* 3.8 0.15 0.50 0.0197 1.8 0.07 0.30 0.012 1.0 0.0394 SCALE 8:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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