Dual 2-Input NOR Gate

NLX2G02
Dual 2-Input NOR Gate
The NLX2G02 is an advanced high-speed dual 2-input CMOS NOR
gate in ultra-small footprint.
The NLX2G02 input structures provide protection when voltages up
to 7.0 volts are applied, regardless of the supply voltage.
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Features
•
•
•
•
•
•
•
High Speed: tPD 2.5 ns (typical) at VCC = 5.0 V
Designed for 1.65 V to 5.5 V VCC Operation
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
24 mA Balanced Output Sink and Source Capability
Balanced Propagation Delays
Overvoltage Tolerant (OVT) Input Pins
This is a Pb−Free Device
A1
1
8
2
7
Y1
Y2
3
6
B2
XX
M
G
IEEE/IEC
A1
B1
4
5
A2
UDFN8
1.45 x 1.0
CASE 517BZ
1
UDFN8
1.6 x 1.0
CASE 517BY
1
UDFN8
1.95 x 1.0
CASE 517CA
VCC
B1
GND
MARKING
DIAGRAMS
XM
XM
1
= Specific Device Code
= Date Code
= Pb−Free Package
ORDERING INFORMATION
≥1
Y1
A2
B2
Figure 1. Pinout
XM
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Y2
Figure 2. Logic Symbol
PIN ASSIGNMENT
Pin
Function
FUNCTION TABLE
1
A1
Y=A+B
2
B1
3
Y2
A
B
Y
4
GND
L
L
H
5
A2
L
H
L
6
B2
H
L
L
7
Y1
H
H
L
8
VCC
© Semiconductor Components Industries, LLC, 2016
June, 2016 − Rev. 3
Inputs
Output
H = HIGH Logic Level
L = LOW Logic Level
1
Publication Order Number:
NLX2G02/D
NLX2G02
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
DC Supply Voltage
*0.5 to +7.0
V
VIN
DC Input Voltage
*0.5 to +7.0
V
*0.5 to VCC + 7.0
V
VIN < GND
*50
mA
VOUT < GND
*50
mA
VOUT
Parameter
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Source/Sink Current
$50
mA
ICC
DC Supply Current per Supply Pin
$100
mA
IGND
DC Ground Current per Ground Pin
$100
mA
TSTG
Storage Temperature Range
*65 to )150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction Temperature Under Bias
150
°C
qJA
Thermal Resistance (Note 1)
N/A
°C/W
PD
Power Dissipation in Still Air at 85°C
N/A
mW
MSL
Moisture Sensitivity
FR
Flammability Rating
VESD
ILatchup
Level 1
Oxygen Index: 28 to 34
ESD Withstand Voltage
UL 94 V−0 @ 0.125 in
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
Latchup Performance Above VCC and Below GND at 125°C
(Note 5)
2000
> 200
N/A
V
$500
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Power DC Supply Voltage
VIN
Digital Input Voltage (Note 6)
Output Voltage
VOUT
TA
Operating Free−Air Temperature
Dt/DV
Input Transition Rise or Fall Rate
Operating
Data Retention Only
VCC = 1.8 V $0.15 V
VCC = 2.5 V $0.2 V
VCC = 3.3 V $0.3 V
VCC = 5.0 V $0.5 V
Min
Max
Unit
1.65
1.5
5.5
5.5
V
0
5.5
V
0
VCC
V
−55
+125
°C
0
0
0
0
20
20
10
5
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
6. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.
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2
NLX2G02
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
VIH
High−Level Input
Voltage
Condition
VCC
(V)
1.65
2.3 to 5.5
VIL
Low−Level Input
Voltage
Min
Typ
High−Level
Output Voltage
VIN = VIH or VIL,
IOH = −100 mA
VIN = VIH or VIL
IOH = −4 mA
IOH = −8 mA
IOH = −12 mA
IOH = −16 mA
IOH = −24 mA
IOH = −32 mA
VOL
Low−Level
Output Voltage
VIN = VIH or VIL,
IOL = 100 mA
Min
Max
0.75 x
VCC
0.7 x
VCC
0.25 x
VCC
0.3 x
VCC
2.3 to 5.5
VOH
Max
0.75 x
VCC
0.7 x
VCC
1.65
TA = −555C to
+1255C
TA 3 855C
TA = 255C
Min
0.75 x
VCC
0.7 x
VCC
0.25 x
VCC
0.3 x
VCC
VCC −
0.1
VCC
VCC −
0.1
VCC −
0.1
1.65
2.3
2.7
3.0
3.0
4.5
1.29
1.9
2.2
2.4
2.3
3.8
1.5
2.1
2.4
2.7
2.5
4.0
1.29
1.9
2.2
2.4
2.3
3.8
1.29
1.9
2.2
2.4
2.3
3.8
Unit
V
0.25 x
VCC
0.3 x
VCC
1.65 to 5.5
1.65 to 5.5
Max
V
V
0.1
0.1
0.1
0.24
0.3
0.4
0.4
0.55
0.55
0.24
0.3
0.4
0.4
0.55
0.55
0.24
0.3
0.4
0.4
0.55
0.55
V
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
IOL = 12 mA
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA
1.65
2.3
2.7
3.0
3.0
4.5
Input Leakage
Current
0 ≤ VIN ≤ 5.5 V
0 to 5.5
$0.1
$1.0
$1.0
mA
IOFF
Power−Off Input
Leakage Current
VIN = 5.5 V
0
1.0
10
10
mA
ICC
Quiescent Supply
Current
VIN = VCC or
GND
5.5
1.0
10
10
mA
IIN
0.08
0.20
0.22
0.28
0.38
0.42
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS tR = tF = 2.5 ns
VCC
Symbol
tPLH
tPHL
Parameter
Propagation Delay
Input A to Output
TA 3 855C
TA = 255C
(V)
Test Condition
Min
Typ
Max
Min
Max
1.65 to 1.95
RL = 1 MW, CL = 15 pF
2.0
7.4
9.5
2.0
9.7
2.3 to 2.7
RL = 1 MW, CL = 15 pF
1.2
3.3
5.4
1.2
5.8
3.0 to 3.6
RL = 1 MW, CL = 15 pF
0.8
2.6
3.9
0.8
4.3
RL = 500 W, CL = 50 pF
1.2
3.2
4.8
1.2
5.2
RL = 1 MW, CL = 15 pF
0.5
1.9
3.1
0.5
3.3
RL = 500 W, CL = 50 pF
0.8
2.5
3.7
0.8
4.0
4.5 to 5.5
TA = −555C
to +1255C
Min
Max
Unit
ns
CIN
Input Capacitance
5.5
VIN = 0 V or VCC
2.5
pF
CPD
Power Dissipation
Capacitance (Note 7)
3.3
5.5
10 MHz, VIN = 0V or
VCC
9
11
pF
7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
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3
NLX2G02
tf = 3 ns
tf = 3 ns
90%
INPUT
A and B
VCC
90%
50%
INPUT
50%
OUTPUT
10%
10%
tPHL
GND
RL
CL
tPLH
VOH
OUTPUT Y
50%
A 1−MHz square input wave is recommended for
propagation delay tests.
50%
VOL
Figure 3. Switching Waveform
Figure 4. Test Circuit
ORDERING INFORMATION
Package
Shipping†
NLX2G02DMUTCG
UDFN8, 1.95 x 1.0, 0.5P
(Pb−Free)
3000 / Tape & Reel
NLX2G02EMUTCG
UDFN8, 1.6 x 1.0, 0.4P
(Pb−Free)
3000 / Tape & Reel
NLX2G02FMUTCG
UDFN8, 1.45 x 1.0, 0.35P
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NLX2G02
PACKAGE DIMENSIONS
UDFN8 1.6x1.0, 0.4P
CASE 517BY
ISSUE O
PIN ONE
REFERENCE
0.10 C
2X
2X
ÉÉÉ
ÉÉÉ
ÉÉÉ
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
A B
D
E
DIM
A
A1
A3
b
D
E
e
L
L1
TOP VIEW
A3
0.05 C
A
0.05 C
A1
SIDE VIEW
C
RECOMMENDED
SOLDERING FOOTPRINT*
SEATING
PLANE
7X
e/2
0.49
e
1
7X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.15
0.25
1.60 BSC
1.00 BSC
0.40 BSC
0.25
0.35
0.30
0.40
L
8X
0.26
4
L1
1.24
8
5
BOTTOM VIEW
8X
b
0.10
M
C A B
0.05
M
C
0.53
1
PKG
OUTLINE
0.40
PITCH
DIMENSIONS: MILLIMETERS
NOTE 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
NLX2G02
PACKAGE DIMENSIONS
UDFN8 1.45x1.0, 0.35P
CASE 517BZ
ISSUE O
PIN ONE
REFERENCE
0.10 C
2X
2X
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
A B
D
ÉÉ
ÉÉ
ÉÉ
E
DIM
A
A1
A3
b
D
E
e
L
L1
TOP VIEW
A3
0.05 C
A
0.05 C
A1
SIDE VIEW
C
RECOMMENDED
SOLDERING FOOTPRINT*
SEATING
PLANE
7X
0.48
e/2
e
1
7X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.15
0.25
1.45 BSC
1.00 BSC
0.35 BSC
0.25
0.35
0.30
0.40
8X
0.22
L
4
L1
1.18
8
5
BOTTOM VIEW
8X
0.53
b
0.10
M
C A B
0.05
M
C
1
PKG
OUTLINE
NOTE 3
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
6
0.35
PITCH
NLX2G02
PACKAGE DIMENSIONS
UDFN8 1.95x1.0, 0.5P
CASE 517CA
ISSUE O
PIN ONE
REFERENCE
0.10 C
2X
2X
ÉÉÉ
ÉÉÉ
ÉÉÉ
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
A B
D
E
DIM
A
A1
A3
b
D
E
e
L
L1
TOP VIEW
A3
0.05 C
A
0.05 C
A1
SIDE VIEW
C
RECOMMENDED
SOLDERING FOOTPRINT*
SEATING
PLANE
7X
e/2
0.49
e
7X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.15
0.25
1.95 BSC
1.00 BSC
0.50 BSC
0.25
0.35
0.30
0.40
L
8X
0.30
4
1
L1
1.24
8
5
8X
BOTTOM VIEW
b
0.10
M
C A B
0.05
M
C
0.54
NOTE 3
1
PKG
OUTLINE
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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For additional information, please contact your local
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NLX2G02/D
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