NLU1G14 Single Schmitt-Trigger Inverter The NLU1G14 MiniGatet is an advanced high−speed CMOS Schmitt−trigger inverter in ultra−small footprint. The NLU1G14 input and output structures provide protection when voltages up to 7.0 V are applied, regardless of the supply voltage. The NLU1G14 can be used to enhance noise immunity or to square up slowly changing waveforms. www.onsemi.com MARKING DIAGRAMS Features • • • • • • • High Speed: tPD = 4.0 ns (Typ) @ VCC = 5.0 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C Power Down Protection Provided on inputs Balanced Propagation Delays Overvoltage Tolerant (OVT) Input and Output Pins Ultra−Small Packages These are Pb−Free Devices NC 1 IN A 5 2 1 PM UDFN6 1.0 x 1.0 CASE 517BX QM UDFN6 1.45 x 1.0 CASE 517AQ LM 1 VCC 6 UDFN6 MU SUFFIX CASE 517AA 1 P M NC = Device Marking = Date Code ORDERING INFORMATION 3 GND 4 See detailed ordering and shipping information on page 4 of this data sheet. OUT Y Figure 1. Pinout (Top View) 1 IN A OUT Y Figure 2. Logic Symbol PIN ASSIGNMENT 1 NC 2 IN A 3 GND 4 OUT Y 5 NC 6 VCC FUNCTION TABLE A Y L H H L © Semiconductor Components Industries, LLC, 2016 June, 2016 − Rev. 4 1 Publication Order Number: NLU1G14/D NLU1G14 MAXIMUM RATINGS Symbol Value Unit VCC DC Supply Voltage −0.5 to +7.0 V VIN DC Input Voltage −0.5 to +7.0 V DC Output Voltage −0.5 to +7.0 V VIN < GND −20 mA VOUT < GND ±20 mA VOUT Parameter IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Source/Sink Current ±12.5 mA ICC DC Supply Current Per Supply Pin ±25 mA IGND DC Ground Current per Ground Pin ±25 mA TSTG Storage Temperature Range −65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature Under Bias 150 °C MSL FR VESD ILATCHUP Moisture Sensitivity Level 1 Flammability Rating Oxygen Index: 28 to 34 ESD Withstand Voltage UL 94 V−0 @ 0.125 in Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Latchup Performance Above VCC and Below GND at 125°C (Note 5) > 2000 > 200 N/A V ±500 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow. 2. Tested to EIA / JESD22−A114−A. 3. Tested to EIA / JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA / JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 1.65 5.5 V VCC Positive DC Supply Voltage VIN Digital Input Voltage 0 5.5 V Output Voltage 0 5.5 V −55 +125 °C 0 0 No Limit No Limit ns/V VOUT TA Operating Free−Air Temperature Dt/DV Input Transition Rise or Fall Rate VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V www.onsemi.com 2 NLU1G14 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Conditions TA = +855C TA = 25 5C VCC (V) Min Typ Max Min VT+ Positive Threshold Voltage 3.0 4.5 5.5 1.85 2.86 3.50 2.0 3.0 3.6 2.2 3.15 3.85 VT− Negative Threshold Voltage 3.0 4.5 5.5 0.9 1.35 1.65 1.5 2.3 2.9 1.65 2.46 3.05 0.9 1.35 1.65 VH Hysteresis Voltage 3.0 4.5 5.5 0.30 0.40 0.50 0.57 0.67 0.74 1.20 1.40 1.60 0.30 0.40 0.50 VOH Minimum High−Level Output Voltage VIN v VT−MIN IOH = −50 mA 2.0 3.0 4.5 1.9 2.9 4.4 2.0 3.0 4.5 VIN v VT−MIN IOH = −4 mA IOH = −8 mA 3.0 4.5 2.58 3.94 VIN w VT+MAX IOL = 50 mA 2.0 3.0 4.5 VIN w VT+MAX IOL = 4 mA IOL = 8 mA VOL Maximum Low−Level Output Voltage 0 0 0 Max TA = −555C to +1255C Min 2.2 3.15 3.85 Max Unit 2.2 3.15 3.85 V 0.9 1.35 1.65 1.20 1.40 1.60 0.30 0.40 0.50 1.9 2.9 4.4 1.9 2.9 4.4 2.48 3.80 2.34 3.66 V 1.20 1.40 1.60 V V 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 V IIN Input Leakage Current 0 v VIN v 5.5 V 0 to 5.5 ±0.1 ±1.0 ±1.0 mA ICC Quiescent Supply Current VIN = 5.5 V or GND 5.5 1.0 10 40 mA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Symbol tPLH, tPHL Parameter Propagation Delay, Input A to Output Y CIN Input Capacitance CPD Power Dissipation Capacitance (Note 6) VCC (V) Test Condition TA = +855C TA = 25 5C Min TA = −555C to +1255C Typ Max Min Max Min Max Unit ns 3.0 to 3.6 CL = 15 pF 7.0 12.8 1.0 15.0 1.0 17.0 CL = 50 pF 8.5 16.3 1.0 18.5 1.0 20.5 4.5 to 5.5 CL = 15 pF 4.0 8.6 1.0 10.0 1.0 11.5 CL = 50 pF 5.5 10.6 1.0 12.0 1.0 13.5 5 10 5.0 7.0 10 10.0 pF pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without load. Average operating current can be obtained by the equation ICC(OPR) = CPD • VCC • fin + ICC. CPD is used to determine the no−load dynamic power consumption: PD = CPD • VCC2 • fin + ICC • VCC. www.onsemi.com 3 NLU1G14 50% OUTPUT INPUT VCC A or B CL* GND tPLH Y tPHL 50% VCC *Includes all probe and jig capacitance. A 1−MHz square input wave is recommended for propagation delay tests. Figure 3. Switching Waveforms Figure 4. Test Circuit VH VCC VT+ VT− VIN VCC VH VT+ VT− VIN GND GND VOH VOH VOUT Vout VOL VOL (a) A Schmitt−Trigger Squares Up Inputs With Slow Rise and Fall Times (b) A Schmitt−Trigger Offers Maximum Noise Immunity Figure 5. Typical Schmitt−Trigger Applications ORDERING INFORMATION Package Shipping† NLU1G14MUTCG UDFN6, 1.2 x 1.0, 0.4P (Pb−Free) 3000 / Tape & Reel NLU1G14AMUTCG UDFN6, 1.45 x 1.0, 0.5P (Pb−Free) 3000 / Tape & Reel NLU1G14CMUTCG UDFN6, 1.0 x 1.0, 0.35P (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 4 NLU1G14 PACKAGE DIMENSIONS UDFN6 1.45x1.0, 0.5P CASE 517AQ ISSUE O A B D L L L1 PIN ONE REFERENCE 0.10 C ÉÉÉ ÉÉÉ DETAIL A E OPTIONAL CONSTRUCTIONS DETAIL B OPTIONAL CONSTRUCTIONS A 0.05 C A1 SIDE VIEW MOLD CMPD DETAIL B 0.05 C 6X DIM A A1 A2 b D E e L L1 ÉÉ ÉÉ EXPOSED Cu TOP VIEW 0.10 C A2 6X C 6X SEATING PLANE 0.30 PACKAGE OUTLINE L 1.24 3 DETAIL A 6X 0.53 4 BOTTOM VIEW MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.07 REF 0.20 0.30 1.45 BSC 1.00 BSC 0.50 BSC 0.30 0.40 −−− 0.15 MOUNTING FOOTPRINT e 1 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 6X 0.50 PITCH DIMENSIONS: MILLIMETERS b 0.10 C A B 0.05 C 1 NOTE 3 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 5 NLU1G14 PACKAGE DIMENSIONS UDFN6 1.0x1.0, 0.35P CASE 517BX ISSUE O PIN ONE REFERENCE 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 MM FROM TERMINAL TIP. 4. PACKAGE DIMENSIONS EXCLUSIVE OF BURRS AND MOLD FLASH. A B D ÉÉÉ ÉÉÉ ÉÉÉ E 0.10 C 2X 0.10 C DIM A A1 A3 b D E e L L1 TOP VIEW A3 0.05 C A MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.13 REF 0.12 0.22 1.00 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40 0.05 C SIDE VIEW A1 C RECOMMENDED SOLDERING FOOTPRINT* SEATING PLANE 5X e 5X 0.48 L 6X 0.22 3 1 L1 1.18 6 4 BOTTOM VIEW 6X b 0.10 M C A B 0.05 M C 0.53 1 PKG OUTLINE NOTE 3 0.35 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 6 NLU1G14 PACKAGE DIMENSIONS UDFN6, 1.2x1.0, 0.4P CASE 517AA ISSUE D EDGE OF PACKAGE PIN ONE REFERENCE 2X 0.10 C L1 ÉÉ ÉÉ E DETAIL A Bottom View (Optional) TOP VIEW 2X EXPOSED Cu 0.10 C (A3) 0.10 C A1 A 10X 0.08 C ÉÉÉ ÉÉÉ MOLD CMPD 5X DIM A A1 A3 b D E e L L1 L2 MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.15 0.25 1.20 BSC 1.00 BSC 0.40 BSC 0.30 0.40 0.00 0.15 0.40 0.50 MOUNTING FOOTPRINT* 6X C A1 A3 DETAIL B Side View (Optional) SEATING PLANE SIDE VIEW 1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A B D 6X 0.42 0.22 L 3 L2 6X b 0.10 C A B 0.05 C 6 0.40 PITCH 4 e NOTE 3 BOTTOM VIEW 1.07 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MiniGate is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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