Enhanced Mixed Frequency Mode PWM Controller: Fixed Frequency, Variable Frequency, Standby Mode

MC44603A
Enhanced Mixed Frequency
Mode GreenLinet PWM
Controller:
Fixed Frequency, Variable Frequency,
Standby Mode
The MC44603A is an enhanced high performance controller that is
specifically designed for off−line and dc−to−dc converter applications.
This device has the unique ability of automatically changing operating
modes if the converter output is overloaded, unloaded, or shorted,
offering the designer additional protection for increased system
reliability. The MC44603A has several distinguishing features when
compared to conventional SMPS controllers. These features consist of
a foldback facility for overload protection, a standby mode when the
converter output is slightly loaded, a demagnetization detection for
reduced switching stresses on transistor and diodes, and a high current
totem pole output ideally suited for driving a power MOSFET. It can
also be used for driving a bipolar transistor in low power converters
(< 150 W). It is optimized to operate in discontinuous mode but can
also operate in continuous mode. Its advanced design allows use in
current mode or voltage mode control applications.
Features
Operation up to 250 kHz Output Switching Frequency
Inherent Feed Forward Compensation
Latching PWM for Cycle−by−Cycle Current Limiting
Oscillator with Precise Frequency Control
MC44603AP
AWLYYWWG
16
PDIP−16
1
P SUFFIX
CASE 648
1
16
SOIC−16
DW SUFFIX
CASE 751G
A
WL
YY
WW
G
High Flexibility
Externally Programmable Reference Current
Secondary or Primary Sensing7
Synchronization Facility
High Current Totem Pole Output
Undervoltage Lockout with Hysteresis
MC44603ADW
AWLYYWWG
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
Safety/Protection Features
•
•
•
•
•
•
•
•
16
1
Current or Voltage Mode Controller
•
•
•
•
•
MARKING
DIAGRAMS
16
• This is a Pb−Free and Halide−Free Device
•
•
•
•
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Overvoltage Protection Against Open Current and Open Voltage Loop
Protection Against Short Circuit on Oscillator Pin
Fully Programmable Foldback
Soft−Start Feature
Accurate Maximum Duty Cycle Setting
Demagnetization (Zero Current Detection) Protection
Internally Trimmed Reference
Enhanced Output Drive
VCC
1
16 Rref
VC
2
15
Output
3
RFrequency
Standby
Voltage Feedback
14
Input
GND
4
13 Error Amp Output
Foldback Input
5
12 RPower Standby
Overvoltage
Protection (OVP)
6
11
Current Sense Input
7
10 CT
Demag Detection
8
9
Soft-Start/Dmax/
Voltage Mode
Sync Input
(Top View)
GreenLine Controller: Low Power Consumption in Standby Mode
• Low Startup and Operating Current
• Fully Programmable Standby Mode
• Controlled Frequency Reduction in Standby Mode
© Semiconductor Components Industries, LLC, 2011
April, 2011 − Rev. 5
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 23 of this data sheet.
1
Publication Order Number:
MC44603A/D
MC44603A
• Low dV/dT for Low EMI Radiations
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
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2
MC44603A
MAXIMUM RATINGS
Rating
Total Power Supply and Zener Current
Supply Voltage with Respect to Ground (Pin 4)
Symbol
Value
Unit
(ICC + IZ)
30
mA
VC
VCC
18
V
IO(Source)
−750
IO(Sink)
750
Output Current (Note 1)
mA
Source
Sink
Output Energy (Capacitive Load per Cycle)
W
5.0
J
RF Stby, CT, Soft−Start, Rref, RP Stby Inputs
Vin
−0.3 to 5.5
V
Foldback Input, Current Sense Input,
E/A Output, Voltage Feedback Input,
Overvoltage Protection, Synchronization Input
Vin
−0.3 to VCC + 0.3
V
Synchronization Input
High State Voltage
VIH
VCC + 0.3
V
Low State Reverse Current
VIL
−20
mA
Demagnetization Detection Input Current
mA
Source
Sink
Error Amplifier Output Sink Current
Idemag−ib (Source)
−4.0
Idemag−ib (Sink)
10
IE/A (Sink)
20
mA
PD
0.6
W
RJA
100
°C/W
Power Dissipation and Thermal Characteristics
P Suffix, Dual−In−Line, Case 648
Maximum Power Dissipation at TA = 85°C
Thermal Resistance, Junction−to−Air
DW Suffix, Surface Mount, Case 751G
Maximum Power Dissipation at TA = 85°C
PD
0.45
W
RJA
145
°C/W
Operating Junction Temperature
TJ
150
°C
Operating Ambient Temperature
TA
−25 to +85
°C
Thermal Resistance, Junction−to−Air
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. ESD data available upon request.
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3
MC44603A
ELECTRICAL CHARACTERISTICS (VCC and VC = 12 V, (Note 2), Rref = 10 k, CT = 820 pF, for typical values TA =
25°C, for min/max values TA = −25° to +85°C (Note 3), unless otherwise noted.)
Symbol
Characteristic
Min
Typ
Max
Unit
OUTPUT SECTION
V
Output Voltage (Note 4)
Low State (ISink = 100 mA)
Low State (ISink = 500 mA)
VOL
−
−
1.0
1.4
1.2
2.0
High State (ISource = 200 mA)
High State (ISource = 500 mA)
VOH
−
−
1.5
2.0
2.0
2.7
−
−
−
−
0.1
0.1
1.0
1.0
1.0
Output Voltage During Initialization Phase
VCC = 0 to 1.0 V, ISink = 10 A
VCC = 1.0 to 5.0 V, ISink = 100 A
VCC = 5.0 to 13 V, ISink = 1.0 mA
VOL
V
Output Voltage Rising Edge Slew−Rate (CL = 1.0 nF, TJ = 25°C)
dVo/dT
−
300
−
V/s
Output Voltage Falling Edge Slew−Rate (CL = 1.0 nF, TJ = 25°C)
dVo/dT
−
−300
−
V/s
VFB
2.42
2.5
2.58
V
Input Bias Current (VFB = 2.5 V)
IFB−ib
−2.0
−0.6
−
A
Open Loop Voltage Gain (VE/A out = 2.0 to 4.0 V)
AVOL
65
70
−
dB
ERROR AMPLIFIER SECTION
Voltage Feedback Input (VE/A out = 2.5 V)
Unity Gain Bandwidth
BW
MHz
TJ = 25°C
−
4.0
−
TJ = −25° to +85°C
−
−
5.5
VFBline−reg
−10
−
10
ISink
2.0
12
−
ISource
−2.0
−
−0.2
Voltage Feedback Input Line Regulation (VCC = 10 to 15 V)
Output Current
mV
mA
Sink (VE/A out = 1.5 V, VFB = 2.7 V)
TA = −25° to +85°C
Source (VE/A out = 5.0 V, VFB = 2.3 V)
TA = −25° to +85°C
Output Voltage Swing
V
High State (IE/A out (source) = 0.5 mA, VFB = 2.3 V)
VOH
5.5
6.5
7.5
Low State (IE/A out (sink) = 0.33 mA, VFB = 2.7 V)
VOL
−
1.0
1.1
Vref
2.4
2.5
2.6
Iref
−500
−
−100
A
Vref
−40
−
40
mV
REFERENCE SECTION
Reference Output Voltage (VCC = 10 to 15 V)
Reference Current Range (Iref = Vref/Rref, R = 5.0 k to 25 k)
Reference Voltage Over Iref Range
V
OSCILLATOR AND SYNCHRONIZATION SECTION
fOSC
Frequency
TA = 0° to +70°C
TA = −25° to +85°C
kHz
44.5
48
51.5
44
−
52
Frequency Change with Voltage (VCC = 10 to 15 V)
fOSC/V
−
0.05
−
%/V
Frequency Change with Temperature (TA = −25° to +85°C)
fOSC/T
−
0.05
−
%/°C
2. Adjust VCC above the startup threshold before setting to 12 V.
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
4. VC must be greater than 5.0 V.
5. Standby is disabled for VR P Stby < 25 mV typical.
6. If not used, Synchronization input must be connected to Ground.
7. Synchronization Pulse Width must be shorter than tOSC = 1/fOSC.
8. This function can be inhibited by connecting Pin 8 to GND. This allows a continuous current mode operation.
9. This function can be inhibited by connecting Pin 5 to VCC.
10. The MC44603A can be shut down by connecting the Soft−Start pin (Pin 11) to Ground.
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MC44603A
ELECTRICAL CHARACTERISTICS (continued) (VCC and VC = 12 V, (Note 2), Rref = 10 k, CT = 820 pF, for typical values TA =
25°C, for min/max values TA = −25° to +85°C (Note 3), unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
Oscillator Voltage Swing (Peak−to−Peak)
VOSC(pp)
1.65
1.8
1.95
V
Ratio Charge Current/Reference Current
Icharge/Iref
OSCILLATOR AND SYNCHRONIZATION SECTION
−
TA = 0° to +70°C (VCT = 2.0 V)
0.375
0.4
0.425
TA = −25° to +85°C
0.37
−
0.43
78
80
82
Fixed Maximum Duty Cycle = Idischarge/(Idischarge + Icharge)
D
Ratio Standby Discharge Current versus IR F Stby (Note 5)
Idisch−Stby/
TA = 0° to +70°C
IR F Stby
%
−
0.46
0.53
0.6
0.43
−
0.63
VR F Stby
2.4
2.5
2.6
V
FStby
18
21
24
kHz
IR F Stby
−200
−
−50
A
VinthH
VinthL
3.2
0.45
3.7
0.7
4.3
0.9
V
ISync−in
−5.0
−
0
A
tSync
−
−
0.5
s
Startup Threshold
Vstup−th
13.6
14.5
15.4
V
Output Disable Voltage After Threshold Turn−On (UVLO 1)
Vdisable1
TA = −25° to +85°C (Note 8)
VR F Stby (IR F Stby = 100 A)
Frequency in Standby Mode (RF Stby (Pin 15) = 25 k)
Current Range
Synchronization Input Threshold Voltage (Note 6)
Synchronization Input Current
Minimum Synchronization Pulse Width (Note 7)
UNDERVOLTAGE LOCKOUT SECTION
TA = 0° to +70°C
V
8.6
TA = −25° to +85°C
Reference Disable Voltage After Threshold Turn−On (UVLO 2)
9.0
9.4
8.3
−
9.6
Vdisable2
7.0
7.5
8.0
V
Vdemag−th
50
65
80
mV
−
−
0.25
−
s
DEMAGNETIZATION DETECTION SECTION (Note 8)
Demagnetization Detect Input
Demagnetization Comparator Threshold (VPin 9 Decreasing)
Propagation Delay (Input to Output, Low to High)
Input Bias Current (Vdemag = 65 mV)
Idemag−lb
−0.5
−
−
A
Negative Clamp Level (Idemag = −2.0 mA)
CL(neg)
−
−0.38
−
V
Positive Clamp Level (Idemag = 2.0 mA)
CL(pos)
−
0.72
−
V
SOFT−START SECTION (Note 10)
Iss(ch)/Iref
Ratio Charge Current/Iref
TA = 0° to +70°C
−
0.37
TA = −25° to +85°C
Discharge Current (Vsoft−start = 1.0 V)
Clamp Level
0.4
0.43
0.36
−
0.44
Idischarge
1.5
5.0
−
mA
Vss(CL)
2.2
2.4
2.6
V
2. Adjust VCC above the startup threshold before setting to 12 V.
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
4. VC must be greater than 5.0 V.
5. Standby is disabled for VR P Stby < 25 mV typical.
6. If not used, Synchronization input must be connected to Ground.
7. Synchronization Pulse Width must be shorter than tOSC = 1/fOSC.
8. This function can be inhibited by connecting Pin 8 to GND. This allows a continuous current mode operation.
9. This function can be inhibited by connecting Pin 5 to VCC.
10. The MC44603A can be shut down by connecting the Soft−Start pin (Pin 11) to Ground.
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5
MC44603A
ELECTRICAL CHARACTERISTICS (continued) (VCC and VC = 12 V, (Note 2), Rref = 10 k, CT = 820 pF, for typical values TA =
25°C, for min/max values TA = −25° to +85°C (Note 3), unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
Dsoft−start 12k
Dsoft−start
36
−
42
−
49
0
%
VOVP−th
2.42
2.5
2.58
V
1.0
−
3.0
s
SOFT−START SECTION (Note 10)
Duty Cycle (Rsoft−start = 12 k)
Duty Cycle (Vsoft−start (Pin 11) = 0.1 V)
OVERVOLTAGE SECTION
Protection Threshold Level on VOVP
Propagation Delay (VOVP > 2.58 V to Vout Low)
Protection Level on VCC
VCC prot
TA = 0° to +70°C
TA = −25° to +85°C
Input Resistance
V
16.1
17
17.9
15.9
−
18.1
−
k
TA = 0° to +70°C
1.5
2.0
3.0
TA = −25° to +85°C
1.4
−
3.4
VCS−th
0.86
0.89
0.9
V
Ifoldback−lb
−6.0
−2.0
−
A
FOLDBACK SECTION (Note 9)
Current Sense Voltage Threshold (Vfoldback (Pin 5) = 0.9 V)
Foldback Input Bias Current (Vfoldback (Pin 5) = 0 V)
STANDBY SECTION
Ratio IR P Stby/Iref
IR P Stby/Iref
−
TA = 0° to +70°C
0.37
0.4
0.43
TA = −25° to +85°C
0.36
−
0.44
Ratio Hysteresis (Vh Required to Return to Normal Operation from
Standby Operation)
Vh/VR P Stby
−
TA = 0° to +70°C
1.42
1.5
1.58
TA = −25° to +85°C
1.4
−
1.6
VCS−Stby
0.28
0.31
0.34
V
Maximum Current Sense Input Threshold
(Vfeedback (Pin 14) = 2.3 V and Vfoldback (Pin 6) = 1.2 V)
VCS−th
0.96
1.0
1.04
V
Input Bias Current
ICS−ib
−10
−2.0
−
A
−
−
120
200
ns
Current Sense Voltage Threshold (VR P Stby (Pin 12) = 1.0 V)
CURRENT SENSE SECTION
Propagation Delay (Current Sense Input to Output at VTH of
MOS transistor = 3.0 V)
TOTAL DEVICE
ICC
Power Supply Current
mA
Startup (VCC = 13 V with VCC Increasing)
−
0.3
0.45
Operating TA = −25° to +85°C (Note 2)
13
17
20
VZ
18.5
−
−
V
−
−
155
−
°C
Power Supply Zener Voltage (ICC = 25 mA)
Thermal Shutdown
2. Adjust VCC above the startup threshold before setting to 12 V.
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
4. VC must be greater than 5.0 V.
5. Standby is disabled for VR P Stby < 25 mV typical.
6. If not used, Synchronization input must be connected to Ground.
7. Synchronization Pulse Width must be shorter than tOSC = 1/fOSC.
8. This function can be inhibited by connecting Pin 8 to GND. This allows a continuous current mode operation.
9. This function can be inhibited by connecting Pin 5 to VCC.
10. The MC44603A can be shut down by connecting the Soft−Start pin (Pin 11) to Ground.
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6
MC44603A
RF Stby
Rref
RF Stby 15 16 Vref
Negative
Active
Clamp
Demag
Detect
8
R
Q
S
UVLO2
VCC
+
65 mV
Sync
Input
9
Vref
Vref
VOSC prot
Vaux
VCC
Reference
Block
Synchro
+
0.7 V
0.4 Iref
+
VDemag Out
+
3.7 V
18.0 V
1
14.5 V/7.5 V
Iref
To Power
Transformer
IF Stby
1.0 V
R
VC
Q
1.6 V
CT
S
R
2
Q
10
+
CT
S
VOSC
3.6 V
Output
S
3
Q
R
0.4 Iref
IDischarge
Vref Vref
Vref
0.6 Iref
0.4 Iref
Vref
0.25
IF Stby
0.8 Iref
2.0 s
Delay
Thermal
Shutdown
Vref
0.4 Iref
11.6 k
5.0 s
Delay
OVP
2.0 k
VCC
IDischarge/2
1.0 mA
+
Current Mirror X2
2R
2.5 V
VCC
Vref
0.2 Iref
12
+
4
GND
Vref
RPwr Stby
Feedback
14
VOVP
Out
Vref
5
Foldback
Input
ROVP
+ 2.5 V
1.6 V
Error Amplifier
Current
Sense Input
Compensation
13
6
7
R
1.0 V
UVLO1
2.4 V
5.0 mA
11 SS/Dmax/VM
= Sink only
= Positive True Logic
RSS
CSS
This device contains 243 active transistors.
Figure 1. Representative Block Diagram
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7
VCC
+
9.0 V
MC44603A
10000
CT = 100 pF
VCC = 16 V
TA = 25°C
CT = 500 pF
VCC = 16 V
TA = 25°C
Rref = 10 k
C T, TIMING CAPACITOR (pF)
Rref , TIMING RESISTANCE (k Ω )
100
CT = 1000 pF
10
RF Stby = 2.0 k
RF Stby = 5.0 k
1000
RF Stby = 27 k
RF Stby = 100 k
CT = 2200 pF
3.0
10 k
100 k
300
10 k
1.0 M
Figure 2. Timing Resistor versus
Oscillator Frequency
Figure 3. Standby Mode Timing Capacitor
versus Oscillator Frequency
Icharge/Iref = RATIO CHARGE CURRENT/
REFERENCE CURRENT
50
49
48
47
46
VCC = 12 V
Rref = 10 k
CT = 820 pF
45
-25
0
25
50
100
0.43
0.42
0.41
0.40
0.39
VCC = 12 V
Rref = 10 k
CT = 820 pF
0.38
0.37
-50
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 4. Oscillator Frequency
versus Temperature
Figure 5. Ratio Charge Current/Reference
Current versus Temperature
70
VCC = 12 V
CL = 2200 pF
TA = 25°C
400
Current
60
50
0
40
-200
30
-400
20
Voltage
-600
10
-800
0
-10
-1000
60
50
VCC = 12 V
CL = 2200 pF
TA = 25°C
20
10
Current
40
0
30
-1
20
-2
10
VO
-3
Voltage
0
-10
1.0 s/Div
-4
ICC
-5
1.0 s/Div
Figure 6. Output Waveform
Figure 7. Output Cross Conduction
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8
100
30
70
VO , OUTPUT DRIVE VOLTAGE (V)
600
I O , OUTPUT CURRENT (mA)
75
VO , OUTPUT DRIVE VOLTAGE (V)
f OSC, OSCILLATOR FREQUENCY (kHz)
51
200
1.0 M
fOSC, Oscillator Frequency (Hz)
52
44
-50
100 k
fOSC, Oscillator Frequency (Hz)
VOH , SOURCE OUTPUT SATURATION VOLTAGE (V)
MC44603A
475
450
425
400
375
325
-25
0
25
50
75
100
VCC = 12 V
Rref = 10 k
CT = 820 pF
TA = 25°C
1.0
0
100
200
300
400
500
Figure 8. Oscillator Discharge Current
versus Temperature
Figure 9. Source Output Saturation Voltage
versus Load Current
80
Sink Saturation
(Load to VCC)
TA = 25°C
VCC = 12 V
80 s Pulsed Load
120 Hz Rate
0.4
40
200
300
400
50
0
500
100
101
10 2
-40
104
103
f, FREQUENCY (kHz)
Figure 10. Sink Output Saturation Voltage
versus Sink Current
Figure 11. Error Amplifier Gain and Phase
versus Frequency
Vdemag-th, DEMAG COMPARATOR THRESHOLD (mV)
Isink, SINK OUTPUT CURRENT (mA)
VFB, VOLTAGE FEEDBACK INPUT (V)
2.60
VCC = 12 V
G = 10
VO = 2.0 to 4.0 V
RL = 100 k
2.55
2.50
2.45
-25
0
25
50
75
140
20
-20
100
VCC = 12 V
G = 10
Vin = 30 mV
VO = 2.0 to 4.0 V
RL = 100 k
TA = 25°C
60
0.8
2.40
-50
1.5
Isource, OUTPUT SOURCE CURRENT (mA)
1.2
0
0
2.0
TA, AMBIENT TEMPERATURE (°C)
2.0
1.6
2.5
PHASE (DEGREES)
300
-50
VOL , SINK OUTPUT SATURATION VOLTAGE (V)
VCC = 12 V
Rref = 10 k
CT = 820 pF
350
GAIN (dB)
Idisch , DISCHARGE CURRENT (μA)
500
100
80
VCC = 12 V
75
70
65
60
55
50
-50
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 12. Voltage Feedback Input
versus Temperature
Figure 13. Demag Comparator Threshold
versus Temperature
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9
100
A VCS, CURRENT SENSE GAIN
3.1
3.0
VCC = 12 V
Rref = 10 k
CT = 820 pF
2.9
-25
0
25
50
75
100
TA, AMBIENT TEMPERATURE (°C)
80
L
4.0
2.0 oz
Copper
3.0
40
2.0
PD(max) for TA = 70°C
20
1.0
0
50
0
0
10
20
30
L, LENGTH OF COPPER (mm)
40
Figure 15. Thermal Resistance and Maximum
Power Dissipation versus P.C.B. Copper Length
140
0.35
0.30
STARTUP CURRENT (mA)
PROPAGATION DELAY (ns)
ÉÉ
ÉÉÉ
ÉÉÉÉÉ
L
3.0 mm
Graphs represent symmetrical layout
RJA
60
Figure 14. Current Sense Gain
versus Temperature
120
100
VCC = 12 V
Rref = 10 k
CT = 820 pF
80
-50
0.25
0.20
0.15
0.10
Rref = 10 k
CT = 820 pF
0.05
0
-25
0
25
50
75
0
100
2.0
4.0
6.0
8.0
10
12
TA, AMBIENT TEMPERATURE (°C)
VCC, SUPPLY VOLTAGE (V)
Figure 16. Propagation Delay Current Sense
Input to Output versus Temperature
Figure 17. Startup Current versus VCC
14
21.5
16
14
VZ, ZENER VOLTAGE (V)
ICC , SUPPLY CURRENT (mA)
5.0
Printed circuit board heatsink example
P D, MAXIMUM POWER DISSIPATION (W)
100
3.2
2.8
-50
R θ JA , THERMAL RESISTANCE JUNCTION-TO-AIR (° C/W)
MC44603A
12
10
8.0
6.0
4.0
2.0
0
2.0
TA = 25°C
Rref = 10 k
CT = 820 pF
VFB = 0 V
VCS = 0 V
4.0
6.0
8.0
10
12
14
21.0
20.5
20.0
19.5
19.0
-50
16
ICC = 25 mA
-25
0
25
50
75
VCC, SUPPLY VOLTAGE (V)
TA, AMBIENT TEMPERATURE (°C)
Figure 18. Supply Current versus
Supply Voltage
Figure 19. Power Supply Zener Voltage
versus Temperature
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10
100
9.50
15.0
9.25
Vdisable1 , UVLO1 (V)
15.5
14.5
VCC Increasing
14.0
13.5
-50
-25
0
25
50
75
Vdisable2 , UVLO2 (V)
0
25
50
75
Figure 21. Disable Voltage After Threshold
Turn−On (UVLO1) versus Temperature
7.4
VCC Decreasing
7.2
7.0
-25
0
25
50
75
100
100
2.60
2.55
2.50
2.45
VCC = 12 V
2.40
2.35
2.30
-50
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 22. Disable Voltage After Threshold
Turn−On (UVLO2) versus Temperature
Figure 23. Protection Threshold Level on
VOVP versus Temperature
100
3.0
18
Rref = 10 k
CT = 820 pF
Pin 6 Open
PROPAGATION DELAY (μs)
VCC prot , PROTECTION LEVEL (V)
-25
Figure 20. Startup Threshold Voltage
versus Temperature
7.6
17
16.5
16
-50
8.55
TA, AMBIENT TEMPERATURE (°C)
7.8
17.5
VCC Decreasing
TA, AMBIENT TEMPERATURE (°C)
8.0
6.8
-50
9.00
8.50
-50
100
VOVP-th, PROTECTION THRESHOLD LEVEL (V)
Vstup-th , STARTUP THRESHOLD VOLTAGE (V)
MC44603A
-25
0
25
50
75
2.5
2.0
1.0
-50
100
VCC = 12 V
Rref = 10 k
CT = 820 pF
1.5
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 24. Protection Level on VCC
versus Temperature
Figure 25. Propagation Delay (VOVP > 2.58 V
to Vout Low) versus Temperature
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11
100
270
VCS-stby , CURRENT SENSE THRESHOLD
STANDBY MODE (V)
I R P Stby , STANDBY REFERENCE CURRENT (μA)
MC44603A
265
260
255
250
VR P Stdby (Pin 12)
Voltage Increasing
245
240
235
230
-50
-25
0
25
50
75
100
0.33
0.32
VCC = 12 V
Rref = 10 k
CT = 820 pF
Pin 12 Clamped
at 1.0 V
0.31
0.30
-50
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 26. Standby Reference Current
versus Temperature
Figure 27. Current Sense Voltage Threshold
Standby Mode versus Temperature
100
PIN FUNCTION DESCRIPTION
Pin
Name
1
VCC
This pin is the positive supply of the IC. The operating voltage range after startup is 9.0 to 14.5 V.
Description
2
VC
The output high state (VOH) is set by the voltage applied to this pin. With a separate connection to the power
source, it can reduce the effects of switching noise on the control circuitry.
3
Output
4
GND
The ground pin is a single return, typically connected back to the power source; it is used as control and
power ground.
5
Foldback Input
The foldback function provides overload protection. Feeding the foldback input with a portion of the VCC
voltage (1.0 V max) establishes on the system control loop a foldback characteristic allowing a smoother
startup and sharper overload protection. Above 1.0 V the foldback input is inactive.
6
Overvoltage
Protection
7
Current Sense
Input
A voltage proportional to the current flowing into the power switch is connected to this input. The PWM latch
uses this information to terminate the conduction of the output buffer when working in a current mode of
operation. A maximum level of 1.0 V allows either current or voltage mode operation.
8
Demagnetization
Detection
A voltage delivered by an auxiliary transformer winding provides to the demagnetization pin an indication of
the magnetization state of the flyback transformer. A zero voltage detection corresponds to complete core
saturation. The demagnetization detection ensures a discontinuous mode of operation. This function can be
inhibited by connecting Pin 8 to GND.
9
Synchronization
Input
The synchronization input pin can be activated with either a negative pulse going from a level between 0.7 V
and 3.7 V to GND or a positive pulse going from a level between 0.7 V and 3.7 V up to a level higher than
3.7 V. The oscillator runs free when Pin 9 is connected to GND.
10
CT
11
Soft−Start/Dmax/
Voltage−Mode
12
RP Standby
13
E/A Out
14
Voltage
Feedback
This is the inverting input of the Error Amplifier. It can be connected to the switching power supply output
through an optical (or other) feedback loop.
15
RF Standby
The reduced frequency or standby frequency programming is made by the RF Standby resistance choice.
16
Rref
Peak currents up to 750 mA can be sourced or sunk, suitable for driving either MOSFET or Bipolar
transistors. This output pin must be shunted by a Schottky diode, 1N5819 or equivalent.
When the overvoltage protection pin receives a voltage greater than 17 V, the device is disabled and
requires a complete restart sequence. The overvoltage level is programmable.
The normal mode oscillator frequency is programmed by the capacitor CT choice together with the Rref
resistance value. CT, connected between Pin 10 and GND, generates the oscillator sawtooth.
A capacitor, resistor or a voltage source connected to this pin limits the switching duty−cycle. This pin can
be used as a voltage mode control input. By connecting Pin 11 to Ground, the MC44603A can be shutdown.
A voltage level applied to the RP Standby pin determines the output power level at which the oscillator will
turn into the reduced frequency mode of operation (i.e. standby mode). An internal hysteresis comparator
allows to return in the normal mode at a higher output power level.
The error amplifier output is made available for loop compensation.
Rref sets the internal reference current. The internal reference current ranges from 100 A to 500 A. This
requires that 5.0 k ≤ Rref ≤ 25 k.
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MC44603A
No-Take Over
Startup
VCC
Loop Failure
Restart
VCC prot
Vstup-th
>2.0 s
Normal Mode
Vdisable1
Vdisable2
Vref
UVLO1
VPin 11
(Soft-Start)
VOVP Out
ÏÏ ÏÏÏÏÏÏÏÏ
ÏÏ ÏÏÏÏÏÏÏÏ
ÏÏ ÏÏÏÏÏÏÏÏ
Output
ICC
17 mA
ÏÏÏ
ÏÏÏ
ÏÏÏ
0.3 mA
Figure 28. Starting Behavior and Overvoltage Management
VDemag In
Output
(Pin 3)
VDemag Out
VDemag In
Demagnetization
Management
VDemag Out
Oscillator
Buffer
Figure 29. Demagnetization
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13
Output
MC44603A
VCC
Vstup-th
Vdisable1
Vdisable2
Vref
UVLO1
VPin 11
(Soft-Start)
ÏÏÏ
ÏÏÏ
Output
(Pin 3)
ICC
17 mA
0.3 mA
Figure 30. Switching Off Behavior
3.6 V
VCT
1.6 V
1.0 V
VStby
VDemag Out
VOSC
VOSC prot
VDemag Out
VOSC prot
Synchronization
Input
Oscillator
CT
VStby
Figure 31. Oscillator
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14
VOSC
MC44603A
Vref
VCSS + 1.6 V
Internal Clamp
Soft-Start
External Clamp
VCT 3.6 V
VCT low 1.6 V
VOSC
Output
(Pin 3)
Figure 32. Soft−Start & Dmax
OPERATING DESCRIPTION
Error Amplifier
+
A fully compensated Error Amplifier with access to the
inverting input and output is provided. It features a typical
DC voltage gain of 70 dB. The noninverting input is
internally biased at 2.5 V and is not pinned out. The
converter output voltage is typically divided down and
monitored by the inverting input. The maximum input bias
current with the inverting input at 2.5 V is −2.0 A. This can
cause an output voltage error that is equal to the product of
the input bias current and the equivalent input divider source
resistance.
The Error Amp output (Pin 13) is provided for external
loop compensation. The output voltage is offset by two
diode drops (≈ 1.4 V) and divided by three before it connects
to the inverting input of the Current Sense Comparator. This
guarantees that no drive pulses appear at the Output (Pin 3)
when Pin 13 is at its lowest state (VOL). The Error Amp
minimum feedback resistance is limited by the amplifier’s
minimum source current (0.2 mA) and the required output
voltage (VOH) to reach the current sense comparator’s 1.0 V
clamp level:
Rf(min) [
1.0 mA
Compensation
Error
Amplifier
13
RFB
Rf
Cf
14 2.5 V
R
Voltage
Feedback
Input
Current Sense
Comparator
1.0 V
5
Foldback
Input
R1
R2
2R
GND
4
From Power Supply Output
Figure 33. Error Amplifier Compensation
Current Sense Comparator and PWM Latch
The MC44603A can operate as a current mode controller
or as a voltage mode controller. In current mode operation,
the MC44603A uses the current sense comparator. The
output switch conduction is initiated by the oscillator and
terminated when the peak inductor current reaches the
threshold level established by the Error Amplifier output
3.0 (1.0 V) ) 1.4 V
+ 22 k
0.2 mA
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15
MC44603A
(Pin 13). Thus, the error signal controls the peak inductor
current on a cycle−by−cycle basis. The Current Sense
Comparator PWM Latch ensures that only a single pulse
appears at the Source Output during the appropriate
oscillator cycle.
The inductor current is converted to a voltage by inserting
the ground referenced sense resistor RS in series with the
power switch Q1.
This voltage is monitored by the Current Sense Input
(Pin 7) and compared to a level derived from the Error Amp
output. The peak inductor current under normal operating
conditions is controlled by the voltage at Pin 13 where:
Ipk [
the discharge current source has to be higher than the
charge current to be able to decrease the CT voltage (refer
to Figure 36).
This condition is performed, its value being (2.0 Iref) in
normal working and (0.4 Iref + 0.5 IF Stby in standby mode).
Vref
0.4 Iref
CVOS prot
VOSC
COSC Low
V(Pin 13) – 1.4 V
1.6 V
3 RS
COSC High
10
The Current Sense Comparator threshold is internally
clamped to 1.0 V. Therefore, the maximum peak switch
current is:
Ipk(max) [
VOSC prot
1.0 V
CT
CT < 1.6 V
Discharge
R Q
Disch
S
R Q
LOSC
S
Synchro
3.6 V
VDemag
Out
COSC Regul
1.0 V
RS
0
1
1
0
IRegul
Vin
IDischarge
VC
UVLO
Figure 35. Oscillator
14
VOSC prot
R2
VDemag Out
Thermal
Protection
Q1
Vref
3
S
R Q
R
PWM
Latch
Current Sense
Comparator
D
1N5819
ICharge
0.4 Iref
Current
Substrate Sense
7
R3
1.6 V
10
R
C
COSC Regul
0
RS
CT
1
0: Discharge Phase
1: Charge Phase
IDischarge
Figure 34. Output Totem Pole
IRegul
Series gate resistor, R2, will dampen any high frequency
oscillations caused by the MOSFET input capacitance and
any series wiring inductance in the gate−source circuit.
Diode D is required if the negative current into the output
drive pin exceeds 15 mA.
Figure 36. Simplified Block Oscillator
Two comparators are used to generate the sawtooth. They
compare the CT voltage to the oscillator valley (1.6 V) and
peak reference (3.6 V) values. A latch (Ldisch) memorizes
the oscillator state.
In addition to the charge and discharge cycles, a third state
can exist. This phase can be produced when, at the end of the
discharge phase, the oscillator has to wait for a
synchronization or demagnetization pulse before restarting.
During this delay, the CT voltage must remain equal to the
oscillator valley value (]1.6 V). So, a third regulated
current source IRegul controlled by COSC Regul, is connected
to CT in order to perfectly compensate the (0.4 Iref) current
source that permanently supplies CT.
The maximum duty cycle is 80%. Indeed, the on−time is
allowed only during the oscillator capacitor charge.
Oscillator
The oscillator is a very accurate sawtooth generator that
can work either in free mode or in synchronization mode. In
this second mode, the oscillator stops in the low state and
waits for a demagnetization or a synchronization pulse to
start a new charging cycle.
• The Sawtooth Generation:
In the steady state, the oscillator voltage varies between
about 1.6 V and 3.6 V.
The sawtooth is obtained by charging and discharging an
external capacitor CT (Pin 10), using two distinct current
sources = Icharge and Idischarge. In fact, CT is permanently
connected to the charging current source (0.4 Iref) and so,
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16
MC44603A
That is why, the MC44603A demagnetization detection
consists of a comparator that can compare the auxiliary
winding voltage to a reference that is typically equal to
65 mV.
Consequently:
Tcharge = CT x V/Icharge
Tdischarge = CT x V/Idischarge
where:
Tcharge is the oscillator charge time
V is the oscillator peak−to−peak value
Icharge is the oscillator charge current
and
Tdischarge is the oscillator discharge time
Idischarge is the oscillator discharge current
0.75 V
Zero Current
Detection
VPin 8
So, as fS = 1 /(Tcharge + Tdischarge) when the Regul
arrangement is not activated, the operating frequency can be
obtained from the graph in Figure 2.
NOTE: The output is disabled by the signal VOSC prot when
VCT is lower than 1.0 V (refer to Figure 31).
65 mV
-0.33 V
On-Time
Off-Time
Dead-Time
Synchronization and Demagnetization Blocks
To enable the output, the LOSC latch complementary
output must be low. Reset is activated by the Ldisch output
during the discharge phase. To restart, the LOSC has to be set
(refer to Figure 35). To perform this, the demagnetization
signal and the synchronization must be low.
• Synchronization:
The synchronization block consists of two comparators
that compare the synchronization signal (external) to 0.7 and
3.7 V (typical values). The comparators’ outputs are
connected to the input of an AND gate so that the final output
of the block should be:
− high when 0.7 < SYNC < 3.7 V
− low in the other cases.
As a low level is necessary to enable the output,
synchronized low level pulses have to be generated on the
output of the synchronization block. If synchronization is
not required, the Pin 9 must be connected to the ground.
Figure 38. Demagnetization Detection
A diode D has been incorporated to clamp the positive
applied voltages while an active clamping system limits the
negative voltages to typically −0.33 V. This negative clamp
level is sufficient to avoid the substrate diode switching on.
In addition to the comparator, a latch system has been
incorporated in order to keep the demagnetization block
output level low as soon as a voltage lower than 65 mV is
detected and as long as a new restart is produced (high level
on the output) (refer to Figure 39). This process prevents
ringing on the signal at Pin 8 from disrupting the
demagnetization detection. This results in a very accurate
demagnetization detection.
The demagnetization block output is also directly
connected to the output, disabling it during the
demagnetization phase (refer to Figure 34).
NOTE: The demagnetization detection can be inhibited by
connecting Pin 8 to the ground.
3.7 V
Oscillator
Sync
Oscillator
9
Output
Buffer
Output Buffer
0.7 V
R Q
Demag
S
VCC
Figure 37. Synchronization
Negative Active
Clamping System
VDemag Out
• Demagnetization:
8
C Dem
In flyback applications, a good means to detect magnetic
saturation of the transformer core, or demagnetization,
consists in using the auxiliary winding voltage. This voltage
is:
65 mV
D
Figure 39. Demagnetization Block
− negative during the on−time,
− positive during the off−time,
− equal to zero for the dead−time with generally some
− ringing (refer to Figure 38).
Standby
• Power Losses in a Classical Flyback Structure
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17
MC44603A
RICL
AC Line
Also,
Clamping
Network
Vin
+
V
Ipk + CS
RS
+
where RS is the resistor used to measure the power switch
current.
Thus, the input power is proportional to VCS2 (VCS being
the internal current sense comparator input).
That is why the standby detection is performed by creating
a VCS threshold. An internal current source (0.4 x Iref) sets
the threshold level by connecting a resistor to Pin 12.
As depicted in Figure 41, the standby comparator
noninverting input voltage is typically equal to (3.0 x VCS +
VF) while the inverter input value is (VR P Stby + VF).
Rstartup
VCC
MC44603A
RS
Snubber
Figure 40. Power Losses in a Classical
Flyback Structure
Vref Vref
In a classical flyback (as depicted in Figure 40), the
standby losses mainly consist of the energy waste due to:
− the startup resistor Rstartup
− the consumption of the IC and the power
− switch control
− the inrush current limitation resistor RICL
− the switching losses in the power switch
− the snubber and clamping network
0.6 Iref
0.4 Iref
→ Pstartup
RP Stby
Vref Vref
0
0.25
IF Stby
CStby
1
13
0.2 Iref
0
IDischarge
IDischarge/2
ERAmpOut
2R
Pstartup is nearly constant and is equal to:
C. S. Comparator
Current Mirror X2
1R
ǒ(Vin–VCC)2ńRstartupǓ
Vref
1
12
→ Pcontrol
→ PICL
→ PSW
→ PSN−CLN
0.8 Iref
Oscillator
Discharge
Current
Figure 41. Standby
PICL only depends on the current drawn from the mains.
Losses can be considered constant. This waste of energy
decreases when the standby losses are reduced.
Pcontrol increases when the oscillator frequency is
increased (each switching requires some energy to turn on
the power switch).
PSW and PSN−CLN are proportional to the switching
frequency.
Consequently, standby losses can be minimized by
decreasing the switching frequency as much as possible.
The MC44603A was designed to operate at a standby
frequency lower than the normal working one.
• Standby Power Calculations with MC44603A
During a switching period, the energy drawn by the
transformer during the on−time to be transferred to the
output during the off−time, is equal to:
The VCS threshold level is typically equal to
[(VR P Stby)/3] and if the corresponding power threshold is
labelled PthL:
PthL + 0.5 x L x
2
ǒVR3.0P RStby
Ǔ
x fS
S
And as:
VR P Stby + RP Stby x 0.4 x Iref
+ RR P Stby x 0.4 x
RP Stby +
10.6 x RS x Rref
Vref
x
Vref
Rref
ǸLPxthLfS
Thus, when the power drawn by the converter decreases,
VCS decreases and when VCS becomes lower than [VCS−th
x (VR P Stby)/3], the standby mode is activated. This results in
an oscillator discharge current reduction in order to increase
the oscillator period and to diminish the switching
frequency. As it is represented in Figure 41, the (0.8 x Iref)
current source is disconnected and is replaced by a lower
value one (0.25 x IF Stby).
Where: IF Stby = Vref/RF Stby
E + 1 x L x Ipk2
2
where:
− L is the transformer primary inductor,
− lpk is the inductor peak current.
Input power is labelled Pin:
Pin + 0.5 x L x Ipk2 x fS
where fS is the normal working switching frequency.
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MC44603A
In order to prevent undesired mode switching when power
is close to the threshold value, a hysteresis that is
proportional to VR P Stby is incorporated creating a second
VCS threshold level that is equal to [2.5 x (VR P Stby)/3].
When the standby comparator output is high, a second
current source (0.6 x Iref) is connected to Pin 12.
Finally, the standby mode function can be shown
graphically in Figure 42.
VCT
(Pin 10)
Dmax
Figure 44. Maximum Duty Cycle Control
Using the internal current source (0.4 Iref), the Pin 11
voltage can easily be set by connecting a resistor to this pin.
If a capacitor is connected to Pin 11, the voltage increases
from 0 to its maximum value progressively (refer to
Figure 45), thereby, implementing a soft−start. The
soft−start capacitor is discharged internally when the VCC
(Pin 1) voltage drops below 9.0 V.
Pin
fS
Normal
Working
Pin 11
Voltage
Pin 11
fStby
R Connected to Pin 11
I = 0.4 Iref
VZ
RI
PthH
C
C // R
VZ
RI
= RC
Standby
PthL
[(VR P Stby)/3]
VCS
2.5 x [(VR P Stby)/3]
Figure 45. Different Possible Uses of Pin 11
1
Figure 42. Dynamic Mode Change
If no external component is connected to Pin 11, an
internal zener diode clamps the Pin 11 voltage to a value VZ
that is higher than the oscillator peak value, disabling
soft−start and maximum duty cycle limitation.
This curve shows that there are two power threshold
levels:
− the low one:
PthL fixed by VR P Stby
− the high one:
Foldback
As depicted in Figures 33 and 49, the foldback input
(Pin 5) can be used to reduce the maximum VCS value,
providing foldback protection. The foldback arrangement is
a programmable peak current limitation.
If the output load is increased, the required converter peak
current becomes higher and VCS increases until it reaches its
maximum value (normally, VCS max = 1.0 V).
Then, if the output load keeps on increasing, the system is
unable to supply enough energy to maintain the output
voltages in regulation. Consequently, the decreasing output
can be applied to Pin 5, in order to limit the maximum peak
current. In this way, the well known foldback characteristic
can be obtained (refer to Figure 46).
fStby
PthH + (2.5)2 x PthL x
fS
PthH + 6.25 x PthL x
fStby
fS
Maximum Duty Cycle and Soft−Start Control
Maximum duty cycle can be limited to values less than
80% by utilizing the Dmax and soft−start control. As
depicted in Figure 43, the Pin 11 voltage is compared to the
oscillator sawtooth.
Vref
Output
Control
0.4 Iref
11
DZ
Soft-Start
Capacitor
2.4 V CDmax
Dmax
Output
Drive
VOSC
Oscillator
Figure 43. Dmax and Soft−Start
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19
MC44603A
Vref
Ipk max
Vout
VCC
VO
Nominal
Out
Delay
T
New Startup
Sequence Initiated
0
VOVP
VCC
Vdisable2
External
Resistor
Iout
Overload
5.0 s
In
2.5 V
11.6 k Enable
2.0 k
COVLO
2.5 V
(Vref)
Figure 46. Foldback Characteristic
In
τ
Overvoltage Protection
The overvoltage arrangement consists of a comparator
that compares the Pin 6 voltage to Vref (2.5 V) (refer to
Figure 47).
If no external component is connected to Pin 6, the
comparator noninverting input voltage is nearly equal to:
ǒ11.6 k2.0)k2.0 k Ǔ x VCC
The comparator output is high when:
2.0 k
x VCC w 2.5 V
11.6 k ) 2.0 k
Ǔ
à VCC w 17 V
A delay latch (2.0 s) is incorporated in order to sense
overvoltages that last at least 2.0 s.
If this condition is achieved, VOVP out, the delay latch
output, becomes high. As this level is brought back to the
input through an OR gate, VOVP out remains high (disabling
the IC output) until Vref is disabled.
Consequently, when an overvoltage longer than 2.0 s is
detected, the output is disabled until VCC is removed and
then re−applied.
The VCC is connected after Vref has reached steady state
in order to limit the circuit startup consumption.
The overvoltage section is enabled 5.0 s after the
regulator has started to allow the reference Vref to stabilize.
By connecting an external resistor to Pin 6, the threshold
VCC level can be changed.
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20
VOVP out
Out
Delay
2.0 s
(If VOVP out = 1.0,
the Output is Disabled)
Figure 47. Overvoltage Protection
NOTE: Foldback is disabled by connecting Pin 5 to VCC.
ǒ
6
τ
MC44603A
Undervoltage Lockout Section
RF Stby
VCC
Rref
Pin 15
Vref enable
This block particularly, produces Vref (Pin 16 voltage) and
Iref that is determined by the resistor Rref connected between
Pin 16 and the ground:
V
Iref + ref where Vref + 2.5 V (typically)
Rref
Pin 16
Another resistor is connected to the Reference Block:
RF Stby that is used to fix the standby frequency.
In addition to this, VCC is compared to a second threshold
level that is nearly equal to 9.0 V (Vdisable1). UVLO1 is
generated to reset the maximum duty cycle and soft−start
block disabling the output stage as soon as VCC becomes
lower than Vdisable1. In this way, the circuit is reset and made
ready for the next startup, before the reference block is
disabled (refer to Figure 30). Finally, the upper limit for the
minimum normal operating voltage is 9.4 V (maximum
value of Vdisable1) and so the minimum hysteresis is 4.2 V.
((Vstup−th) min = 13.6 V).
The large hysteresis and the low startup current of the
MC44603A make it ideally suited for off−line converter
applications where efficient bootstrap startup techniques are
required.
Cstartup
1
1
1
0
Vdisable2
7.5 V
CUVLO1
0
Reference Block:
Voltage and Current
Sources Generator
(Vref, Iref, ...)
Startup
14.5 V
UVLO1
(to Soft-Start)
Vdisable1
9.0 V
Figure 48. VCC Management
As depicted in Figure 48, an undervoltage lockout has
been incorporated to guarantee that the IC is fully functional
before allowing system operation.
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21
MC44603A
185 VAC
to
270 VAC
RFI
Filter
R1
1.0/5.0 W
C3
1.0 nF/1.0 kV
C4 ... C7
1.0 nF/1000 V
R3
4.7 M
D1 ... D4
1N4007
C1
220 F
C2
220 F
Sync
C16
100 pF
9
R12
27 k
8
C9 1.0 nF
10
7
11
6
12
R15
5.6 k
C11
1.0 nF
R15
22 k
13
MC44603AP
C10 1.0 F
5
R9 1.0 k
C15
1.0 nF
D8
MR856
D7
M856
L1
1.0 H
15
2
D6
1N4148
R5
1.2 k
Laux
D9
MR852
Lp
C27
1000 F
16
D10
MR852
MTP6N60E
R26
1.0 k
C18
2.2 nF
D12
MR856
C25
1000 F
R19
10 k
C24
0.1 F
C23 220 pF
7.0 V/2.0 A
1
R12 22
R18
27 k
C28
0.1 F
14 V/2.0 A
R6
150
R8
15 k
R11 39
R17
22 k
C31
0.1 F
C26 220 pF
R7 180 k
R10 10
C33
100 F
30 V/2.0 A
C14
4.7 nF
*D15 1N5819
3
C30
100 F
150 V/0.6 A
C29 220 pF
4
14
L2
22.5 H
C32 220 pF
C17
47 nF
D5
1N4934
R2
68 k/2.0 W
C8 2.2 nF
R20
22 k
5.0 W
R14
0.2
C13
100 nF
D11
MR852
R13
1.0 k
C21
1000 F
C22
0.1 F
R24
270
R23
147.5 k
MOC8101
R21
10 k
C19
100 nF
D14
1N4733
C20
33 nF
R25
1.0 k
TL431
C12
6.8 nF
R22
2.5 k
* Diode D15 is required if the negative current into the output pin exceeds 15 mA.
Figure 49. 250 W Input Power Off−Line Flyback Converter with MOSFET Switch
http://onsemi.com
22
MC44603A
250 W Input Power Fly−Back Converter
185 V − 270 V Mains Range
MC44603AP & MTP6N60E
Tests
Conditions
Line Regulation
Results
Vin = 185 VAC to 270 VAC
Fmains = 50 Hz
Iout = 0.6 A
Iout = 2.0 A
Iout = 2.0 A
Iout = 2.0 A
10 mV
10 mV
10 mV
20 mV
Load Regulation
150 V
Vin = 220 VAC
Iout = 0.3 A to 0.6 A
50 mV
Cross Regulation
Vin = 220 VAC
Iout (150 V) = 0.6 A
Iout (30 V) = 0 A to 2.0 A
Iout (14 V) = 2.0 A
Iout (7.0 V) = 2.0 A
150 V
130 V
114 V
7.0 V
150 V
< 1.0 mV
Efficiency
Vin = 220 VAC, Pin = 250 W
81%
Standby Mode
P input
Vin = 220 VAC, Pout = 0 W
3.3 W
Switching Frequency
20 kHz fully stable
Output Short Circuit
Pout (max) = 270 W
Safe on all outputs
Startup
Pin = 250 W
VAC = 160 V
DEVICE ORDERING INFORMATION
Device
MC44603ADWR2G
Operating Temperature Range
Package
Shipping†
TA = −25°C to +85°C
SOIC−16
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
23
MC44603A
PACKAGE DIMENSIONS
PDIP−16
CASE 648−08
ISSUE T
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
−A−
16
9
1
8
B
F
C
DIM
A
B
C
D
F
G
H
J
K
L
M
S
L
S
−T−
H
SEATING
PLANE
K
G
D
M
J
16 PL
0.25 (0.010)
T A
M
M
INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0_
10 _
0.020
0.040
MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
SOIC−16WB
CASE 751G−03
ISSUE C
A
D
9
h X 45 _
E
0.25
H
8X
M
B
M
16
q
1
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INLCUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 TOTAL IN
EXCESS OF THE B DIMENSION AT MAXIMUM
MATERIAL CONDITION.
MILLIMETERS
DIM MIN
MAX
A
2.35
2.65
A1 0.10
0.25
B
0.35
0.49
C
0.23
0.32
D 10.15 10.45
E
7.40
7.60
e
1.27 BSC
H 10.05 10.55
h
0.25
0.75
L
0.50
0.90
q
0_
7_
8
16X
M
14X
e
T A
S
B
S
A1
L
A
0.25
B
B
SEATING
PLANE
T
C
GreenLine is a trademark of Motorola, Inc.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
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24
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
MC44603A/D
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