LT3740 Wide Operating Range, Valley Mode, No RSENSE™ Synchronous Step-Down Controller DESCRIPTION FEATURES n n n n n n n n n n n n n Wide VIN Range: 2.2V to 22V Internal Boost Provides 6V Gate Drive For VIN Down to 2.2V No Sensing Resistor Required Dual N-Channel MOSFET Synchronous Drive Valley Current Mode Control Optimized for High Step-Down Ratio Power Good Output Voltage Monitor 0.8V Reference Three Pin-Selected Current Limit Levels Constant Switching Frequency: 300kHz Programmable Soft-Start Output Voltage Tracking Available in 16-Pin 5mm × 3mm DFN The LT®3740 is a synchronous step-down switching regulator controller that drives N-channel power MOSFET stages. The controller uses valley current mode architecture to achieve very low duty cycles with excellent transient response without requiring a sense resistor. The LT3740 includes an internal step-up converter to provide a bias 7.8V higher than the input voltage for the drive. This enables the part to work from an input voltage as low as 2.2V. The XREF pin is an external reference input that allows the user to override the internal 0.8V feedback reference with any lower value, allowing full control of the output voltage during operation, output voltage tracking or soft-start. The LT3740 has three current limit levels that can be chosen by connecting the RANGE pin to ground, open, and input respectively. APPLICATIONS n n n Notebook and Palmtop Computers, PDA Portable Instruments Distributed Power Systems L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. No RSENSE is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION High Efficiency Step-Down Converter VIN SHDN VIN 3V to 12V 1μF LT3740 SWB BGDP 94 92 10μF BIAS 1Ω TGATE M1 HAT2168H 1Ω 0.9μH VOUT 1.8V 10A SW 15k XREF SN+ 1Ω BGATE 0.22μF M2 HAT2165H D1 B320A 100μF s3 VC 20k 1nF SN 88 VIN = 12V 86 84 VOUT = 1.8V – 105k PGND RANGE GND FB 22pF VIN = 5V 82 39pF 15k VIN = 3V 90 EFFICIENCY (%) 22μH Efficiency vs Load Current 80 0 2 4 6 LOAD CURRENT (A) 8 10 3740 TA01b 80.6k 3740 TA01a 3740fc 1 LT3740 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) SN–, BGATE, VC, FB, XREF, PGOOD Voltages .............10V VIN , SHDN, SW, Range Voltages ...............................22V BIAS, TGATE, BGDP, SN+ Voltages ............................32V TOP VIEW SWB Voltage ............................................................36V Maximum Junction Temperature........................... 125°C Operating Temperature Range (Note 2)....–40°C to 85°C Storage Temperature Range...................–65°C to 125°C SN– 1 16 VC PGND 2 15 FB BGATE 3 14 XREF BGDP 4 + SN 5 SW 6 11 RANGE TGATE 7 10 VIN BIAS 8 9 17 13 SHDN 12 PGOOD SWB DHC PACKAGE 16-LEAD (5mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/W EXPOSED PAD IS GND (PIN 17), MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT3740EDHC#PBF LT3740EDHC#TRPBF 3740 16-Lead (5mm × 3mm) Plastic DFN –40°C to 85°C LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT3740EDHC LT3740EDHC#TR 3740 16-Lead (5mm × 3mm) Plastic DFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 5V unless otherwise noted. (Note 2) PARAMETER CONDITIONS MIN Minimum Operation Voltage ● Maximum Operation Voltage ● Input Supply Current SHDN = 0V SHDN = 5V, BIAS = 14V, FB = 1.5V Feedback Reference Voltage XREF=1V Feedback Voltage Line Regulation VIN = 2.5V to 22V FB Pin Input Current FB = 800mV Error Amplifier Transconductance VC = 1.2V ● 794 Reverse Current Limit RANGE = 0V RANGE = Open RANGE = VIN 800 25 55 80 V μA mA 808 mV 0.006 % 230 nA 380 260 UNITS V 22 Minimum BGATE On Time (Note 3) Current Limit MAX 0.6 2.5 ● Controller Switching Frequency TYP 2.2 μS 300 330 kHz 500 700 ns 50 80 105 85 115 140 mV mV mV 35 mV 3740fc 2 LT3740 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 5V unless otherwise noted. (Note 2) PARAMETER CONDITIONS MIN SHDN Voltage to Enable Device ● SHDN Voltage to Disable Device ● TYP MAX UNITS 1.1 V 0.5 V TGATE On Voltage 5.5 V TGATE Off Voltage 0.2 V BGATE On Voltage 5.5 V BGATE Off Voltage 0.2 V CLOAD = 3300pF 30 ns TGATE Fall Time CLOAD = 3300pF 30 ns BGATE Rise Time CLOAD = 3300pF 50 ns BGATE Fall Time CLOAD = 3300pF TGATE Rise Time 50 ● PGOOD Threshold 740 ns 765 mV 0.2 V ● IPGOOD = 100μA PGOOD Low Voltage 720 PGOOD Current Capacity 500 Internal Boost Switching Frequency 0.8 1 1.2 MHz μA Internal Boost Switch Current Limit 360 440 520 mA (BIAS – VIN) in Operation 7.8 V (BIAS – VIN) to Start Controller 7.2 V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3740E is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: The minimum off time of the LT3740 application consists of the minimum BGATE on time, the delay from TGATE OFF to BGATE ON (80ns) and the delay from BGATE OFF to TGATE ON (80ns). TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C, unless otherwise noted) Transient Response Transient Response Shutdown Pin Start-Up LOAD STEP 0A TO 10A VIN = 5V, VOUT = 1.8V PAGE 17 CIRCUIT VOUT 50mV/DIV LOAD STEP 0A TO 10A VIN = 10V, VOUT = 2.5V FIGURE 4 CIRCUIT SHDN 2V/DIV IL 2A/DIV VOUT 50mV/DIV VO 2V/DIV IL 5A/DIV IL 5A/DIV 20μs/DIV VIN = 10V, VOUT = 2.5V ILOAD = 3A 3740 G02 3740 G01 10μs/DIV 3740 G03 2ms/DIV 3740fc 3 LT3740 TYPICAL PERFORMANCE CHARACTERISTICS XREF Pin Start-Up (TA = 25°C, unless otherwise noted) Current Limit vs Bottom Gate On-Time Load Regulation 200 0 VIN = 10V VOUT = 2.5V RS = 12mΩ –0.1 IL 2A/DIV 180 CURRENT SENSING LIMIT (mV) SS 0.5V/DIV DVOUT (%) –0.2 VO 2V/DIV –0.3 RANGE = VIN –0.4 –0.5 RANGE = GND –0.6 VIN = 10V, VOUT = 2.5V ILOAD = 3A –0.7 –0.8 3740 G04 2ms/DIV RANGE = OPEN 0 2 6 4 LOAD CURRENT (A) RANGE = VIN 160 RANGE = OPEN 140 120 100 RANGE = GND 80 60 40 20 8 0 10 30 40 50 60 80 90 70 BOTTOM GATE ON DUTY CYCLE (%) 3740 G06 3740 G05 Shutdown vs Maximum VC 300 1.6 MAXIMUM VC (V) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 808 250 0.5 1 1.5 2 SHUTDOWN (V) 804 200 150 RANGE = OPEN 100 792 1 1.1 1.2 1.3 1.4 1.5 VC (V) 1.6 1.7 1.2 320 1.1 315 1.0 SHDN (V) VFB (mV) 750 0.9 0.8 0.7 0.6 0.5 –25 0 25 50 TEMPERATURE (°C) 75 100 3740 G09b 0 25 50 TEMPERATURE (°C) 0.4 –50 75 100 Switching Frequency vs Temperature CONTROLLER FREQUENCY (KHz) 760 710 –50 –25 3740 G09a Shutdown Threshold vs Temperature 770 720 790 –50 1.8 3740 G08 PGOOD Threshold vs Temperature 730 800 798 794 RANGE = GND 3740 G07 740 802 796 50 3 2.5 806 RANGE = VIN 0 0 810 VFB (mV) CURRENT SENSING THRESHOLD (mV) 1.8 0 Feedback Reference Voltage vs Temperature VC vs Current Sensing Threshold 2.0 100 310 305 300 295 290 285 –25 0 25 50 TEMPERATURE (°C) 75 100 3740 G10 280 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 3740 G11 3740fc 4 LT3740 TYPICAL PERFORMANCE CHARACTERISTICS BIAS-VIN to Enable Controller vs Temperature 7.50 390 7.45 380 7.40 370 7.35 360 350 340 7.25 7.20 7.15 320 7.10 310 7.05 –25 0 25 50 TEMPERATURE (°C) 75 100 3.0 7.30 330 300 –50 Undervoltage Lockout Threshold vs Temperature UNDERVOLTAGE LOCKOUT VIN (V) 400 BIAS-VIN (V) ERROR AMP (μs) Error Amplifier Transconductance vs Temperature (TA = 25°C, unless otherwise noted) 7.00 –50 –25 0 25 50 TEMPERATURE (°C) 3740 G12 75 100 3740 G13 2.5 2.0 1.5 1.0 0.5 0 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 3740 G14 PIN FUNCTIONS SN– (Pin 1): Negative Current Sensing Pin. Connect this pin to the source of the bottom MOSFET for No RSENSE or to a current sense resistor. PGND (Pin 2): Power Ground. Connect this pin closely to the source of the bottom N-channel MOSFET. BGATE (Pin 3): Bottom Gate Drive. Drives the gate of the bottom N-channel MOSFET. BGDP (Pin 4): Bottom Gate Drive Power Supply. Connect this pin to a voltage source higher than 7V (VIN or BIAS). SN+ (Pin 5): Positive Current Sensing Pin. Connect this pin to the drain of the bottom MOSFET for No RSENSE or to a current sense resistor. SW (Pin 6): Switch Node. Connect this pin to the source of the top N-channel MOSFET and the drain of the bottom N-channel MOSFET. TGATE (Pin 7): Top Gate Drive. Drives the gate of the top N-channel MOSFET to BIAS. BIAS (Pin 8): Top Gate Drive Power Supply. Connect a capacitor between this pin and VIN. SWB (Pin 9): Switch Pin of the Internal Boost. Connect the boost inductor here. VIN (Pin 10): Input Supply Pin. Must be locally bypassed with a capacitor. RANGE (Pin 11): Current Limit Range Select Pin. Ground this pin for 50mV current sense voltage limit. Leave this pin open for 80mV current sense voltage limit. Connect this pin to VIN for current sense voltage limit of 105mV. PGOOD (Pin 12): Power Good Output. Open collector logic output that is pulled low when the FB voltage lower than 720mV. SHDN (Pin 13): Shutdown Pin. Connect to 2.5V or higher to enable device; 0.5V or less to disable device. Also, this pin functions as soft-start when a voltage ramp is applied. XREF (Pin 14): External Reference Pin. This pin sets the FB voltage externally between 0V and 0.8V. It can be used to slave the output voltage during normal operation or the output start-up behavior to an external signal source. Tie this pin to 1V or higher to use the internal 0.8V reference. FB (Pin 15): Feedback Pin. Pin voltage is regulated to 0.8V if internal reference is used or to the XREF pin if voltage is between 0V and 0.8V. Connect the feedback resistor divider to this pin. 3740fc 5 LT3740 PIN FUNCTIONS VC (Pin 16): Error Amplifier Compensation Pin. Connect the external compensation RC to this pin. The current comparator threshold increases with the voltage of this pin. Exposed Pad (Pin 17): Ground. Must be soldered to PCB ground. BLOCK DIAGRAM VIN SWB 10 9 + 7.8V + Gm – – A2 R Q1 Q S + – VC 16 Σ A3 + SHDN 13 RAMP GENERATOR + – + XREF 14 1.2MHz OSCILLATOR 8 BIAS 7 TGATE 6 SW 4 BGDP 3 BGATE 2 PGND – 5 SN+ + 1 SN– – gm A1 SWITCH LOGIC + VREF 0.80V FB 15 – 0.72V PGOOD 12 Σ + RAMP GENERATOR 300KHz OSCILLATOR 11 RANGE 3740 BD 3740fc 6 LT3740 OPERATION The LT3740 is a constant-frequency, valley current mode controller for DC/DC step-down converters. At the start of each oscillator cycle, the switch logic is set, which turns on the bottom MOSFET. After a 500ns blanking time, the bottom MOSFET current is sensed and added to a stabilizing ramp, and the resulting sum is fed into the PWM comparator A1. When this voltage goes below the voltage at VC pin, the switch logic is reset, which turns off the bottom MOSFET, and turns on the top MOSFET. The top MOSFET remains on until the next oscillator cycle. The bottom MOSFET current can be determined by sensing the voltage between the drain and source of the MOSFET using the bottom MOSFET on-resistance, or by sensing the voltage drop across a resistor between the source of the bottom MOSFET and ground. The two current sensing pins are SN+ and SN –. The gm error amplifier adjusts the voltage on the VC pin by comparing the feedback signal VFB with the reference, which is determined by the lower of the internal 0.8V reference and the voltage at the XREF pin. If the error amplifier’s output increases, more current is delivered to the output; if it decreases, less current is delivered. The LT3740 features an open collector PGOOD signal. When the voltage at FB pin is less than 720mV, the PGOOD output is pulled low by a NPN transistor. The 720mV threshold is independent of the voltage on XREF pin. The small internal step-up converter provides a BIAS voltage about 7V higher than the input voltage VIN for the drive of the top MOSFET. This enables the LT3740 to work from an input voltage as low as 2.2V. The controller starts operation when the BIAS pin is about 7V higher than VIN pin. The voltage supply for the bottom MOSFET drive is provided through the BGDP pin. For VIN lower than 7V, BGDP should be connected to BIAS to get enough drive bias. For VIN higher than 7V, BGDP can be connected directly to VIN to reduce power loss. Grounding the SHDN pin turns both the internal step-up converter and the controller off. The SHDN pin can also be used to implement an optional soft-start function. Start-Up and Shutdown During normal operation, when the feedback voltage is above 720mV, the LT3740 operates in forced continuous mode. When the feedback voltage is below 720mV, either during the start-up or because an external reference is applied, a zero current detect comparator is enabled to monitor the on-state bottom MOSFET current. When the current reaches zero, both the top and bottom MOSFETs are turned off, resulting in discontinuous operation. During the time that both top and bottom MOSFETs are off, no current signal is fed into the LT3740. Only the stabilizing ramp is fed into the PWM comparator to decide the next turn on of the top MOSFET. The LT3740 uses the SHDN pin to implement one of the two different startup schemes. As shown in the block diagram, the VC pin is clamped to SHDN pin through a PNP transistor. If the SHDN pin is slowly ramped up, the VC pin will track it up proportionally. As the VC pin voltage is compared to the current signal at comparator A1, this will, in turn, slowly ramp up the switching current. The tracking capability built into XREF can be used to implement another startup scheme. If less than 0.8V is applied to XREF, the LT3740 will use this voltage as the reference for regulation. Slowly ramping up the voltage at XREF forces the output to increase slowly, which limits the start-up current, as shown in Typical Performance Characteristics. A sharp SHDN signal is recommended to shut down the LT3740. If SHDN slowly ramps down, the VC signal will be dragged low for a considerable period of time before SHDN reaches its turn-off threshold. During this period of time, the output voltage could still be in regulation and the circuit operates in forced continuous mode. A low VC voltage will result in large bottom MOSFET on-time, which may cause a reverse inductor current that pumps the energy from the output to the input. If there is another supply at the output or the output has a big capacitor, the input voltage could overshoot, and may cause overvoltage damage to certain devices. 3740fc 7 LT3740 APPLICATIONS INFORMATION Current Sensing Range Reverse Current Limit Inductor current is determined by measuring the voltage across a sense resistance – either the on-resistance of the bottom MOSFET or an external sensing resistor. The maximum current sense threshold has three steps that are selected by the RANGE pin. The current sense threshold voltage without slope compensation is shown in Table 1. This is the value for high duty cycle operation. Because the LT3740 operates in forced continuous mode when the feedback voltage is higher than 720mV, the inductor current can go negative on occasion, such as light load, shutting down with a slow SHDN signal, large load step-down transient response, or the output voltage being pulled up by some other power supply. The LT3740 has a reverse current comparator to limit the reverse current. During the on-time of the bottom MOSFET, when (VSN+)–(VSN–) reaches 40mV, the comparator is triggered and turns off the bottom MOSFET. Table 1. Current Sensing Thresholds RANGE PIN CURRENT SENSING THRESHOLD Ground 50mV Open 80mV VIN 105mV Slope Compensation The LT3740 has a compensation slope to stabilize the constant-frequency valley mode operation. The slope compensation signal increases with the bottom gate duty cycle, which results in a current sense threshold voltage change with duty cycle as shown in the figure in Typical Performance Characteristics. The three current limit levels correspond to three compensation slopes. The compensation slope needs to overcome the difference between the up and down slope of the inductor current to avoid sub-harmonic oscillation. Maximum compensation slope is required for high input voltages, where the duty cycle is small. The compensation slope can only be selected by the RANGE pin. In the case of insufficient compensation slope, the inductor ripple current or the sensing resistance needs to be reduced. When operated under light load, the inductor current goes negative every cycle. The design of the inductor current ripple and the sensing resistor need to ensure that the reverse current comparator is not triggered during normal operation. Power MOSFET Selection The LT3740 requires two external N-channel power MOSFETs, one for the top switch and one for the bottom switch. Important parameters for the power MOSFETs are the breakdown voltage V(BR)DSS, threshold voltage V(GS)TH , on-resistance RDS(ON), reverse transfer capacitance CRSS and maximum current IDS(MAX). When the bottom MOSFET is used as the current sense element, particular attention must be paid to the initial variation, the gate-source voltage effect and the temperature characteristics of its on-resistance. MOSFET on-resistance decreases as the gate-source voltage increases. The change of BGDP voltage could affect the bottom MOSFET gate voltage. Refer to the MOSFET datasheet for the MOSFET on-resistance corresponding to certain gate voltage. MOSFET on-resistance is typically specified with a maximum value RDS(ON) at 25°C. In this case, additional margin is required to accommodate the rise in MOSFET on-resistance with temperature: RDS(ON) = RSENSE/ρT 3740fc 8 LT3740 APPLICATIONS INFORMATION The ρT term is a normalization factor (unity at 25°C) accounting for the significant variation in on-resistance with temperature, typically about 0.4%/°C as shown in Figure 1. For a maximum junction temperature of 100°C, using a value ρT = 1.3 is reasonable. of the circuit. One of the solution circuits is shown in Figure 2. The Zener diode and the small MOSFET limit the SHDN voltage to be about 6V below VIN. This shuts down the LT3740 for VIN lower than 7V. If VIN can ramp up to 7V quick enough, this circuit is not necessary. 2.0 LT3740 RDS(ON) – ON RESISTANCE (NORMALIZED) VGS = 10V ID = 14A VIN 1.6 MMSZ52312BS 2N7002TA 1.2 BGDP 100k SHDN 0.8 3740 F02 Figure 2. Circuit That Prevents Operation for VIN < 7V 0.4 0 25 50 75 100 125 150 –50 –25 0 TJ – JUNCTION TEMPERATURE (°C) 3740 F01 Figure 1. MOSFET RDS(ON) vs. Temperature Gate Drives The top gate drive power is provided by BIAS which is about 7.8V higher than VIN. The top gate voltage can be as high as 7.8V and can droop to about 5.5V if the on-time is long enough. The bottom gate drive power is provided by the BGDP pin. BGDP needs to be connected to 7V or higher to get enough gate drive voltage for logic-level threshold MOSFETs. BGDP can be connected to VIN , BIAS or an external voltage supply. For input voltages lower than 7V, BGDP should be connected to BIAS to be able to use logic-level threshold MOSFETs. For VIN higher than 7V, BGDP can be connected to VIN to reduce power loss in the bottom gate drive. For high BGDP voltages, the internal clamp circuit limits the bottom gate drive voltage to about 8V to prevent the gate from overvoltage damage. For the case BGDP is connected to VIN , if VIN voltage ramp up slowly during startup, there will be a considerable period of time that BGDP is below 7V and the circuit is operating. The insufficient voltage on BGDP could cause malfunction For VIN higher than 14V, the high dv/dt at SW node and the strong drive of BGATE can generate extra noise and affect the operation. A resistor RBG of 1Ω-2Ω between BGATE and the gate of the bottom MOSFET as shown in Figure 3 can effectively reduce the noise. LT3740 SW RBG BGATE M2 PGND 3740 F03 Figure 3. Noise Reduction for Bottom MOSFET The LT3740 uses adaptive dead time control to prevent the top and bottom MOSFET shoot-through and minimize the dead time. When the internal top MOSFET on signal comes, the LT3740 delays the turn on of TGATE until BGATE is off. When the internal bottom MOSFET on signal comes, the LT3740 delays the turn on of BGATE until the SW node swings down to ground. In the case of small or negative inductor current that SW node cannot swing below ground after TGATE turns off, BGATE will turn on 200ns after TGATE is off. 3740fc 9 LT3740 APPLICATIONS INFORMATION Choose MOSFET Sensing or Resistor Sensing The LT3740 can use either the bottom MOSFET onresistance or an external sensing resistor for current sensing. Simplicity and high efficiency are the benefits of using bottom MOSFET on-resistance. However, some MOSFETs have a wide on-resistance variation. As discussed previously, the gate-source voltage and the temperature also affect the MOSFET on-resistance. These factors affect the accuracy of the inductor current limit. The inductor saturation current will need enough margin to cover the current limit variation. In the cases where the input voltage supply has sufficient current limit, a wide current limit variation of the controller may be tolerated. As the load increases to reach the input supply current limit, the input voltage corrupts, and limits the total power in the circuit. To reduce the current limit variation, a more accurate external sensing resistor can be used between the bottom MOSFET source and ground. Connect SN+ and SN – pins to the two terminals of the resistor. Power Dissipation The resulting power dissipation in the MOSFETs are: PTOP = DTOP • IL2 • RDS(ON),TOP PBOT = DBOT • IL2 • RDS(ON),BOT If an external sensing resistor is used, the extra power dissipation in the sensing resistor is: PRS = DBOT • IL2 • Rs The power losses in the bottom MOSFET and external sensing resistor are greatest during an output short-circuit, where maximum inductor current and maximum bottom duty cycle occur. Besides I2R power loss, there are transition losses and gate drive losses. The transition losses that increase with the input voltage and inductor current are mainly in the top MOSFET. The losses can be estimated with a constant k = 1.7A–1 as: Transition Loss = k • VIN2 • IL • CRSS • FS The gate drive losses increase with the gate drive power supply voltage, gate voltage and gate capacitance as shown below: PGD,TOP = VBIAS • CGS,TOP • VGS,TOP • FS PGD,BOT = VBGDP • CGS,BOT • VGS,BOT • FS Duty Cycle Limits At the start of each oscillator cycle, the top MOSFET turns off and the bottom MOSFET turns on with a 500ns duty cycle on the top MOSFET. If the maximum duty cycle is reached, due to a dropping input voltage for example, the output voltage will droop out of regulation. Lower ripple current reduces core losses in the inductor, ESR losses in the output capacitors and output voltage ripple. The highest efficiency is obtained with a small ripple current. However, achieving this requires a large inductor. There is a trade off between component size and efficiency. A reasonable starting point is to choose a ripple current that is about 30% of IOUT(MAX). The largest ripple current occurs at the highest VIN. To guarantee that ripple current does not exceed a specified maximum, the inductance should be chosen according to: ⎛ ⎞ ⎛ ⎞ VOUT V L = ⎜ 1– OUT ⎟ • ⎜ ⎟ ⎝ VIN(MAX) ⎠ ⎝ FS • ΔIL(MAX) ⎠ 3740fc 10 LT3740 APPLICATIONS INFORMATION Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores; instead use ferrite, molypermalloy or Kool Mμ® cores. A variety of inductors designed for high current, low voltage applications are available from manufacturers such as Sumida, Panasonic, Coiltronics, Coilcraft and Toko. Schottky Diode D1 Selection The Schottky diode D1 shown in Figure 4 conducts during the dead time between the conduction of the power MOSFET switches. It is intended to prevent the body diode of the bottom MOSFET from turning on and storing charge during the dead time, which can cause a modest (about 1%) efficiency loss. The diode can be rated for about one half of the full load current since it is on for only a fraction of the duty cycle. In order for the diode to be effective, the inductance between it and the bottom MOSFET must be as small as possible, mandating that these components be placed adjacently. Another important benefit of the Schottky diode is that it reduces the SW node ringing at switching edges, which reduces the noise in the circuit and also makes the MOSFETs more reliable. CIN and COUT Selection The input capacitance CIN is required to filter the square wave current at the drain of the top MOSFET. Use a low ESR capacitor sized to handle the maximum RMS current. IRMS ≈IOUT(MAX) • VOUT • VIN VIN −1 VOUT This formula has a maximum at VIN = 2VOUT, where: 1 IRMS = •IOUT(MAX) 2 This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to derate the capacitor. The selection of COUT is primarily determined by the ESR required to minimize voltage ripple and load step transients. The output ripple ΔVOUT is approximately bounded by: ⎛ ⎞ 1 ΔVOUT < ΔlL • ⎜ ESR + 8 •FS • COUT ⎟⎠ ⎝ Since ΔIL increases with input voltage, the output ripple is highest at maximum input voltage. Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering and has the necessary RMS current rating. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR, but can be used in cost-sensitive applications providing that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. When used as input capacitors, care must be taken to ensure that ringing from inrush currents and switching does not pose an overvoltage hazard to the power switches and controller. To dampen input voltage transients, add a small 5μF to 50μF aluminum electrolytic capacitor with an ESR in the range of 0.5Ω to 2Ω. 3740fc 11 LT3740 APPLICATIONS INFORMATION Current Limit The maximum inductor current is inherently limited in a current mode controller by the maximum sense voltage. In the LT3740, the maximum sense voltage is selected by the RANGE pin. With valley current control, the maximum sense voltage and the sense resistance determine the maximum allowed inductor valley current. The corresponding output current limit is: ILIMIT = VSN(MAX) RS + ΔIL 2 1. DC I2R losses. These arise from the on-resistances of the MOSFETs, external sensing resistor, inductor and PC board traces and cause the efficiency to drop at high output currents. The average output current flows through the inductor, but is chopped between the top and bottom MOSFETs. If the two MOSFETs have approximately the same RDS(ON) , then the resistance of one MOSFET can simply be summed with the resistances of L and the board traces to obtain the DC I2R loss. For example, if RDS(ON) = 0.01Ω and RL = 0.005Ω, the loss will range from 15mW to 1.5W as the output current varies from 1A to 10A. The current limit value should be checked to ensure that ILIMIT(MIN) > IOUT(MAX). The maximum sense voltage increases as duty cycle decreases. If MOSFET on-resistance is used for current sensing, it is important to check for self-consistency between the assumed MOSFET junction temperature and the resulting value of ILIMIT which heats the MOSFET switches. 2. Transition loss. This loss arises from the brief amount of time the top MOSFET spends in the saturated region during switch node transitions. It depends upon the input voltage, load current, driver strength and MOSFET capacitance, among other factors. The loss is significant at high input voltages and can be estimated from: In the event of output short-circuit to ground, the LT3740 operates at maximum inductor current and minimum duty cycle. The actual inductor discharging voltage is the voltage drop on the parasitic resistors including bottom MOSFET on-resistance, inductor ESR, external sensing resistor if it is used and the actual short-circuit load resistance. Because of the big variation of these parasitic resistances, the top MOSFET on-time can vary considerably for the same input voltage. In the case of high input voltage and low parasitic resistance, pulse-skipping may happen. 3. Gate drive loss. The previous formula show the factors of this loss. For the top MOSFET, nothing can be done other than choosing a small CGS MOSFET without sacrificing on-resistance. For the bottom MOSFET, the gate drive loss can be reduced by choose the right BGDP voltage supply. Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Although all dissipative elements in the circuit produce losses, four main sources account for most of the losses in LT3740 circuits: Transition Loss = (1.7A–1) • VIN2 • IOUT • CRSS • FS 4. CIN loss. The input capacitor has the difficult job of filtering the large RMS input current to the regulator. It must have a very low ESR to minimize the AC I2R loss and sufficient capacitance to prevent the RMS current from causing additional upstream losses in fuses or batteries. Other losses, including COUT ESR loss, Schottky diode D1 conduction loss during dead time and inductor core loss generally account for less than 2% additional loss. When making adjustments to improve efficiency, the input current is the best indicator of changes in efficiency. If a change is made and the input current decreases, then the efficiency has increased. If there is no change in input current, then there is no change in efficiency. 3740fc 12 LT3740 APPLICATIONS INFORMATION Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD*(ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The VC pin external components shown in Figure 2 will provide adequate compensation for most applications. For a detailed explanation of switching control loop theory see Application Note 76. Step-Up Converter Inductor Selection The step-up converter in the LT3740 provides a BIAS voltage about 7V higher than the input voltage VIN for the top MOSFET drive and most of the internal controller circuitry. The step-up converter has a current limit of 400mA. An inductor ripple current from 100mA to 200mA is a reasonable design for the converter. For this consideration, a 22μH or 47μH inductor is recommended for most of the LT3740 applications. Small size and high efficiency are the major concerns. Inductors with low core losses and small DCR at 1MHz are good choices. Some inductors in this category with small size are listed in Table 2. Table 2. Recommended Inductors for Step-Up Converter PART NUMBER DCR (Ω) CURRENT RATING (MA) MANUFACTURER LQH3C220 0.71 250 Murata 814-237-1431 www.murata.com ELT5KT-220 0.9 420 Panasonic 714-373-7334 www.panasonic.com CDRH3D16-220 CR32-470 0.43 0.97 400 330 Sumida 847-956-0666 www.Sumida.com The step-up converter inductor current is the greatest when the input voltage is the lowest. Larger Cgs of the MOSFETs results in large inductor current. Connecting the BGDP pin to the BIAS pin also greatly increases the inductor current. The saturation current of the inductor needs to cover the maximum input current. The step-up inductor current decreases as the input voltage increases. For high input voltages, the step-up converter will begin skipping pulses. Although this will result in some low frequency ripple, the BIAS voltage remains regulated on an average basis, and the step-down controller operation is not affected. For VIN higher than 10V step-up inductor saturation current should be higher than 400mA. For VIN lower than 10V, a lower current rating inductor could be used. The inductor RMS current should be higher than 250mA, and the inductance should not be less than 10μH at 400mA. Step-Up Converter Capacitor Selection The small size of ceramic capacitors makes them ideal for the output of the LT3740 step-up converter. X5R and X7R types are recommended because they retain their capacitance over wider voltage and temperature ranges than other types such as Y5V or Z5U. A 1μF capacitor is recommended for the output of the LT3740 step-up converter. Table 3. Recommended Ceramic Capacitor Manufacturers MANUFACTURER PHONE URL Taiyo Yuden 408-573-4150 www.t-yuden.com Murata 814-237-1431 www.murata.com Kemet 408-986-0424 www.kemet.com Design Example As a design example, take a supply with the following specifications: VIN = 7V to 20V (15V nominal), VOUT = 2.5V ± 5%, IOUT(MAX) = 10A. First, choose the inductor for about 30% ripple current at nominal VIN: L= 2.5V ⎛ 2.5V ⎞ • ⎜ 1– = 2.3μH (300kHz) • 0.3 • 10A ⎝ 15V ⎟⎠ 3740fc 13 LT3740 APPLICATIONS INFORMATION Selecting a standard value of 2.0μH results in a ripple current of: ΔIL = 2.5V ⎛ 2.5V ⎞ = 3.47A • ⎜ 1– (300kHz) •(2μH) ⎝ 15V ⎟⎠ Set Range = VIN. At minimum input voltage VIN = 7V, the maximum current sensing voltage is 145mV. Use an external sensing resistor of 12mΩ. The inductor current valley will be clamped to 12A. The ripple current at VIN = 7V is 2.68A, there is about 33% of margin for the 10A load current to cover the maximum current sensing voltage variation. For the case of using MOSFET on-resistance for current sensing, choosing a Si4840 (RDS(ON) = 0.008Ω (NOM) 0.0095Ω (MAX) for VGS = 7V, θJA = 40°C/W) yields a nominal sense voltage of: VSN(NOM) = (10A)(1.3)(0.0095Ω) =123mV To check if the current limit is acceptable, assume a junction temperature of about 55°C above a 70°C ambient with ρ125°C = 1.5: ILIMIT = 145mV 2.68A + = 11.5A 1.5 • 0.0095Ω 2 Double check the assumed TJ in the MOSFET at VIN = 7V with maximum load current: PBOT = DBOT • IL2 • RDS(ON), BOT ⎛ 2.5V ⎞ 2 • (10A ) • 1.5 • 0.0095 = 0.92W PBOT = ⎜ 1– ⎟ ⎝ 7V ⎠ Double check the assumed TJ in the MOSFET: TJ = 70°C + (0.92W)(40°C/W) = 107°C The power dissipation in the bottom MOSFET increases with input voltage. For VIN = 20V, ⎛ 2.5V ⎞ 2 • (10A ) • 1.5 • 0.0095Ω = 1.25W PBOT = ⎜ 1– ⎝ 20V ⎟⎠ Double check the assumed TJ in the MOSFET: TJ = 70°C + (1.25W)(40°C/W) = 120°C Choose a Si4840 (CRSS = 200pF) for the top MOSFET and check its power dissipation at maximum load current with ρ100°C = 1.3: 2.5V 2 • (10A ) • 1.3 • 0.0095Ω + 17 •(20V)2 • 20V 10A • 200pF • 300kHz = 0.15W + 0.41W = 0.56W PTOP = TJ = 70°C + (0.56W)(40°C/W) = 92°C This analysis shows that careful attention to heat sinking will be necessary in this circuit. Check the reverse current comparator margin. The maximum ripple current happens at maximum input voltage: ΔIL(MAX) = 2.5V ⎛ 2.5V ⎞ • ⎜ 1– = 3.65A 300kHz • 2μH ⎝ 20V ⎟⎠ At no load, the maximum reverse current voltage is: RS • ΔIL(MAX) 2 = 12mΩ • 3.65A = 22mV 2 3740fc 14 LT3740 APPLICATIONS INFORMATION Which is adequately lower than the 35mV reverse current comparator threshold. However, a 0A to 10A load step will cause an output change of up to: CIN is chosen for an RMS current rating of about 5A at 85°C. The output capacitors are chosen for a low ESR of 0.005Ω to minimize output voltage changes due to inductor ripple current and load steps. The ripple voltage will be only: ΔVOUT(STEP) = ΔILOAD • (ESR) = (10A)(0.005Ω)= 50mV ΔVOUT(RIPPLE) = ΔIL • (ESR) = (3.47A)(0.005Ω) = 17mV An optional 100μF ceramic output capacitor is included to minimize the effect of ESL in the output ripple. For the step-up converter, at VIN = 7V, step-up inductor current is about 27mA. Choose a 22μH inductor and a 1μF output capacitor. The complete circuit is shown in Figure 4. L2 22μH LT3740 SWB BGDP VIN VIN 7V to 20V CIN 100μF 35V CB 1μF BIAS RANGE TGATE SHDN M1 Si4840 L1 2.0μH VOUT 2.5V 10A SW 100k XREF BGATE 1μF M2 Si4840 D1 6CWQ03FN 680μF 4V s2 100μF 6.3V PGND 100k SN+ PGOOD VC – RS 12mΩ 21k SN 100k GND 18pF FB 10k 100pF 3740 F04 Figure 4. Design Example: 2.5V/10A Output 3740fc 15 LT3740 APPLICATIONS INFORMATION PC Board Layout Considerations ■ Minimize the parasitic inductance in the loop of CIN, MOSFETs and D1 which carries large switching current. ■ Use compact plane for switch node (SW) to improve cooling of the MOSFETs and to keep EMI low. ■ Use planes for VIN and VOUT to maintain good voltage filtering and to keep power losses low. Unused areas can be filled with copper and connect to any DC node (VIN, VOUT, GND) ■ Place CB close to BIAS pin and input capacitor. ■ Keep the high dv/dt nodes (SW, TG, BG, SWB) away from sensitive small signal nodes. As with all switching regulators, careful attention must be paid to the PCB board layout and component placement. ■ ■ ■ Place the power components close together with short and wide interconnecting trances. The power components consist of the top and bottom MOSFETs, the inductor, CIN and COUT. One way to approach this is to simply place them on the board first. Similar attention should be paid to the power components that make up the boost converter. They should also be placed close together with short and wide traces. Always use a ground plane under the switching regulator to minimize interplane coupling. 3740fc 16 LT3740 TYPICAL APPLICATIONS High Efficiency Step-Down Converter VIN 7V to 20V 22μH LT3740 SWB BGDP 20μF 1μF BIAS VIN 1Ω M1 HAT2168H 3.4μH TGATE SHDN 1Ω 15k VOUT 3.3V 10A SW SN+ XREF D1 B340A 1Ω 2k 100μF s3 BGATE 0.47μF 10k SN VC – M2 HAT2165H 22pF 255k PGND 16k RANGE GND FB 1500pF 80.6k 22pF 3740 TA02a Efficiency vs Load Current 98 VIN = 7V EFFICIENCY (%) 96 94 VIN = 15V 92 VIN = 20V 90 88 86 84 82 80 VOUT = 3.3V 0 2 6 4 LOAD CURRENT (A) 8 10 3740 TA02b 3740fc 17 LT3740 TYPICAL APPLICATIONS 2.5V/10A 22μH 1μF LT3740 SWB VIN 4V to 15V 22μF s2 BGDP BIAS VIN 1Ω TGATE SHDN M1 HAT2168H 1Ω SW 10k 1.05μH VOUT 2.5V SN+ XREF 1Ω 1μF BGATE 10k D1 B340A M2 HAT2165H 100μF s3 47pF SN– VC 5.1k 100k PGND 7.5k RANGE GND FB 680pF 46.4k 22pF 3740 TA03a EFFICIENCY 96 94 VIN = 4V EFFICIENCY (%) 92 VIN = 15V 90 88 86 84 82 VOUT = 2.5V 80 0 2 4 6 LOAD CURRENT (A) 8 10 3740 TA03b 3740fc 18 LT3740 PACKAGE DESCRIPTION DHC Package 16-Lead Plastic DFN (5mm × 3mm) (Reference LTC DWG # 05-08-1706) 0.65 p0.05 3.50 p0.05 1.65 p0.05 2.20 p0.05 (2 SIDES) PACKAGE OUTLINE 0.25 p 0.05 0.50 BSC 4.40 p0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 5.00 p0.10 (2 SIDES) R = 0.20 TYP 3.00 p0.10 (2 SIDES) 9 0.40 p 0.10 16 1.65 p 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) PIN 1 NOTCH (DHC16) DFN 110 8 0.200 REF 1 0.25 p0.05 0.50 BSC 0.75 p0.05 4.40 p0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3740fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT3740 TYPICAL APPLICATION High Efficiency Step-Down Converter VIN 7V to 20V 22μH LT3740 SWB BGDP BIAS VIN SHDN 20μF 1μF 1Ω TGATE 1Ω SW 15k 1Ω BGATE 10k VC 16k 3.4μH VOUT 3.3V 10A SN+ XREF 0.47μF M1 HAT2168H SN– D1 B340A M2 HAT2165H 2k 100μF s3 22pF 255k PGND RANGE GND FB 1500pF 80.6k 22pF 3740 TA04 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1778 No RSENSE , Step-Down Synchronous DC/DC Controller VIN: 4V to 36V, Fast Transient Responds, Current Mode, IOUT ≤ 20A LTC1876 2-Phase, Dual Synchronous Step-Down Switching Controller Current Mode; 20A per Channel LT3430/LT3431 Monolithic 3A, 200kHz/500kHz Step-Down Switching Regulator VIN: 5.5V to 60V, 0.1Ω Saturation Switch, 16-Lead SSOP Package LTC3708 No RSENSE , Dual, 2-Phase, Synchronous DC/DC Controller VIN: 4V to 36V, Current Mode, Up/Down Tracking, Synchronizable LTC3728L Dual, 2-Phase Synchronous Step-Down Controller VIN: 4V to 36V, 550kHz, PLL: 250kHz to 550kHz LTC3778 Wide Operating Range, No RSENSE Step-Down Controller Single Channel, Separate VON Programming LTC3824 High Voltage, Wide Input Range, Step-Down Controller With Low IQ VIN: 4V to 60V, IQ = 40μA, 100% Duty Cycle, 2A P-Channel Gate Drive, 10-Pin MSOP 3740fc 20 Linear Technology Corporation LT 0908 REV C • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006