Compact, Dual 2 A Reference Design with the NCP3120

AND8323
Compact, Dual 2 A
Reference Design with the
NCP3120
Prepared by: Jim Hill
ON Semiconductor
http://onsemi.com
Evaluation Board Specification:
Characteristic
Min
Input Voltage
7
Output Voltage
Output Current
Typ
Max
Unit
Comments
15
V
(Note 1)
Vout1
3.3
V
Vout2
5
V
Vout1
0
2
A
Vout2
0
2
A
Enable Threshold High
EN Tied to SEQ
2.0
Sequence Threshold Low
EN Tied to SEQ
Voltage Ripple
Vout1
40
mVpk-pk
Vout2
40
mVpk-pk
Load Regulation
Vout1
0.61
mV/A
(Vin = 12 V, Iout = 0.5 - 2 A)
Vout2
0.21
mV/A
Line Regulation
Vout1
1.85
mV/V
(Vin = 10.8 - 13.2 V, Iout = 2 A)
Vout2
3.53
mV/V
160
°C
Oscillator Frequency
300
Thermal Shutdown
Dual 2 A DC-DC Converter Dimensions
kHz
0.8
1″ X 2″
V
EN Tied to SEQ
V
EN Tied to SEQ
Outlined Area
1. Operation down to 4.5 V requires selecting a lower voltage for Vout2.
Circuit Description
The NCP3120 operates as a voltage-mode, pulse-widthmodulated, (PWM) asynchronous buck converter. Its
operating frequency is adjustable with an external resistor to
ground from 220 kHz to 750kHz. minimum switching
frequency of 220 kHz and a maximum 750kHz. Also, an
onboard operational transconductance amplifier (OTA)
integrates the error signal to provide high DC accuracy. The
NCP3120 also includes an enable and disable function with
externally controlled soft start and stop.
© Semiconductor Components Industries, LLC, 2008
March, 2008 - Rev. 1
1
Publication Order Number:
AND8323/D
AND8323
Board Details
Figure 1. Top Layer
Figure 2. Bottom Layer
Figure 3. Silkscreen Layer
http://onsemi.com
2
VOUT2
3
R4
13k
C6
http://onsemi.com
R12
6.81k
120p
R7
316k
C16
VOUT_2-1
Figure 4. Evaluation Board - Schematic
75k
VOUT_2-2
10k
R9
R10
1u
C7
R15
15
680
C5
47n
R6
1.69k
C4
C3
10n
33
C15
220 uF 10 uF 10 uF
C11
VINT-1
27
12V
MBRA340T3
D1
L1
C20
0.1u
VINT-2
26
25
28
29
30
31
32
VSW1-1
10k
R8
VIN
47n
VIN
R5
1k
C1
14 AGND
FB2
15
RT
16
SW1
VIN
10n
VSW2-2
C2
VSW2-1
68.1k
SW2
R3
7
120p
6
C10
8
VIN
U1
NCP3120
VIN
12 SS2
13 COM2
5
9 SW2
10 SW2
11 GND2
VIN
FBB2-2
MBRA340T3
D2
4
220 uF
C13
3
10 uF 10 uF
C19
2
FBB2-1
R14
20
C14
1
FBT2-1
FBT2-2
L2
10 uF 10 uF
220u
C17
C18
C12
VSW1-2
C21
0.1u
5V
VIN
12V
R2
15k
1n
R1
47.5k
C8
R13
20
R11
100
FBB1-2
FBB1-1
FBT1-1
FBT1-2
3.3V
0.1u
C9
VOUT_1-2
VOUT_1-1
VOUT1
AND8323
PG1 24
PG2
23
EN1
22
SEQ1
21
EN2
20
SEQ2
19
TRACK1
18
TRACK2
17
EN-1
EN-2
AND8323
0 .1. ref
Falling comp
SHDN 1
PG 1
HS protection 1
0 .9 . ref
VIN
pg 1
Delay
COMP 1
R
PWM
Error Amplifier
EOTA 1
HS1
CON TR OL
LOGIC 1
FB 1
0o
S
SW 1
1V
GND 1
10 u
SS 1
TRACK 1
SS 1
Soft Start &
Tracking Control
(MUX1)
AVIN
FB1
10 u
OSCILLATOR
Signal
Voltage
0. 5V
RT
Overload
Protection
ref (0.8 V)
AGND
SHDN 1
SEQ1
EN 1
EN 2
SHDN 1
Power
Sequencing 1
SHDN2
AVIN
STAR TU P
UVL O
TH ER MAL
SH U TD OWN
Power
Sequencing 2
Reference
0. 8V
ref (0.8 V)
GND 2
SHDN1 SHDN2
1V
SEQ 2
ref (0 .8V )
SHDN 2
10u
SS 2
SS2
TRACK 2
Soft Start &
Tracking Control
(MUX2)
HS protection 2
FB2
VIN
10u
0 .5V
Overload
Protection
180o
COMP 2
S
Error Amplifier
R
PWM
EOTA 2
HS 2
CON TR OL
LOGIC 2
FB 2
SW 2
PG 2
pg 2
Delay
0 .9 . ref
0 .1. ref
Falling comp
SHDN 2
Figure 5. Block Diagram - NCP3120
http://onsemi.com
4
AND8323
PIN DESCRIPTION
Pin
Symbol
1, 31, 32
SW1
2-7
VIN
8 – 10
SW2
11
GND2
12
SS2
13
COMP2
14
AGND
15
FB2
Feedback Pin. Used to set the output voltage of Channel 2 with a resistive divider from the output.
16
RT
Resistor select for the oscillator frequency. Connect a resistor from the RT pin to AGND to set the
frequency of the master oscillator.
17
TRACK 2
Tracking input for Channel 2. This pin allows the user to control the rise time of the second output.
This pin must be tied high in the normal operation (except in the tracking mode).
18
TRACK 1
Tracking input for Channel 1. This pin allows the user to control the rise time of the first output. This
pin must be tied high in the normal operation (except in the tracking mode).
19
SEQ2
Sequence pin for Channel 2. I/O used in power sequencing. Connect SEQ to EN for normal opera‐
tion of a standalone device.
20
EN2
21
SEQ1
22
EN1
Enable input for Channel 1.
23
PG2
Power good, open-drain output of Channel 2. Output logic is pulled to ground when the output is
less than 90% of the desired output voltage. Tied to an external pull-up resistor.
24
PG1
Power good, open-drain output of Channel 1. Output logic is pulled to ground when the output is
less than 90% of the desired output voltage. Tied to an external pull-up resistor.
25
AVIN
Input signal supply voltage pin.
26
FB1
Feedback Pin. Used to set the output voltage of Channel 1 with a resistive divider from the output.
27
AGND
28
COMP1
29
SS1
30
GND1
Exposed Pad (GND)
Description
Switch node of Channel 1. Connect an inductor between SW1 and the regulator output.
Input power supply voltage pins. These pins should be connected together to the input signal sup‐
ply voltage pin.
Switch node of Channel 2. Connect an inductor between SW2 and the regulator output.
Power ground for Channel 2
Soft-start control input for Channel 2. An internal current source charges an external capacitor
connected to this pin to set the soft-start time.
Compensation pin of Channel 2. This is the output of the error amplifier and inverting input of the
PWM comparator.
Analog ground; connect to GND1 and GND2.
Enable input for Channel 2.
Sequence pin for Channel 1. I/O used in power sequencing. Connect SEQ to EN for normal opera‐
tion of a standalone device.
Analog ground. Connect to GND1 and GND2.
Compensation pin of Channel 1. This is the output of the error amplifier and inverting input of the
PWM comparator.
Soft-start/stop control input for Channel 1. An internal current source charges an external capacitor
connected to this pin to set the soft-start time.
Power ground for Channel 1.
The exposed pad at the bottom of the package is the electrical ground connection of the NCP3120.
This node must be tied to ground.
http://onsemi.com
5
AND8323
Performance Information
The following Figures show typical performance of the NCP3120 in this evaluation board.
90
95
Vin = 10.8 V
Vin = 10.8 V
Vin = 13.2 V
90
EFFICIENCY (%)
EFFICIENCY (%)
85
Vin = 12 V
80
75
70
Vin = 12 V
85
80
75
65
70
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
Iout (A)
Iout (A)
Figure 6. Efficiency for Vout1 = 3.3 V
Figure 7. Efficiency @ Vout2 = 5 V
1.8 2.0
4.998
3.3750
3.3745
4.997
Vin = 13.2 V
3.3740
Vin = 13.2 V
4.996
3.3735
4.995
3.3730
3.3725
Vout (V)
Vout (V)
Vin = 13.2 V
Vin = 12 V
3.3720
4.994
Vin = 12 V
4.993
4.992
3.3715
Vin = 10.8 V
4.991
3.3710
Vin = 10.8 V
4.990
3.3705
3.3700
4.989
0
0.5
1.0
1.5
2.0
0
Iout (A)
0.5
1.0
1.5
2.0
Iout (A)
Figure 8. Load Regulation vs. Vin for Vout1 = 3.3 V
Figure 9. Load Regulation vs. Vin for Vout1 = 3.3 V
http://onsemi.com
6
AND8323
Performance Information - cont.
Figure 10. Load Transient - Vout1 (Vin = 12 V, Iout = 200 mA -to- 2 A -to- 200 mA)
(CH1 = Vout1, CH4 = Iout1)
Figure 11. Load Transient - Vout2 (Vin = 12 V, Iout = 200 mA -to- 2 A -to- 200 mA)
(CH1 = Vout2, CH4 = Iout2)
Figure 12. Switching Waveforms Vout1, Vout2, VSW1, VSW2
CH1 = Vout1, CH2 = Vout2, CH3 = VSW1, CH4 = VSW2)
http://onsemi.com
7
AND8323
Performance Information - cont.
Figure 13. Ratiometric Startup of Vout1/2 with Power Good Outputs
(CH1 = Vout1, CH2 = Vout2, CH3 = PG1, CH4 = PG2)
Figure 14. Switching Waveforms Showing 1805 Phase Shift Operation
(CH1 = VSW1, CH2 = VSW2, CH3 = IL1, CH4 = IL2)
http://onsemi.com
8
AND8323
Performance Information - cont.
Hiccup Overload Protection
When the NCP3120 detects an overload condition (FB
voltage falls to 0.5 V), switching stops, the soft start
capacitor is discharged to 0.1 V and again charged to 1V.
The output of the error amplifier is also tied to ground
(output transistor is closed) during the soft start capacitor
discharge. If the output voltage is still below the overload
condition voltage (0.5 V), the cycle repeats, as shown in
Figure15.
The NCP3120 uses hiccup mode protection to protect the
power supply from damage during overload conditions.
During normal operation, the external soft start capacitor is
pulled up by a current source that delivers 10 mA to the SS
pin capacitor. This current source continues to charge the
soft start capacitor until it reaches the saturation voltage of
the current source (typically 4 V).
Figure 15. Hiccup Overload Protection Description (Vin = 12 V)
Figure 16. Switching Waveforms Showing Hiccup Overload Protection
(CH1 = VSW1, CH2 = VSW2, CH3 = IL1, CH4 = IL2)
http://onsemi.com
9
AND8323
Bill of Materials
Designator
Qty
Description
Value
Toler‐
ance
Footprint
Manufacturer
Part Number
Manufacturer
C1
1
Ceramic Chip
Capacitor, 50 V
120 p
±10%
0603
VJ0603A121JXACW1BC
Vishay
C2
1
Ceramic Chip
Capacitor, 50 V
22 n
±10%
0603
VJ0603Y223KXJCW1BC
Vishay
C3
1
Ceramic Chip
Capacitor, 50 V
680 p
±10%
0603
C1608C0G2E681J
TDK
C4
1
Ceramic Chip
Capacitor, 50 V
10 n
±10%
0603
VJ0603Y103KXACW1BC
Vishay
C5-6
2
Ceramic Chip
Capacitor, 50 V
47 n
±10%
0603
C1608X7R1E473K
TDK
C7
1
Ceramic Chip
Capacitor, 6.3 V
1m
±10%
0603
C1608X5R0J105K
TDK
C8
2
Ceramic Chip
Capacitor, 50 V
1n
±10%
0603
C1608C0G1H102J
TDK
C9, C20-21
3
Ceramic Chip
Capacitor, 16 V
0.1 m
±10%
0603
C1608X7R1C104K
TDK
C10
1
Ceramic Chip
Capacitor, 50 V
120 p
±10%
0603
VJ0603A121JXACW1BC
Vishay
C11-C13
3
Aluminum
Electrolytic
220 mF
±20%
HA0
EMZA250ADA221MHA0G
United Chemicon
C14-16,
C19
4
Ceramic Chip
Capacitor, 6.3 V
10 mF
±10%
0805
C2012X5R0J106M
TDK
C17-18
2
Ceramic Chip
Capacitor, 16 V
10 mF
±10%
1206
C3216X5R0J106K
TDK
U1
1
Dual, 2A Buck
Converter
-
-
QFN32,
5x5x1
NCP3120MNTXG
ON Semiconductor
D1-2
2
Schottky Power
Rectifier
3A
40 V
n/a
SMA
MBRA340T3
ON Semiconductor
R1
1
SMT Resistor
47.5 k
±1%
0603
CRCW060347K5FKEA
Vishay
R11
1
SMT Resistor
100
±1%
0603
CRCW0603100RFKEA
Vishay
R12
1
SMT Resistor
6.81 k
±1%
0603
CRCW06036K81FKEA
Vishay
R13-14
2
SMT Resistor
20
±5%
0603
CRCW060320R0JNEA
Vishay
R15
1
SMT Resistor
15
±1%
0603
CRCW060315R0FKEA
Vishay
R2
1
SMT Resistor
15 k
±1%
0603
CRCW060315K0FKEA
Vishay
R3
1
SMT Resistor
68.1 k
±1%
0603
CRCW060368K1FKEA
Vishay
R4
1
SMT Resistor
13 k
±1%
0603
CRCW060313K0FKEA
Vishay
R5
1
SMT Resistor
1k
±1%
0603
CRCW06031K00FKEA
Vishay
R6
1
SMT Resistor
1.69 k
±1%
0603
CRCW06031K69FKEA
Vishay
R7
1
SMT Resistor
316 k
±1%
0603
CRCW0603316KFKEA
Vishay
R8-9
2
SMT Resistor
10 k
±1%
0603
CRCW060310K0FKEA
Vishay
R10
1
SMT Resistor
75 k
±1%
0603
CRCW060375K0FKEA
Vishay
22 mH
±20%
ER
IHLP4040DZER220M11
Vishay
n/a
0.100
Centers
n/a
4 PIN
Connector
1-640445-4
TYCO
L1-2
2
Inductor
EN
FBB1-2
FBT1-2
VINT
VOUT_1-2
VSW1-2
10
GENERIC 2 PIN
SIP HEADER
0.100 CENTERS
VIN
VOUT1-2
3
4 PIN Connector
4
http://onsemi.com
10
AND8323
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800-282-9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81-3-5773-3850
http://onsemi.com
11
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
AND8323/D
Similar pages