APPLICATION NOTE AND9312/D AX5043 0 dBm / 8 mA TX and 9.5 mA RX Configuration for the 868 MHz Band Revision 2 2 Table of Contents 1. Introduction................................................................................................ 3 2. Hardware Configuration .............................................................................. 4 2.1. Summary of Changes vs. standard DVK-2 add-on Modules ................................. 4 2.2. RF Reference Clock ........................................................................................ 4 2.3. Antenna Interface .......................................................................................... 5 3. Software Configuration ............................................................................... 6 4. Performance ............................................................................................... 7 www.onsemi.com AND9312/D Introduction 1. Introduction This application note describes how to use AX5043 to design a 0 dBm / 8 mA transmit and 9.5 mA receive configuration for the 868 MHz band. Both hardware and software configurations are discussed. The configuration targets wide band and category 2 or 3 receiver usage as regulated by ETSI EN 300 220-1 V2.4.1 (2012-05). Performance is given for 50 kbps FSK operation in the 868.0 – 868.6 MHz band. AX5043 has a differential and a single ended power amplifier (PA). To get the highest possible output power the differential PA must be used. 0 dBm output power which is far below the maximum possible output power can be achieved with both PAs. However, using the single ended power amplifier allows 0 dBm output power to be achieved with less power consumption. The differential PA is internally multiplexed with the receive path. The single ended PA is output on a dedicated pin and must be externally connected to the receiver if a single antenna configuration is to be used. A low component count, purely passive configuration to achieve this goal is presented in this application note. www.onsemi.com AND9312/D 3 4 Hardware Configuration 2. Hardware Configuration 2.1. Summary of Changes vs. standard DVK -2 add-on Modules Module AX5043 DVK-2b V1.4 Antenna Interface Use configuration shown in Figure 2 RF Reference Clock 16 MHz XTAL instead of 48 MHz TCXO Direct connection of the XTAL to the device pins CLK16P and CLK16N without TCXO network as shown in Figure 1 Disconnect VAUX (TCXO supply) from J2 to avoid shorting it to GND across the XTAL Table 1 Module changes 2.2. RF Reference Clock 16 MHz XTAL Pin CLK16P Pin CLK16N Figure 1 XTAL configuration www.onsemi.com AX5043ND9312/D Hardware Configuration 2.3. Antenna Interface C1 L1 50 single-ended equipment or antenna L3 ANTP C3 RX ANTN C2 L2 TX L5 ANTP1 C4 L4 Figure 2 Structure of the antenna interface for a single-ended antenna and single ended internal PA, without RX/TX switch Frequency Band L1 [nH] L2 [nH] L3 [nH] L4 [nH] L5 [nH] C1 [pF] C2 [pF] C3 [pF] C4 [pF] 868 MHz 18 7.2 12 12 27 2.7 2.7 10 2.7 Table 2 Component values www.onsemi.com AND9312/D 5 6 Software Configuration 3. Software Configuration For software setup AX-RadioLab for AX5043 V2.2 is used. Table 3 gives the register values that were changed vs. the RadioLab generated configuration. It is recommended to use FSK as modulation, not GFSK, as the shaping logic for the GFSK output consumes additional current and ETSI EN 300 220-1 V2.4.1 (2012-05) wide band regulatory requirements can easily be met with FSK. Register Register Address AX5043_TXPWRCOEFFB1 0x16A 0x16B Output Power 0x02 AX5043_TXPWRCOEFFB0 AX5043_F11 0xF11 XTAL config. 0x84 AX5043_POWCTRL1 0xF08 VDD_ANA AX5043_POWCTRL0 0xF09 VDD_MODEM Parameter Value Value TX RX 0x80 0x02 0x03 0x01 Table 3 Register Settings www.onsemi.com AX5043ND9312/D Performance 4. Performance Measurement equipment TX 0.5 m RG-58 cable from SMA to R&S FSEB spectrum analyzer (note 1) Measurement equipment RX Pair of AX5043 modules with variable attenuation chain and shielding box Mainboard and debug adapter DVK-2b Carrier Frequency 868.3 MHz Bit rate 50 kbps Modulation FSK FSK deviation (fmark-fspace)/2 h=0.667, 16.667 kHz IDD for TX Pout = 0 dBm random data 7.8 mA (note 2) IDD for RX 9.5 mA VDD_IO range with Pout = 0 dBm 1.6 V – 3.6 V -105 dBm (note 3) RX sensitivity Input sensitivity at PER = 1% for 868 MHz operation, 144 bit packet data, without FEC ETSI EN 300 220-1 V2.4.1 (2012-05) TX : wide band operation 868.0 – 868.6 pass RX : class 2 or 3 Table 4 Performance Notes : 1. 0 dBm is the spectrum analyzer reading. Cable losses are not compensated 2. Without RX/TX combination Pout = 0 dBm is achieved with 300 μA less current with the same TX network 3. Without RX/TX combination the sensitivity is 3 dB better www.onsemi.com AND9312/D 7 8 www.onsemi.com AX5043ND9312/D