AMIS-30622 and AMIS-30624 I 2 C Bus Level

AND8449
AMIS-30622 and
AMIS-30624 I2C Bus Level
Shifter
Prepared by: Tom De Ryck
ON Semiconductor
http://onsemi.com
APPLICATION NOTE
Introduction
The I2C bus consists out of two wires called the serial data
(SDA) and serial clock (SCL). Each device connected to the
bus is recognized by a unique address and operates as either
a transmitter or receiver, depending on the function of the
device. AMIS−30622 and AMIS−30624 can both transmit
and receive data but will never initiate data transfer. This is
why AMIS−30622 and AMIS−30624 are called slave
devices.
Figure 1 gives an example of how four stepper motor
drivers can be controlled by using the I2C bus.
AMIS−30622 and AMIS−30624 uses a simple
bi−directional 2−wire bus for efficient inter−IC control. This
bus is called the Inter Integrated Circuit bus or I2C bus. The
bus voltage of AMIS−30622 and AMIS−30624 is 5 V.
Because the I2C bus specification does not specify the bus
voltage, it’s possible that the master controlling
AMIS−30622 and/or AMIS−30624 operates at another bus
voltage making direct communication impossible.
This application note describes how communication
between a master and AMIS−30622 or AMIS−30624 can be
done when the master does not use a 5 V I2C bus.
Motor Driver
AMIS−30622 or
AMIS−30624
(slave)
Microcontroller
(master)
Motor Driver
AMIS−30622 or
AMIS−30624
(slave)
SDA
SCL
Motor Driver
AMIS−30622 or
AMIS−30624
(slave)
Motor Driver
AMIS−30622 or
AMIS−30624
(slave)
Figure 1. Example of an I2C Bus Configuration Using Four Stepper Motor Drivers (Note 1)
The master initiates the data transfer and determines the
speed of the communication (master generates clock signal).
Although in Figure 1 only one master is displayed, the I2C
bus specification states that more than one master can be
connected to the same I2C bus. This means that more than
one master could try to initiate data transfer at the same time.
To avoid chaos, an arbitration procedure is used that relies
on the wired−AND connection of all I2C interfaces to the
I2C bus. For this the output stages of the devices connected
to the I2C bus have an open−collector or open−drain output
as displayed in Figure 2.
1. Master contains necessary I2C bus pull−up resistors
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December, 2009 − Rev. 0
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Publication Order Number:
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AND8449
+5 V
Rp
Rp
Serial Data Line
Serial Clock Line
SCK
SDA
2
Clock IN
Clock OUT
SCL
SDA
1
Data IN
Clock IN
Data OUT
Data IN
Clock OUT
AMIS−30624
Data OUT
MASTER
Figure 2. Connection to the I2C Bus
More information about the I2C bus can be found in the
AMIS−30622 and AMIS−30624 datasheet (Ref. 1) or the
I2C bus specification (Ref. 5).
Although this is the simplest solution, it will in most cases
not be the cheapest solution.
Problem Description
As can be read in the AMIS−30622 and AMIS−30624
datasheet, a high level on the I2C bus should minimum be 0.7
x VDD. In worst case scenario, VDD will be 5.5 V resulting
in a minimum high level on the I2C bus of 3.85 V.
If the bus−lines are pulled up to 5 V (as displayed in
Figure 2), a high level on the I2C bus lines will be higher
than 3.85 V making communication possible. If a 3.3 V
microcontroller is used, the I2C bus lines will be pulled up
to 3.3 V. This will result in a too low logic ‘1’ signal on the
bus making communication with AMIS−30622 or
AMIS−30624 impossible.
Every bus line has the same level shifter which consists
out of a single discrete N−channel enhancement MOSFET.
The gate of the MOSFET has to be connected with the
lowest supply voltage, the source with the bus line of the
lower voltage section and the drain with the bus line of the
higher voltage level.
Figure 3 gives an application example by using a Dual
N−Channel
MOSFET
NTMD4840
from
ON Semiconductor. A 3.3 V microcontroller is connected
with AMIS−30622 or AMIS−30624. For this a 3.3 V and a
5 V voltage regulator (Note 2) are needed (U2 and U3). The
3.3 V voltage regulator is needed to power the
microcontroller and for the pull−up resistors of the 3.3 V I2C
bus. The 5 V voltage regulator is needed for the 5 V I2C bus
pull−up resistors (Note 3).
Depending on the required I2C speed, pull−ups of 1 kW to
10 kW (R2 ... R5) are needed.
Although this is a simple I2C bus level shifter, it has no
low stand−by power mode or can not be disabled. For high
speed applications, low pull−up resistors are required
resulting in more power consumption.
Discrete MOSFET Level Shifter
Solutions
Several solutions are possible.
5 V Tolerant IO’s
The simplest solution is to use a 3.3 V master
(microcontroller) with 5 V tolerant IOs. In this way the I2C
bus lines can be pulled up to 5 V (similar like when a 5 V
master is used) making communication between the master
and motor driver possible without destroying the master.
2. In this application example a linear voltage regulator is chosen. Another voltage regulator could also be used.
3. The VDD pin of AMIS−30622 and AMIS−30624 can deliver maximum 10 mA. Because of this the VDD pin may never be used for the 5 V
I2C bus pull−up resistors. It can however be used as a reference for a voltage follower.
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AND8449
+24V
10
9
SDA
T2
S
SCK
D
R1
G
HW
AMIS−30622
or
AMIS−30624
1
16
2
15
8
13
U5
5
TST1
U4
GND
20
18
D
G
19
6
4
14
7
SWI
MOTXP
MOTXN
MOTYP
M
MOTYN
17
U1
GND
S
12
R2
T1
SCL_3
Microcontroller
R3
11
GND
NTMD4840
SDA_3
C6
3
TST2
Vcc
C2
R4
C5
VBB
C7
GND
VDD
R5
C4
VBB
C8
5V
GND
C9
GND
C3
OUT
VCP
3.3V
IN
GND
C10
OUT
CPN
IN
C1
U2
CPP
U3
Figure 3. Application Example with Discrete Level Shifter
Standard I2C Bus Level Translator
ON Semiconductor NLSX4373 2−bit level translator also
has integrated 10 kW pull−up resistors making it an ideal (1
component) solution for an I2C bus level shifter.
Standard I2C bus level translator are available that allow
bidirectional voltage translation making communication
between a 3.3 V master and the motor driver possible. The
+24V
C1
+12V
9
C2
C11
3
4
12
19
3
20
18
SDA
7
SCK
6
HW
5
U5
AMIS−30622
or
AMIS−30624
1
16
2
15
8
13
R1
5
R2
TST1
U4
11
6
4
7
14
SWI
MOTXP
MOTXN
MOTYP
M
MOTYN
17
GND
SCL_3
2
10
8
NLSX4373
Microcontroller
GND
VDD
GND
Vcc
C12
SDA_3
C6
VBB
C7
GND
1
C5
VBB
C8
C4
GND
C9
C3
OUT
5V
VCP
IN
GND
GND
OUT
CPP
C10
3.3V
TST2
IN
U2
CPN
U3
U1
Figure 4. Application Example with 2−bit Level Translator
A high level of 3.3 V placed on the bus by the master will
be translated to a high level of 5 V by the I2C bus level
shifter. In the opposite direction, a high level of 5 V placed
on the bus by the motor driver will be translated to a high
level of 3.3 V. In this way, communication between two I2C
busses with different voltage levels is possible.
The VDD pin of stepper motor driver U1 is connected
with the EN pin of the level translator U5. When VBB
(+24 V) gets disconnected the microcontroller is still
powered as also the I2C bus (in this example). Pin 5 of the
level translator U5 will be pulled low and the IO’s of the level
translator U5 are put in high impedance (Note 4).
4. Advised value for R2 is 1 MW.
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AND8449
The yellow and blue curve is the I2C communication at the
motor driver side (5 V level). Notice that the measurement
is done at maximum I2C speed.
Figure 5 displays the signals from the application
example given in Figure 4. The purple and green curve is the
I2C communication at the microcontroller side (3.3 V level).
Figure 5. I2C Level Shifter Measurement
IMPORTANT REMARK
Important to know is that the I2C level shifter has to be
bidirectional for SCK and SDA! SDA is logical because
AMIS−30622 and AMIS−30624 needs to acknowledge
every data transmission. SCK also needs to be bidirectional
because AMIS−30622 and AMIS−30624 can hold the clock
line low between two bytes (called clock stretching, see I2C
specification). Using a simple 5 V buffer with a 3.3 V
compliant input as level shifter for the clock line can result
in a non−working I2C communication.
2. NLSX4373, 2−bit 20 Mb/s Dual−Supply Level
Translator datasheet, www.onsemi.com
3. NTMD4840, Dual N−Channel MOSFET
datasheet, www.onsemi.com
4. Application Note AND8336, Design Examples of
On Board Dual Supply Voltage Logic Translators,
www.onsemi.com
5. UM10204, I2C Bus Specification and User
Manual, Rev. 03, 19 June 2007, www.nxp.com
6. Application Note AN10441, Level Shifting
Techniques in I2C Bus Design, www.nxp.com
References
1. AMIS−30622 and AMIS−30624 Stepper Motor
Driver datasheet, www.onsemi.com
http://onsemi.com
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AND8449
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