LV8136V Bi-CMOS IC Brushless Motor Drive http://onsemi.com Direct PWM Drive, Quiet Predriver IC Application Note Overview The LV8136V is a PWM system pre-driver IC designed for three-phase brushless motors. This IC reduces motor driving noise by using a high-efficiency, quiet PWM drive (150-degree drive system). It incorporates a full complement of protection circuits and, by combining it with a hybrid IC in the STK611 or STK5C4 series, the number of components used can be reduced and a high level of reliability can be achieved. Furthermore, its power-saving mode enables the power consumption in the standby mode to be reduced to zero. This IC is optimally suited for driving various large-size motors such as those used in air conditioners and hot-water heaters. Function Three-phase bipolar drive Quiet PWM drive Supports drive phase control (15-degree lead angle for 150-degree current-carrying drive. From this state, a lead angle from 0 to 28 degrees can be set in 16 steps) Supports power saving mode (power saving mode at CTL pin voltage of 1.0V (typ) or less; ICC = 0mA, HB pin turned off) Supports bootstrap (maximum duty limit) Automatic recovery type constraint protection circuit Forward/reverse switching circuit, Hall bias pin Current limiter circuit, low-voltage protection circuit, and thermal shutdown protection circuit FG1 and FG3 output (360-degree electrical angle/1 pulse and 3 pulses) Pin Assignment Package Dimensions unit : mm (typ) 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 9.75 30 3 4 5 6 7 8 9 10 11 12 13 14 15 5.6 2 7.6 1 0.5 Top View 1 0.65 0.15 0.22 1.5 MAX (1.3) (0.33) which is not a guaranteed value. 0.1 Caution: The package dimension is a reference value, SANYO : SSOP30(275mil) 1/36 Semiconductor Components Industries, LLC, 2013 December, 2013 LV8136V Application Note Recommended Soldering Footprint (Unit:mm) Reference symbol SSOP30(275mil) eE 7.00 e 0.65 b3 0.32 l1 1.00 Block Diagram 2/36 LV8136V Application Note Specifications Absolute Maximum Ratings at Ta = 25C Parameter Symbol Conditions Ratings Unit Supply voltage VCC max VCC pin 18 Output current IO max V 15 mA Allowable power dissipation Pd max1 Independent IC 0.45 W Pd max2 Mounted on a specified circuit board.* 1.05 W CTL pin applied voltage VCTL max 18 V FG1,FG3 pin applied voltage VFG1 max 18 V Junction temperature VFG3 max Tj max 150 C Operating temperature Topr -40 to +105 C Storage temperature Tstg -55 to +150 C * Specified circuit board : 114.3mm 76.1mm 1.6mm, glass epoxy Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Recommended Operating Conditions at Ta 25C Parameter Symbol Supply voltage range VCC 5V constant voltage output IREG Conditions Ratings min typ Unit max 9.5 16.5 10 V mA current HB pin output current IHB 30 mA FG1,FG3 pin output current IFG1, IFG3 10 mA Electrical Characteristics at Ta 25C, VCC = 15V Parameter Symbol Conditions Supply current 1 ICC1 Supply current 2 ICC2 At stop CTL 1.0V typ High level output voltage VHO IO = -10mA Low level output voltage VLO RONL IO = 10mA Ratings min typ Unit max 5.0 8.0 mA 0 20 A 0.3 V Output Block Lower output ON resistance Upper output ON resistance VREG-0.35 VREG-0.15 0.15 V IO = 10mA 15 30 IO = -10mA 15 35 10 A Output leakage current RONH IOleak Minimum output pulse width Tmin 2.0 4.0 s Output minimum dead time Tdt 2.0 4.0 s 5V Constant Voltage Output Output voltage VREG Voltage fluctuation V (REG1) Load fluctuation V (REG2) IO = -5mA VCC = 9.5 to 16.5V, IO = -5mA IO = -5 to -10mA 4.7 5.0 5.3 V 100 mV 100 mV A Hall Amplifier Input bias current IB (HA) -2 0 Common-mode input voltage range 1 VICM1 When a Hall element is used 0.3 VREG-1.7 V Common-mode input voltage range 2 VICM2 Single-sided input bias mode 0 VREG V Hall input sensitivity VHIN Sine wave, (when a Hall IC is used) 80 mVp-p Hall element offset = 0V Input voltage Low High VIN (HA) VSLH Input voltage High Low VSHL Hysteresis width 9 20 40 mV 5 11 19 mV -19 -11 -5 mV Continued on next page 3/36 LV8136V Application Note Continued from preceding page. Parameter Symbol Conditions Ratings min typ Unit max CSD Oscillator Circuit High level output voltage VOH (CSD) Low level output voltage VOL (CSD) Amplitude V (CSD) External capacitor charging current ICHG1 (CSD) External capacitor discharging 2.7 3.0 3.3 V 0.8 1.0 1.2 V 1.75 2.0 2.25 Vp-p VCHG1 = 2.0V -17 -10 -4 A ICHG2 (CSD) VCHG2 = 2.0V 4 10 17 A f (CSD) C = 0.22F (design target value) current Oscillation frequency 113.6 Hz PWM Oscillator (PWM pin) High level output voltage VOH (PWM) 3.3 3.5 3.8 Low level output voltage VOL (PWM) 1.3 1.5 1.7 V Amplitude V (PWM) 1.78 2.0 2.22 Vp-p Oscillation frequency f (PWM) C = 2200pF, R = 15k 17 V kHz (design target value) Current Limiter Operation Limiter voltage VRF 0.225 0.25 0.275 V 150 175 C 35 C Thermal Shutdown Protection Operation Thermal shutdown protection TSD operating temperature Hysteresis width * Design target value (junction temperature) TSD * Design target value (junction temperature) TH pin Protection start voltage VTH Hysteresis width VTH 0.25 0.6 1.05 V 0.2 0.4 0.6 V HB pin Output ON resistance RON (HB) IHB = 10mA Output leakage current IL (HB) Power saving mode VCC = 15V 15 30 10 A Low Voltage Protection Circuit (detecting VCC voltage) Operation voltage VSD Hysteresis width VSD 7.0 8.0 9.0 V 0.25 0.5 0.75 V 40 60 10 A VCC V FG1 FG3 Pin Output ON resistance RON (FG) IFG = 5mA Output leakage current IL (FG) VFG = 18V CTL Amplifier (drive mode) Input voltage range VIN (CTL) High level input voltage VIH (CTL) PWM ON duty 90% 5.1 0 5.4 5.7 V Middle level input voltage VIM (CTLI) PWM ON duty 0% 1.8 2.1 2.4 V Low level input voltage VIL1 (CTL) Power saving mode 1.0 1.5 V Hysteresis width CTL 0.15 0.5 0.85 V Input current IIH (CTLI) 10 18 26 A CTL Amplifier (power saving mode) CTL = 3.5V F/R Pin High level input voltage VIH (FR) 3.0 VREG V Low level input voltage VIL (FR) 0 0.7 V Input open voltage VIO (FR) Hysteresis width VIS (FR) High level input current IIH (FR) VF/R = VREG Low level input current IIL (FR) VF/R = 0V 0 0.3 V 0.21 0.31 0.41 V 10 50 100 A 0 +10 A -10 Continued on next page. 4/36 LV8136V Application Note Continued from preceding page. Parameter Symbol Conditions Ratings min typ Unit max FAULT Pin Drive stop voltage VFOF 0 0.35 V Drive start voltage VFON 3.0 VREG V Input open voltage VIO (FLT) 4.6 VREG High level input current IIH (FLT) VFLT=VREG 0 10 A Low level input current IIL (FLT) VFLT=0V -250 -160 -70 A 0 2 26 28 V ADP1 Pin (drive phase adjustment) Minimum lead angle Vadp01 ADP1 pin = 0V Maximum lead angle Vadp16 ADP1 pin = VREG Deg Current ratio with the ADP2 pin ADP CTL = 3.75V, IADP1/IADP2 1.45 2 2.55 A/A 1.95 2.5 3.05 V 0.51 V Deg current ADP2 Pin (drive phase adjustment) High level output voltage VADP2H CTL = 5.4V Low level output voltage VADP2L CTL = 0V 0 DPL Pin (drive-phase-adjustment limit setting pin) Lead angle limit high level voltage VDPLH 3.3 3.5 3.8 V Lead angle limit low level voltage VDPLL 1.3 1.5 1.7 V * These are design target values and no measurements are made. 5/36 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 HIN1L(V) ICC(mA) LV8136V Application Note 0 5 10 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 15 0.02 0.025 0.03 5.4 5.2 VREG5 (V) HIN1H(V) 5 4.8 4.6 -0.02 -0.01 9.5 0 11 12.5 14 15.5 VCC (V) Figure 4. VREG5 Output Voltage vs VCC Voltage [VREG,deltaV(REG1)] 15 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 10 5 ICSD(uA) LIN1(V) 0.015 Figure 2. HIN1 Pin Low-side Output Voltage vs HIN 1Pin Current [RON(L1)] HIN1 (A) Figure 3. HIN1 Pin High-side Output Voltage vs HIN 1Pin Current [RON(H1)] 0 -5 0 1 2 3 4 -10 -15 1.75 1.77 1.79 1.81 1.83 1.85 VCSD (V) Figure 6. ICSD Output Curent vs CSD Pin Input Voltage [VOH(CSD),VOL(CSD),VCSD,ICHG1(CSD),IC HG2(CSD)] VIN1+ (V) Figure 5. LIN1 Pin Output Voltage vs IN1+ Pin Voltage (IN1-=1.8V) [deltaVIN(HA)] 0.0 -0.1 0 1 2 3 4 5 -0.2 -0.3 VHIN3(V) ICPWM (uA) 0.01 HIN1 (A) VCC (V) Figure 1. ICC Current Drain vs VCC Voltage [ICC1] 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 -0.03 0.005 -0.4 -0.5 -0.6 -0.7 VCPWM(V) Figure 7. CPWM Pin Current vs CPWM Pin Input Voltage [VOH(PWM),VOL(PWM),V(PWM)] 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 0.1 0.2 0.3 VRF (V) Figure 8. HIN3 Pin Output Voltage vs RF Pin Input Voltage [VRF] 6/36 LV8136V Application Note 0 16 14 VHB (V) VLIN2 (V) 1 2 3 12 10 8 6 4 4 2 5 0 0.5 1 0 -0.1 1.5 -0.08 -0.06 VTH(V) 7 6 5 LIN2(V) IHB (nA) 0 Figure 10. HB Pin Output Voltage vs HB Pin Sink Current [RON(HB)] 8 4 3 2 1 0 5 -0.02 IHB (A) Figure 9. LIN2 Pin Output Voltage vs TH Pin Input Voltage [VTH,deltaVTH] 0 -0.04 10 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 15 7 7.5 8 IHB (A) 8.5 9 VCC (V) Figure 11. HB Pin Output Voltage vs HB Pin Leak Current [IL(HB)] Figure 12. LIN2 Pin Output Voltage vs VCC Voltage [VSD,deltaVSD] 16 1.2 14 1.0 12 VHB(V) VFG(V) 0.8 0.6 0.4 10 8 6 4 0.2 2 0.0 0 0 0.005 0.01 0.015 0.02 0 5 Figure 14. HB Pin Output Voltage vs CTL Voltage [VIL1(CTL))] Figure 13. FG Pin Sink Cuｒrent vs FG Pin Voltage [RON(FG)] 140 100 LIN3(V) ICTL(uA) 120 80 60 40 20 0 5 15 VCTL (V) IFG(A) 0 10 10 VCTL (V) Figure 15. CTL Pin Input Voltage vs CTL Voltage [IIH(CTL)] 15 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 1 1.2 1.4 1.6 1.8 2 VFR (V) Figure 16. LIN3 Pin Output Voltage vs FR Pin Voltage [VIS(FR)] 7/36 50 45 40 35 30 25 20 15 10 5 0 LIN2(V) IFR(uA) LV8136V Application Note 0 1 2 3 4 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 5 0 1 VFR (V) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 5 10 15 VCTL (V) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 5 10 15 VCTL (V) Figure 19. ADP1 Pin Output Voltage vs CTL Pin Voltage ADP1(V) 3 Figure 18. LIN2 Pin Output Voltage vs FAULT Pin Voltage [VFOF,VFON] ADP2(V) ADP1(V) Figure 17. FR Pin Input Current vs FR Pin Voltage [IIH(FR),IIL(FR)] 0 2 VFAULT (V) Figure 20. ADP2 Pin Output Voltage vs CTL Pin Voltage 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 1 2 3 4 VDPL (V) Figure 21. ADP1 Pin Output Voltage vs DPL Pin Voltage 8/36 LV8136V Application Note Sample Application Circuit 1 (Hall element, HIC) 9/36 LV8136V Application Note Sample Application Circuit 2 (Hall IC, HIC) Note: The Hall IC to be used must be of open collector or open drain type (no internal pull-up resistor connected to the output). 10/36 LV8136V Application Note Sample Application Circuit 3 (Hall element, FET) 8 7 6 5 8 7 6 5 8 7 6 5 1 2 3 4 1 2 3 4 1 2 3 4 11/36 LV8136V Application Note Sample Application Circuit 4 (Hall IC, FET) Note: The Hall IC to be used must be of open collector or open drain type (no internal pull-up resistor connected to the output). 12/36 LV8136V Application Note Pin Functions Pin No. 1 2 3 4 5 6 Pin Name IN1+ IN1IN2+ IN2IN3+ IN3- Pin function Equivalent Circuit Hall signal input pins. The high state is when IN+ is greater than IN-, and the low state is the reverse. An amplitude of at least 100mVp-p (differential) is desirable for the Hall signal inputs. If noise on the Hall signals is a problem, insert capacitors between IN+ and IN- pins. If input is provided from a Hall IC, the common-mode input range can be expanded by biasing either + or -. 7 GND Ground pin of the control circuit block. 8 VCC Power supply pin for control. Insert a capacitor between this pin and ground to prevent the influence of noise, etc. 9 CTL Control input pin. When CTL pin voltage rises, the IC changes the output signal PWM duty to increase the torque output. 10 DPL Setting pin for drive phase adjustment limit. This pin is used to limit the lead angle of the drive phase. The lead angle is limited to zero degrees when the voltage is 1.5V or lower and the limit is released when the voltage is 3.5V or higher. 11 FG3 FG3 : 3-Hall FG signal output pin. 12 FG1 8-pole motor outputs 12 FG pulses per one rotation. In power saving mode, high-level is output. FG1 :1-Hall FG signal output pin. 8-pole motor outputs 4 pulses per one rotation. In power saving mode, high-level is output. Continued on next page. 13/36 LV8136V Application Note Continued from preceding page. Pin No. 13 Pin Name ADP2 Pin function Equivalent Circuit Setting pin for phase drive correction. This pin sets the amount of correction made to the lead angle according to the CTL input. Insert a resistor between this pin and ground to adjust the amount of correction. 14 CSD Pin to set the operating time of the motor constraint protection circuit. Insert a capacitor between this pin and ground. This pin must be connected to ground if the constraint protection circuit is not used. 15 ADP1 Drive phase adjustment pin. The drive phase can be advanced from 0 to 28 degrees during 150-degree current carrying drive. The lead angle becomes 0 degrees when 0V is input and 28 degrees when 5V is input. 16 CPWM Triangle wave oscillation pin for PWM generation. Insert a capacitor between this pin and ground and a resistor between this pin and RPWM for triangle wave oscillation. Continued on next page. 14/36 LV8136V Application Note Continued from preceding page. Pin No. 17 Pin Name RPWM Pin function Equivalent Circuit Oscillation pin for PWM generation. Insert a resistor between this pin and CPWM. 18 FR FR 20 TGND Forward/reverse rotation setting pin. A low-level specifies forward rotation and a high-level specifies reverse rotation. This pin is held low when open. TGND Test pin. Connect this pin to ground. 19 VREG5 5V regulator output pin (control circuit power supply). Insert a capacitor between this pin and ground for power stabilization. 0.1F or so is desirable. 21 RF Output current detection pin. This pin is used to detect the voltage across the current detection resistor (Rf). The maximum output current is determined by the equation IOUT = 0.25V/Rf. Continued on next page. 15/36 LV8136V Application Note Continued from preceding page. Pin No. 22 Pin Name TH Pin function Equivalent Circuit Thermistor connection pin. The thermistor detects heat generated from HIC and turns off the drive output when an overheat condition occurs. If the pin voltage is 0.6V or lower, the drive output is turned off. 23 FAULT HIC protection signal input pin. This pin accepts an error mode detection signal generated by the HIC side. A low-level indicates that an error mode is detected and turns off the drive output. 24 LIN3 LIN1, LIN2, and LIN3 : 25 LIN2 L-side output pins. 26 LIN1 Generate 0 to VREG5 push-pull 27 HIN3 outputs. 28 HIN2 29 HIN1 HIN1, HIN2, and HIN3 : H-side output pins. Generate 0 to VREG5 push-pull outputs. 30 HB Hall bias HIC power supply pin. Insert a capacitor between this pin and ground. This pin is set to high-impedance state in power saving mode. By supplying Hall bias and HIC power using this pin, the power consumption by Hall bias and HIC in power saving mode can be reduced to zero. 16/36 LV8136V Application Note Timing Chart (IN = “H” indicates the state in which IN+ is greater than IN-.) (1) F/R pin = L Normal hall input LA=0 IN1+ IN1- IN2+ IN2- IN3+ IN3- IN1 IN2 IN3 H L H H L L H H L L H L L H H L L H H L H H L L H H L L H L L H H L L H F/R=”L” 120° energization HIN1 ON UOUT PWM OFF PWM LIN1 ON HIN2 ON VOUT OFF PWM PWM PWM LIN2 ON HIN3 ON WOUT PWM OFF PWM LIN3 ON F/R=”L” 150° energization HIN1 ON UOUT OFF PWM PWM ON ON PWM PWM SOFF PWM SOFF ON ON PWM SOFF SOFF LIN1 ON HIN2 ON ON VOUT PWM PWM SOFF OFF PWM ON ON PWM PWM SOFF PWM SOFF ON SOFF LIN2 ON HIN3 ON WOUT PWM ON PWM PWM SOFF OFF PWM SOFF ON ON PWM SOFF PWM SOFF ON SOFF LIN3 ON F/R=”H” 120° energization in reverse rotate HIN1 ON UOUT OFF PWM PWM LIN1 ON HIN2 ON VOUT OFF PWM PWM LIN2 ON HIN3 ON WOUT OFF PWM PWM LIN3 ON 3 HALL FG 1 HALL FG The energization is switched to 120° when 3 Hall FG frequency is 6.1Hz (TYP) or lower A direction of rotation is detected from Hall signal according to F/R pin input. If the motor rotates in reverse against F/R pin input, 120° energization is maintained forcibly. 17/36 LV8136V Application Note (2) F/R pin = H Reverse hall input LA=0 IN1+ IN1- IN2+ IN2- IN3+ IN3- IN1 IN2 IN3 L L H L H H L H L H H L H L L L H H L L H H L H L H L H H L H L L H L H F/R=”H” 120° energization HIN1 ON UOUT PWM PWM OFF LIN1 ON HIN2 ON VOUT PWM PWM OFF LIN2 ON HIN3 ON WOUT PWM OFF PWM LIN3 ON F/R=”H” 150° energization HIN1 ON PWM SOFF UOUT OFF PWM LIN1 ON ON ON PWM PWM SOFF PWM SOFF ON ON PWM SOFF SOFF HIN2 ON VOUT PWM ON ON PWM PWM SOFF OFF PWM SOFF ON ON PWM SOFF PWM SOFF ON LIN2 ON HIN3 ON WOUT PWM ON PWM PWM SOFF OFF PWM ON ON PWM SOFF PWM SOFF ON SOFF LIN3 ON F/R=”L” 120° energization in reverse rotate HIN1 ON UOUT PWM OFF PWM LIN1 ON HIN2 ON VOUT OFF PWM PWM PWM LIN2 ON HIN3 ON WOUT OFF PWM PWM LIN3 ON 3 HALL FG 1 HALL FG The energization is switched to 120° when 3 Hall FG frequency is 6.1Hz (TYP) or lower A direction of rotation is detected from Hall signal according to F/R pin input. If the motor rotates in reverse against F/R pin input, 120° energization is maintained forcibly. 18/36 LV8136V Application Note Functional Description Basic operation of 120-degree 150-degree current-carrying switching At startup, this IC starts at 120-degree current-carrying. The current-carrying is switched to 150 degrees when the 3-Hall FG frequency is 6.1Hz (typ) or above and the rising edge of the IN2 signal has been detected twice in succession. Concerning the Hall signal input sequence This IC controls the motor rotation direction commands and Hall signal input sequence in order to set the lead angle. If the motor rotation direction commands and Hall signal input sequence do not conform to what is shown on the timing chart, the motor is driven by 120-degree current-carrying. Example 1: When the Hall signal has been input with the following logic IN1 IN2 IN3 H L H H L L H H L L H L L H H L L H When F/R pin input is high 120-degree current-carrying When F/R pin input is low 150-degree current-carrying Example 2: When the Hall signal has been input with the following logic IN1 IN2 IN3 H L H L L H L H H L H L H H L H L L When F/R pin input is high 150-degree current-carrying When F/R pin input is low 120-degree current-carrying CTL pin input a) Power-saving mode VCTL VIL (1.0V: typ) When the CTL pin voltage is lower than VIL (1.0V: typ), the IC enters the power-saving mode, and the following are set: LIN1 to LIN3 and HIN1 to HIN3 outputs all set to low ICC = 0, HB pin = OFF The power consumption of the IC can now be set to 0, and the power consumption of the Hall element connected to the HB pin and the output block can also be set to 0. b) Standby mode VIL VCTL VIM (2.1V: typ) When the CTL pin voltage is VIL VCTL VIM, the IC enters the standby mode. Low is output for the UIN1 to UIN3 outputs and bootstrap charge pulses (2s pulse width: design target) are output to the LIN1 to LIN3 outputs to prepare for drive start. c) Drive mode VIM VCTL VIH (5.4V: typ) When the CTL pin voltage is VIM < VCTL < VIH, the IC enters the drive mode, and the motor is driven at the PWM duty ratio corresponding to VCTL. When VCTL is increased, the PWM duty ratio increases, and the maximum duty ratio (*90%: typ) is reached at VIH. * When the PWM oscillation frequency setting is 17kHz. d) Test mode 8V VCTL VCTL max (design target) When the CTL pin voltage is 8V or higher, the IC enters the test mode, and the motor is driven at the 120-degree current-carrying and maximum duty ratio. The CTL pin is pulled down by 190k : typ inside the IC. Caution is required when the control input voltage input is subjected to resistance division, for example. Bootstrap capacitor initial charging mode 19/36 LV8136V Application Note When the mode is switched from the power-saving mode to the standby mode and then to the drive mode, the IC enters the bootstrap capacitor charging mode (UH, VH, WH pins = L UL, VL, WL pins = H 3.84ms typ) in order to charge the bootstrap capacitor. Drive phase adjustment During 150-degree current-carrying drive, current-carrying is started from the phase that is 15 degrees ahead of the 120-degree current-carrying. From this state, any lead angle from 0 to 28 degrees can be set using the ADP1 pin voltage (lead angle control). This setting can be adjusted in 16 steps (in 1.875-degree increments) from 0 to 28 degrees using the ADP1 pin voltage, and it is updated every Hall signal cycle (it is sampled at the rising edge of the IN3 input and updated at its falling edge). A number of lead angle adjustments proportionate to the CTL pin voltage can be undertaken by adjusting the resistance levels of resistors connected to the ADP1 pin, ADP2 pin and DPL pin. When these pins are not going to be used, reference must be made to section 4.5, and the pins must not be used in the open status. Furthermore, a resistance of 47k or more must be used for the resistor (RADP2) that is connected to the ADP2 pin. 1. The slopes of VCTL and VADP1 can be adjusted by setting the resistance level of the resistor (RADP1) connected to ADP1 (pin 15). 2. The ADP2 pin rise can be halted (a limit on the lead angle adjustment can be set by means of the CTL voltage) by setting DPL (pin 10). 3. The offset and slope can be adjusted as desired by setting RADP1 and RADP12 of ADP1 (pin 15). (It is also possible to set a limit on the lead angle adjustment by means of the CTL voltage by setting DPL.) 20/36 LV8136V Application Note 4. When the lead angle is not adjusted ADP1 pin: shorted to ground; ADP2 pin and DPL pin: pulled down to ground using the resistors 5. When the lead angle is not adjusted by means of the CTL pin voltage (for use with a fixed lead angle) ADP1 pin: lead angle setting by resistance division from VREG; ADP2 pin and DPL pin: pulled down to ground by the resistors 21/36 LV8136V Application Note Description of LV8136V 1. Current Limiter Circuit The current limiter circuit limits the output current peak value to a level determined by the equation I = VRF/Rf (where VRF = 0.25V typ, Rf is the value of the current detection resistor). The current limiter operates by reducing the output on duty to suppress the current. The current limiter circuit detects the reverse recovery current of the diode due to PWM operation. To assure that the current limiting function does not malfunction, its operation has a delay of approx. 1s. If the motor coils have a low resistance or a low inductance, current fluctuation at startup (when there is no back electromotive force in the motor) will be rapid. The delay in this circuit means that at such times the current limiter circuit may operate at a point well above the set current. Application must take this increase in the current due to the delay into account when the current limiter value is set. 2. Power Saving Circuit (CTL pin) This IC goes into the power saving mode that stops operation of all the circuits to reduce the power consumption. If the HB pin is used for the Hall element bias and the output block, the current consumption in the power-saving mode is zero. 3. Hall Input Signal Signals with an amplitude in excess of the hysteresis is required for the Hall inputs. However, considering the influence of noise and phase displacement, an amplitude of over 100mV is desirable. If noise disrupts the output waveform (at phase change), this must be prevented by inserting capacitors or other devices across the Hall inputs. The constraint protection circuit uses the Hall inputs to discriminate the motor constraint state. Although the circuit is designed to tolerate a certain amount of noise, care is required. If all three phases of the Hall input signal go to the same input state (HHH or LLL), the outputs are all set to the off state. If the outputs from a Hall IC are used, fixing one side of the inputs (either the + or –side) at a voltage within the common-mode input voltage range (0.3V to VREG-1.7V) allows the other input side to be used as an input over the 0V to VREG range. 4. Constraint Protection Circuit This IC goes into the power saving mode that stops operation of all the circuits to reduce the power consumption. If the HB pin is used for the Hall element bias and the output block, the current consumption in the power-saving mode is zero. This IC provides an on-chip constraint protection circuit to protect the IC itself and the motor when the motor is constrained. If the Hall input signals do not change for over a fixed period when the motor is in operation, this circuit operates. Also, the upper-side output transistor is turned off while the constraint protection circuit is operating. This time is determined by the capacitance of the capacitor connected to the CSD pin. Set time (in seconds) 90 × C (F) If a 0.022F capacitor is used, the protection time will be about 2.0 seconds. The set time must be selected to have an adequate margin with respect to the motor startup time Conditions to clear the constraint protection state : CTL pin when a low-level voltage is input Release protection and reset count When TSD protection is detected Stop count 5. Power Supply Stabilization Since this IC adopts a switching drive technique, the power-supply line level can be disrupted easily. Thus capacitors large enough to stabilize the power supply voltage must be inserted between the VCC pins and ground. If the electrolytic capacitors cannot be connected close to their corresponding pins, ceramic capacitors of about 0.1F must be connected near these pins. If diodes are inserted in the power-supply line to prevent destruction of the device when the power supply is connected with reverse polarity, the power supply line levels will be even more easily disrupted, and even larger capacitors must be used. 22/36 LV8136V Application Note 6. VREG Stabilization A capacitor of at least 0.1F must be used to stabilize the VREG voltage, which is the control circuit power supply. The ground lead of that capacitor must be located as close as possible to the control system ground (SGND) of the IC. 7. Forward/Reverse Switching (F/R pin) Switching between forward rotation and reverse rotation must not be undertaken while the motor is running. 8. TH Pin The TH pin must normally be pulled up to the 5V regulator for use. When it has been set to low, the outputs of LIN1, LIN2 and LIN3 as well as HIN1, HIN2 and HIN3 are low. 9. FAULT Pin The FAULT pin must normally be pulled up to the 5V regulator for use. When it has been set to low, the outputs of LIN1, LIN2 and LIN3 as well as HIN1, HIN2 and HIN3 are low. 10. PWM Frequency Setting fCPWM 1/ (1.78CR) Components with good temperature characteristics must be used. An oscillation frequency of about 17kHz is obtained when a 2200pF capacitor and 15k resistor are used. If the PWM frequency is too low, switching noise will be heard from the motor; conversely, if it is too high, the output power loss will increase. For this reason, a frequency between 15kHz and 30kHz or so is desirable. The capacitor ground must be connected as close as possible to the control system ground (SGND pin) of the IC to minimize the effects of the outputs. 23/36 LV8136V Application Note Evaluation Board Manual *LV8136V and LV8139JA can be implemented on the same board. （LV8136V and LV8139JA are pin-compatible）. *This board is designed for Hall IC input. *To use Hall element input to this board: Please check the application board circuit for Hall element input. Wire Connection View of Application board Hall IC input Components side Wire Connection View of Application board Motor connection socket FR Switch Connection Image… Image of the motor and application board connection. Motor Motor connection socket Socket pin assignment for motor connection Motorconnectionsocket(forHallICinput) 1.WOUT(Blue) 3.VOUT(Yellow) 5.UOUT(Green) 7.VH+(Red) UOUT,VOUT,WOUT:Motordriveroutput VH+,VH‐:HallICBias HUP,HVP,HWP:HallICsignalinput 8.VH‐ (Black) 10.HWP(White) 12.HVP(Brown) 14.HUP(Gray) 24/36 LV8136V Application Note Oscilloscope CURRENT PROBE AMPLIFIER1 Power supply Power supply PROBE INPUT OUTPUT UOUT Current Power supply UOUT FG3 VOUT WOUT Motor Test Procedure: 1. Connect the test setup as shown above. 2. Connect CTL power supply (0V to VCC) between CTL and GND. First, set to 0V. 3. Connect IC power supply (9.5V to 16.5V) between VCC and GND. First, set to 15V. 4. Connect motor power supply between VM and GND. *Initially, please set a lower voltage than the rated voltage of the VM for safety. (*Maximum voltage of capacitor C20 is 450V. Please use the ones that are sufficient to withstand voltage VM.) For example, in the case of VM=300Vtyp, please start from VM = 100V (approx.). 5. Please increase CTL voltage to 5.4V. 6. Initial check Confirm that the motor rotates smoothly and in the correct direction. Check the some waveforms. Check the UOUT, VOUT, WOUT and 3FG voltage waveform, and the output current waveform of UOUT by the oscilloscope. 25/36 LV8136V Application Note * LV8136V features Current changes smoothly than 120°energization (silent drive) almost sin wave Easier setting than 180°energization Lead angle is adjustable (0 to 28°) ex) Waveforms can vary depend on usage motors. 150°energization waveform (LV8136) 120°energization waveform 3FG 3FG UOUT UOUT UOUT Current UOUT Current *If the UOUT, VOUT and WOUT voltage waveforms show 120 ° energization in the entire CTL voltage range, you may have entered the Hall signal incorrectly. Please change the connection of the Hall signal inputs as described below. The case of Hall IC Input: Please refer to “Evaluation Board Circuit Diagram (Hall IC Input #2) (Page33) The case of Hall Element Input: Evaluation Board Circuit Diagram (Hall Element Input) (Page32) Please change the connection of Hall Sensor from VH+ and VH-. 7. Speed control check You can control rotation of the motor by changing the voltage of “CTL”(9PIN). CTL input voltage ranges from 0 to VCC. Depends on voltage, a mode is switched into 4 types of modes: Power Saving Mode, Standby Mode, Drive Mode, and Test Mode. (Drive Mode: 2.1V≤VCTL≤5.4V (TYP)) * Please refer to development specification for the details of each mode. Power Saving Mode (0V to 1.0V) Power consumption is zero. Standby Mode (1.0V<CTL<2.1) Standby state, yet ready for driving motor. Drive Mode (2.1V<CTL<5.4V) Output PWM DUTY is controllable from 0% to 90%. Test Mode (8V to VCC) 120° energization (Max Duty: fixed to 90%) 8. Forward/Reverse rotation check “F/R” (18PIN) includes switch (SW) to select between VREG5/GND. You can switch between forward/reverse. *Please do not use the switch while the motor is in rotation. 9. Lock detection check (Motor-Lock-mode) Check the Lock detection behavior. (Lock) At each VCC, stop the Motor manually by force. After about 2 seconds, the motor will start rotation automatically. 26/36 LV8136V Application Note *Other Settings 1. Motor lock protection circuit Time is configured according to capacity of the capacitor (C10) connected to “CSD”(14PIN). C=0.022μF (CSD pin) Setting time≈2.0s Setting time (s) ≈90×C (μF) * Connect CSD pin to GND when lock protection is not used. 2. Current limit is adjustable with resistors (R24, R25, R26, R27) connected between “RF”(21PIN) and GND. This circuit limits peak current according to the current which is obtained as follows: I=VRF/Rf (VRF=0.25Vtyp, Rf: current detection resistance). Setting value of the peripheral parts is 2A. 3. PWM frequency is 17kHz. (C12=2200pF, R21=15k) *Make sure to use parts with good temperature characteristics. 4. Drive phase adjustment 150° energization starts from the phase 15° ahead of 120° energization. Moreover, the lead angle of 0 to 28° is configurable with ADP1 pin voltage (lead angle control). Drive phase is adjustable with ADP1 pin voltage from 0 to 28° in 16 steps (with 1.875° increments). Lead angle limit is adjustable with setting of “DPL”(10PIN). The lead angle setting of 0° is “DPL”(10PIN) pull down to GND. For more information, please refer to development specification. LV8136V 150°energization waveform 3FG UOUT UOUT Current Lead angle: 0° Lead angle is adjustable 3FG UOUT UOUT Current Lead angle: +28° 27/36 LV8136V Application Note R25 R24 R26 R27 EvaluationBoardCircuitDiagram (HallICinput) Motor connection socket Note : The Hall IC to be used must be of open collector or open drain type (no internal pull-up resistor connected to the output). 28/36 LV8136V Application Note Bill of Materials for LV8136V Evaluation Board (Hall IC input) Manufacturer Part Number Substitution Allowed Lead Free LV8136V No yes STK5C4-330J-E yes yes MIYAMA MS-611A-A01 yes yes - MAC8 ST-1-3 yes yes - ON Semiconductor MURA260T3G - yes yes - ON Semiconductor MURA260T3G - yes yes - ON Semiconductor MURA260T3G - yes yes Motor connection socket YAMAICHI IC-91-1403-G4 - - yes yes 1 Hall IC GND (Jumper) 0 (0.1W) ±5％ RK73B1J 0ΩJ yes yes 1 Hall IC bias (Jumper) 0 (0.1W) 10k (0.1W) 10k (0.1W) 10k (0.1W) 10k (0.1W) 10k (0.1W) RK73B1J 0ΩJ yes yes RK73B1JTTD103J yes yes RK73B1JTTD103J yes yes RK73B1JTTD103J yes yes RK73B1JTTD103J yes yes RK73B1JTTD103J yes yes RK73B1J 0ΩJ yes yes RK73B1J 0ΩJ yes yes RK73B1J 0ΩJ yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes RK73B1JTTD2R2J yes yes RK73B1J 0ΩJ yes yes yes yes yes yes yes yes yes yes yes yes Designator Quantity Description Value Tolerance Footprint Manufacturer IC1 1 Motor Pre-Driver - - SSOP30 (275mil) HIC 1 IPM - - ON Semiconductor ON Semiconductor SW 1 Switch - - TP1-TP3 3 - D1 1 D3 Test points U:diode for bootstrap circuit V:diodefor bootstrap circuit W:diodefor bootstrap circuit Socket 1 D2 1 1 R1 R2 R3 1 R4 1 R5 1 Input bias R7 1 Input bias Hall out(pull up) Hall out(pull up) Hall out(pull up) R8 1 IN1- bias (Jumper) 0 (0.1W) R9 1 IN2- bias (Jumper) 0 (0.1W) R10 1 0 (0.1W) 33k (0.1W) 47k (0.1W) 47k (0.1W) 33k (0.1W) 15k (0.1W) 20k (0.1W) 10k (0.1W) 0.51 (0.25W) 1k (0.1W) R6 1 R17 1 IN3- bias (Jumper) DPL (to GND) ADP2(to GND) ADP1(to GND) FG3 (pull up) R21 1 PWM R13 R14 R15 R22 R23 R24-27 R28 1 1 1 1 1 4 1 1 R29 R30 J1 C4 C5 C6 RF RF (filter) HB (for current restriction) 1 1 1 1 1 1 C7 1 C8 TH (pull up) FAULT(pull up) CTL Jumper IN1+ IN2+ IN3+ VCC Bypass Capacitor VCC Bypass Capacitor 33 (0.1W) 2.2 (0.1W) 0 (0.1W) 6800pF /50V 6800pF /50V 6800pF /50V 1608 (0603Inch) KOA KOA ±5％ 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) ±5％ 1608 (0603Inch) KOA ±5％ 1608 (0603Inch) KOA 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 2012 (0805Inch) 1608 (0603Inch) KOA ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ 10uF /25V ±10％ 0.1uF /25V ±10％ 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) KOA KOA KOA KOA KOA KOA RK73B1JTTD333J KOA RK73B1JTTD473J KOA RK73B1JTTD473J KOA RK73B1JTTD333J KOA RK73B1JTTD153J KOA RK73B1JTTD203J KOA ROHM KOA KOA KOA KOA RK73B1JTTD103J MCR10EZHZJLR51 RK73B1JTTD102J RK73B1JTTD330J MURATA GRM188B11H682K MURATA GRM188B11H682K MURATA GRM188B11H682K 3216 (1206Inch) MURATA GRM31CB31E106KA 1608 (0603Inch) MURATA GRM188B11E104K 29/36 LV8136V Application Note C9 C10 1 1 1 C11 C12 1 1 C13 C14 1 1 C15 C16 1 1 C18 C20 1 1 C22 1 C23 1 C24 CTL Bypass Capacitor CSD ADP1 Bypass Capacitor PWM VREG Bypass capacitor TH Bypass Capacitor FAULT Bypass Capacitor RF (filter) VDD Bypass Capacitor VM Bypass Capacitor U :capacitor for bootstrap circuit V :capacitor for bootstrap circuit W :capacitor for bootstrap circuit 0.1uF /25V ±10％ 0.022uF /50V ±10％ 0.1uF /25V ±10％ 1608 (0603Inch) 1608 (0603Inch) MURATA GRM188B11E104K MURATA GRM188B11H223K 1608 (0603Inch) 1608 (0603Inch) MURATA GRM188B11E104K MURATA GRM1882C1H222J ±10％ 1608 (0603Inch) MURATA GRM188B11E104K 0.1uF /25V ±10％ 1608 (0603Inch) MURATA GRM188B11E104K 0.1uF /25V ±10％ 1608 (0603Inch) 1608 (0603Inch) MURATA GRM188B11E104K MURATA GRM1882C1H222J 3216 (1206Inch) MURATA GRM31CB31E106KA 2200pF /50V 0.1uF /25V 2200pF /50V 10uF /25V 10uF /450V ±5％ ±5％ ±10％ SUNCON 450ME10FC 2012 (0805Inch) MURATA GRM219B31E225KA 2012 (0805Inch) MURATA 2012 (0805Inch) MURATA - - 2.2uF /25V ±10％ 2.2uF /25V ±10％ 2.2uF /25V ±10％ yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes GRM219B31E225KA GRM219B31E225KA The points for attention in design applications VM, and each OUT, where large current flows should be laid out as fat and short as possible. VM and each OUT of high voltage line should be separated at least 3.2 mm or more from other patterns. VM bypass capacitor should be mounted as near as possible to VCC1 pin of STK5C4. VCC bypass capacitor should be mounted as near as possible to VCC pin of LV8136V. VREG5 bypass capacitor should be mounted as near as possible to VREG5 pin. Do not exceed the absolute maximum ratings under no circumstance. "PGND" is the ground of the power system. "GND" is a small signal ground. They need to be laid out without any common impedance. The impedance of the island of GND needs to be as low as possible by making through-holes, for example. We recommend that the GND lines to connect a stabilization capacitor of VCC and to VM bypass capacitor are laid out independently and single-point-grounded at VM bypass capacitor VREG5 should be used in the IC as reference voltage. Capacitor should be connected between VREG5 pin and GND to stabilize VREG5. VREG5 or VCC can be used as reference voltage for CTL voltage setting. Therefore CTL can be connected to VREG5 or VCC after having been devided with resistors. However since the CTL pin is connected to 190kΩ pull-down in the chip, caution is required when control input voltage is used for dividing resistance. VREG5 can not be recommended to use for peripheral circuits because their output voltage are not so high in precision. FR pin should be connected to 100kΩ pull-down in the chip. If the pin is open, the IC receives signals as L. But it may detect the signal falsely when the pin is affected by noise. When the pin is input L, it is recommended to switch to ground. FAULT pin should be connected to 30kΩ pull-up in the chip. If the pin is open, the IC receives signals as H. But it may detect the signal falsely when the pin is affected by noise. When the pin is input H, it is recommended to switch to VREG5. For CSD pin, make sure to connect this pin to GND when you do not use protection circuit. For TH pin, make sure to connect this pin to VREG5 when you do not use protection circuit. 30/36 LV8136V Application Note Evaluation Board PCB Design 68.1mm 68.1mm 85.6mm (Top side/ Pattern) (Back side/ Pattern) Allowable power disspation Pamax -W (Top side/ Resist&Silk) 2.0 Specified circuit board : 68.1 x 85.6 x 1.6 mm3 Two layer glass epoxy board 1.55 1.0 0.56 0.0 -40 -20 0 20 40 60 80 100 120 140 Ambient temperature, Ta -℃ Pdmax - Ta 31/36 LV8136V Application Note R24 R25 R26 R27 Application Circuit Example Evaluation Board Circuit Diagram (Hall Element Input) VREG5 Motor connection socket 32/36 LV8136V Application Note Note : The Hall IC to be used must be of open collector or open drain type (no internal pull-up resistor connected to the output). R25 R24 R26 R27 Evaluation Board Circuit Diagram (Hall IC Input #2) 33/36 LV8136V Application Note R25 R24 R26 R27 Evaluation Board Full Circuit Diagram Motor connection socket 34/36 LV8136V Application Note Application Circuit Example Bill of Materials for LV8136V Evaluation Board (Hall Element Input) Designator Quantity Description Value Tolerance Footprint Manufacturer IC1 1 Motor Pre-Driver - - SSOP30 (275mil) HIC 1 IPM - - ON Semiconductor ON Semiconductor Manufacturer Part Number Substitution Allowed Lead Free LV8136V No yes STK5C4-330J-E yes yes SW 1 Switch - - MIYAMA MS-611A-A01 yes yes TP1-TP3 3 - - MAC8 ST-1-3 yes yes D1 1 - ON Semiconductor MURA260T3G - yes yes - ON Semiconductor MURA260T3G - yes yes - - ON Semiconductor MURA260T3G D3 Test points U:diode for bootstrap circuit V:diodefor bootstrap circuit W:diodefor bootstrap circuit yes yes YAMAICHI IC-91-1403-G4 Socket Motor connection socket - - yes yes R1 1 Hall bias GND 100 (0.1W) RK73B1JTTD101J yes yes R2 1 RK73B1JTTD331J yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes RK73B1JTTD2R2J yes yes RK73B1J 0ΩJ yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes 1 D2 1 1 R13 R14 PWM ±5％ 1 TH (pull up) 20k (0.1W) ±5％ 1608 (0603Inch) KOA 1 FAULT(pull up) 10k (0.1W) ±5％ 1608 (0603Inch) KOA RF 0.51 (0.25W) ±5％ 2012 (0805Inch) ROHM ±5％ 1608 (0603Inch) KOA 1 1 R17 1 R23 R24-27 R28 1 4 1 1 R29 R30 J1 C1 C2 C3 1 1 1 1 1 1 C8 C10 1 1 1 C11 C12 1 1 C13 C14 1 1 C15 Hall bias DPL (to GND) ADP2(to GND) ADP1(to GND) FG3 (pull up) RF (filter) HB (for current restriction) 1 C7 C9 KOA 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1 R22 KOA 330 (0.1W) 33k (0.1W) 47k (0.1W) 47k (0.1W) 33k (0.1W) 15k (0.1W) R15 R21 ±5％ 1608 (0603Inch) CTL Jumper IN1+/ IN2+/ IN3+/ VCC Bypass Capacitor VCC Bypass Capacitor CTL Bypass Capacitor CSD ADP1 Bypass Capacitor PWM VREG Bypass capacitor TH Bypass Capacitor FAULT Bypass Capacitor 1k (0.1W) 33 (0.1W) 2.2 (0.1W) 0 (0.1W) 6800pF /50V 6800pF /50V 6800pF /50V ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ ±5％ 10uF /25V ±10％ 0.1uF /25V ±10％ 0.1uF /25V ±10％ 0.022uF /50V ±10％ 0.1uF /25V ±10％ 2200pF /50V ±5％ 0.1uF /25V ±10％ 0.1uF /25V ±10％ 0.1uF /25V ±10％ 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) 1608 (0603Inch) KOA RK73B1JTTD333J KOA RK73B1JTTD473J KOA RK73B1JTTD473J KOA RK73B1JTTD333J KOA RK73B1JTTD153J RK73B1JTTD203J KOA KOA KOA RK73B1JTTD103J MCR10EZHZJLR51 RK73B1JTTD102J RK73B1JTTD330J MURATA GRM188B11H682K MURATA GRM188B11H682K MURATA GRM188B11H682K 3216 (1206Inch) MURATA GRM31CB31E106KA 1608 (0603Inch) MURATA 1608 (0603Inch) 1608 (0603Inch) MURATA GRM188B11E104K MURATA GRM188B11H223K 1608 (0603Inch) 1608 (0603Inch) MURATA GRM188B11E104K MURATA GRM1882C1H222J 1608 (0603Inch) 1608 (0603Inch) MURATA GRM188B11E104K MURATA GRM188B11E104K 1608 (0603Inch) MURATA GRM188B11E104K GRM188B11E104K 35/36 LV8136V Application Note C16 1 1 C18 C20 1 1 C22 1 C23 1 C24 RF (filter) VDD Bypass Capacitor VM Bypass Capacitor U :capacitor for bootstrap circuit V :capacitor for bootstrap circuit W :capacitor for bootstrap circuit 2200pF /50V ±5％ 1608 (0603Inch) MURATA GRM1882C1H222J 3216 (1206Inch) MURATA GRM31CB31E106KA SUNCON 450ME10FC GRM219B31E225KA 10uF /25V 10uF /450V ±10％ - - 2.2uF /25V ±10％ 2012 (0805Inch) MURATA 2.2uF /25V ±10％ 2012 (0805Inch) MURATA 2.2uF /25V ±10％ 2012 (0805Inch) MURATA yes yes yes yes yes yes yes yes yes yes yes yes GRM219B31E225KA GRM219B31E225KA ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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