Data Sheet

TDA9899
Multistandard hybrid IF processing including car mobile
Rev. 03 — 15 January 2008
Product data sheet
1. General description
The Integrated Circuit (IC) is suitable for Intermediate Frequency (IF) processing including
global multistandard Analog TV (ATV), Digital Video Broadcast (DVB) and mono FM radio
using only 1 IC and 1 to 3 fixed Surface Acoustic Waves (SAWs) (application dependent).
2. Features
2.1 General
n
n
n
n
n
n
n
n
n
n
n
5 V supply voltage
I2C-bus control over all functions
Four I2C-bus addresses provided; selection by programmable Module Address (MAD)
Three I2C-bus voltage level supported; selection via pin BVS
Separate gain controlled amplifiers with input selector and conversion for incoming IF
[analog Vision IF (VIF) or Sound IF (SIF) or Digital TV (DTV)] allows the use of
different filter shapes and bandwidths
All conventional ATV standards applicable by using DTV bandwidth window
[Band-Pass (BP)] filter
Easy to use default settings for almost every standard provided, selectable via I2C-bus
Two 4 MHz reference frequency stages; the first one operates either as crystal
oscillator or as optional signal input, the second one either as external signal input or
as buffered reference frequency output
Stabilizer circuit for ripple rejection and to achieve constant output signals
Smallest size, simplest application
ElectroStatic Discharge (ESD) protection for all pins
2.2 Analog TV processing
n Gain controlled wide-band VIF amplifier; AC-coupled
n Multistandard true synchronous demodulation with active carrier regeneration: very
linear demodulation, good intermodulation figures, reduced harmonics and excellent
pulse response
n Internal Nyquist slope processing; switch-off able for alternative use of inexpensive
Nyquist slope SAW filter with additive video noise improvement
n Separate passive video detector; monitor output for antenna diversity applications
n Gated phase detector for L and L-accent standards
n Fully integrated VIF Voltage-Controlled Oscillator (VCO), alignment-free, frequencies
switchable for all negative and positive modulated standards via I2C-bus
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
n VIF Automatic Gain Control (AGC) detector for gain control; operating as a peak sync
detector for negative modulated signals and as a peak white detector for positive
modulated signals
n Optimized AGC modes for negative modulation; e.g. very fast reaction time for VIF and
SIF
n External VIF AGC access for car mobile applications; enable function via control port
n Precise fully digital Automatic Frequency Control (AFC) detector with 4-bit
Digital-to-Analog Converter (DAC); AFC bits can be read-out via I2C-bus
n High precise Tuner AGC (TAGC) TakeOver Point (TOP) for negative modulated
standards; TOP adjust via I2C-bus
n TAGC TOP for positive standards and Received Signal Strength Indication (RSSI);
adjustable via I2C-bus or alternatively by potentiometer
n Fully integrated Sound Carrier (SC) trap for any ATV standard (SC at 4.5 MHz,
5.5 MHz, 6.0 MHz and 6.5 MHz)
n SIF AGC for gain controlled SIF amplifier and high-performance single-reference
Quasi Split Sound (QSS) mixer
n True Split Sound (TSS) mode; picture carrier independent sound demodulation for car
mobile applications
n Fully integrated sound BP filter supporting any ATV standard
n Optional use of external FM sound BP filter
n AM sound demodulation for L and L-accent standard
n Alignment-free selective FM Phase-Locked Loop (PLL) demodulator with high linearity
and low noise; external FM input
n Weak Audio Frequency Processing (WAFP) in the event of FM audio; audio gain and
bandwidth dependent on received signal quality
n VIF AGC voltage monitor output or port function
n VIF AFC current or tuner, SIF or FM AGC voltage or WAFP voltage monitor output
n Buffered SIF wide-band output, gain controlled by internal SIF AGC
n 2nd SIF output, gain controlled by internal SIF AGC or by internal FM carrier AGC for
Digital Signal Processor (DSP)
n Fully integrated BP filter for 2nd SIF at 4.5 MHz, 5.5 MHz, 6.0 MHz or 6.5 MHz
2.3 Digital TV processing
n
n
n
n
n
n
n
n
n
n
Applicable for terrestrial and cable TV reception
70 dB variable gain wide-band IF amplifier (AC-coupled)
Gain control via external control voltage (0 V to 3 V)
2 V (p-p) differential low IF (downconverted) output or 1 V (p-p) 1st IF output for direct
Analog-to-Digital Converter (ADC) interfacing
DVB downconversion with integrated selectivity for Low IF (LIF)/Zero IF (ZIF)
Integrated anti-aliasing tracking low-pass filter
Fully integrated synthesizer controlled oscillator with excellent phase noise
performance
Synthesizer frequencies for a wide range of world wide DVB standards (for IF center
frequencies of 34.5 MHz, 36 MHz, 44 MHz and 57 MHz)
All DVB bandwidth ranges supported (including ZIF I/Q)
TAGC detector for independent tuner gain control loop applications
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
2 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
n TAGC operating as peak detector, fast reaction time due to additional speed-up
detector
n Port function
n TAGC voltage monitor output
2.4 Dual mode
n Fully performed DTV processing and additional ATV video signal processing in
parallel, but with reduced performance, for very fast channel scan
n VIF AGC voltage monitor output or port function
n VIF AFC current monitor output or TAGC voltage output
2.5 FM radio mode
n Gain controlled wide-band Radio IF (RIF) amplifier; AC-coupled
n Buffered RIF amplifier wide-band output, gain controlled by internal RIF AGC
n Fully integrated BP filter for 2nd RIF at 4.5 MHz, 5.5 MHz, 6.0 MHz, 6.5 MHz or
10.7 MHz
n 2nd RIF output, gain controlled by internal RIF AGC or by internal FM carrier AGC for
DSP
n Alignment-free selective FM PLL demodulator with high linearity and low noise
n Precise fully digital AFC detector with 4-bit DAC; AFC bits read-out via I2C-bus
n Weak signal FM audio frequency processing
n Port function
n Radio AFC current or tuner, RIF or FM AGC voltage or WAFC voltage monitor output
3. Applications
n Analog and digital TV front-end applications for TV sets, recording applications, car
mobile and personal computer cards
4. Quick reference data
Table 1.
Quick reference data
VP = 5 V; Tamb = 25 °C.
Symbol
Parameter
VP
supply voltage
IP
supply current
Conditions
Min
Typ
Max
Unit
4.5
5.0
5.5
V
-
-
190
mA
-
60
100
µV
60
66
-
dB
-
-
-
MHz
all standards except M/N
-
±2.3
-
MHz
M/N standard
-
±1.8
-
MHz
[1]
Analog TV signal processing
Video part
lower limit at −1 dB video
output signal
Vi(IF)(RMS)
RMS IF input voltage
GVIF(cr)
control range VIF gain
fVIF
VIF frequency
see Table 26
∆fVIF(dah)
digital acquisition help VIF
frequency window
related to fVIF
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
3 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 1.
Quick reference data …continued
VP = 5 V; Tamb = 25 °C.
Symbol
Parameter
Conditions
Vo(video)(p-p)
peak-to-peak video output voltage
see Figure 8
Gdif
differential gain
Max
Unit
[2]
1.7
2.0
2.3
V
trap bypass mode and
sound carrier off
[3]
-
1.1
-
V
-
-
5
%
-
-
7
%
“ITU-T J.63 line 330”
[2][4]
L standard
differential phase
Typ
positive or negative
modulation; normal mode
and sound carrier on
B/G standard
ϕdif
Min
“ITU-T J.63 line 330”
[2][4]
B/G standard
-
2
4
deg
L standard
-
2
4
deg
Bvideo(−3dB)
−3 dB video bandwidth
trap bypass mode and
sound carrier off; AC load:
CL < 20 pF, RL > 1 kΩ
[3]
6
8
-
MHz
αSC1
first sound carrier attenuation
M/N standard;
f = fSC1 = 4.5 MHz;
see Figure 20
[3]
38
-
-
dB
B/G standard;
f = fSC1 = 5.5 MHz;
see Figure 22
[3]
35
-
-
dB
(S/N)w
weighted signal-to-noise ratio
normal mode and sound
carrier on; B/G standard;
50 % grey video signal;
unified weighting filter
(“ITU-T J.61”);
see Figure 19
[2][5]
53
57
-
dB
PSRRCVBS
power supply ripple rejection on
pin CVBS
normal mode and sound
carrier on; fripple = 70 Hz;
video signal; grey level;
positive and negative
modulation; see Figure 9
[2]
14
20
-
dB
∆IAFC/∆fVIF
change of AFC current with VIF
frequency
AFC TV mode
[6]
0.85
1.05
1.25
µA/kHz
Vo(AF)(RMS)
RMS AF output voltage
FM: QSS or TSS mode;
27 kHz FM deviation;
50 µs de-emphasis
430
540
650
mV
AM: 54 % modulation
400
500
600
mV
THD
total harmonic distortion
FM: 50 µs de-emphasis;
FM deviation: for TV mode
27 kHz and for radio mode
22.5 kHz
-
0.15
0.50
%
AM: 54 % modulation;
BP on; see Figure 32
-
0.5
1.0
%
Audio part
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
4 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 1.
Quick reference data …continued
VP = 5 V; Tamb = 25 °C.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
f−3dB(AF)
AF cut-off frequency
W3[2] = 0; W3[4] = 0;
without de-emphasis;
FM window
width = 237.5 kHz
80
100
-
kHz
(S/N)w(AF)
AF weighted signal-to-noise ratio
“ITU-R BS.468-4”
FM: 27 kHz FM deviation;
50 µs de-emphasis; vision
carrier unmodulated;
FM PLL only
48
56
-
dB
AM: BP off
44
50
-
dB
PSRR
power supply ripple rejection
fripple = 70 Hz; see Figure 9
14
20
-
dB
Vo(RMS)
RMS output voltage
IF intercarrier single-ended
to GND; SC1 on; SC2 off
90
140
180
mV
IF intercarrier single-ended
to GND; L standard;
without modulation; BP on;
W7[5] = 0
45
70
90
mV
2
-
300
mV
0.85
1.05
1.25
µA/kHz
35
46
-
dB
-
1.0
1.1
V
FM sound part
Vi(FM)(RMS)
RMS FM input voltage
gain controlled operation;
W1[1:0] = 10 or
W1[1:0] = 11 or
W1[1:0] = 01; see Figure 14
∆IAFC/∆fRIF
change of AFC current with RIF
frequency
AFC radio mode
αAM
AM suppression
referenced to 27 kHz
FM deviation;
50 µs de-emphasis;
AM: f = 1 kHz; m = 54 %
[6]
Digital TV signal processing
Digital direct IF
Vo(dif)(p-p)
peak-to-peak differential output
voltage
between pin OUT2A and
pin OUT2B
[7]
W4[7] = 0
W4[7] = 1
-
0.50
0.55
V
[8]
-
83
-
dB
60
66
-
dB
fripple = 70 Hz
-
60
-
dB
fripple = 20 kHz
-
60
-
dB
-
2
-
V
GIF(max)
maximum IF gain
GIF(cr)
control range IF gain
[8]
power supply ripple rejection
[8]
PSRR
output peak-to-peak level to
input RMS level ratio
residual spurious at nominal
differential output voltage
dependent on power supply
ripple
Digital low IF
Vo(dif)(p-p)
peak-to-peak differential output
voltage
between pin OUT1A and
pin OUT1B; W4[7] = 0
TDA9899_3
Product data sheet
[7]
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
5 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 1.
Quick reference data …continued
VP = 5 V; Tamb = 25 °C.
Symbol
Parameter
Conditions
GIF(max)
maximum IF gain
GIF(cr)
control range IF gain
fsynth
synthesizer frequency
see Table 37 and Table 38
ϕn(synth)
synthesizer phase noise
with 4 MHz crystal oscillator
reference; fsynth = 31 MHz;
fIF = 36 MHz
αripple(pb)LIF
low IF pass-band ripple
output peak-to-peak level to
input RMS level ratio
Min
Typ
Max
Unit
[8]
-
89
-
dB
[8]
60
66
-
dB
-
-
-
MHz
at 1 kHz
[8]
89
99
-
dBc/Hz
at 10 kHz
[8]
89
99
-
dBc/Hz
at 100 kHz
[8]
98
102
-
dBc/Hz
at 1.4 MHz
[8]
115
119
-
dBc/Hz
6 MHz bandwidth
-
-
2.7
dB
7 MHz bandwidth
-
-
2.7
dB
8 MHz bandwidth
-
-
2.7
dB
αstpb
stop-band attenuation
8 MHz band; f = 15.75 MHz
30
40
-
dB
αimage
image rejection
−10 MHz to 0 MHz; BP on
30
34
-
dB
C/N
carrier-to-noise ratio
at fo = 4.9 MHz;
Vi(IF) = 10 mV (RMS);
see Figure 38
112
118
-
dBc/Hz
[8][9][10]
Digital zero IF
Vo(dif)(p-p)
peak-to-peak differential output
voltage
between pin OUT1A and
pin OUT1B or between
pin OUT2A and pin OUT2B;
W4[7] = 0
[7]
-
2
-
V
GIF(max)
maximum IF gain
output peak-to-peak level to
input RMS level ratio
[8]
-
89
-
dB
GIF(cr)
control range IF gain
[8]
60
66
-
dB
fsynth
synthesizer frequency
see Table 37 and Table 38
-
-
-
MHz
ϕn(synth)
synthesizer phase noise
with 4 MHz crystal oscillator
reference; fsynth = 31 MHz;
fIF = 36 MHz
at 1 kHz
[8]
89
99
-
dBc/Hz
at 10 kHz
[8]
89
99
-
dBc/Hz
at 100 kHz
[8]
98
102
-
dBc/Hz
at 1.4 MHz
[8]
115
119
-
dBc/Hz
-
4
-
MHz
15
150
500
mV
Reference frequency input from external source
fref
reference frequency
W7[7] = 0
Vref(RMS)
RMS reference voltage
W7[7] = 0; see Figure 35
and Figure 47
[11]
[1]
Values of video and sound parameters can be decreased at VP = 4.5 V.
[2]
AC load; CL < 20 pF and RL > 1 kΩ. The sound carrier frequencies (depending on TV standard) are attenuated by the integrated sound
carrier traps.
[3]
The sound carrier trap can be bypassed by setting the I2C-bus bit W2[0] to logic 0; see Table 25. In this way the full composite video
spectrum appears at pin CVBS. The video amplitude is reduced to 1.1 V (p-p).
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
6 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
[4]
Condition: luminance range (5 steps) from 0 % to 100 %. Measurement value is based on 4 of 5 steps.
[5]
Measurement using 200 kHz high-pass filter, 5 MHz low-pass filter and subcarrier notch filter (“ITU-T J.64”).
[6]
To match the AFC output signal to different tuning systems a current output is provided. The test circuit is given in Figure 18. The
AFC steepness can be changed by resistors R1 and R2.
[7]
With single-ended load for fIF < 45 MHz RL ≥ 1 kΩ and CL ≤ 5 pF to ground and for fIF = 45 MHz to 60 MHz RL = 1 kΩ and CL ≤ 3 pF to
ground.
[8]
This parameter is not tested during production and is only given as application information.
[9]
Noise level is measured without input signal but AGC adjusted corresponding to the given input level.
[10] Set with AGC nominal output voltage as reference. For C/N measurement switch input signal off.
[11] The tolerance of the reference frequency determines the accuracy of VIF AFC, RIF AFC, FM demodulator center frequency, maximum
FM deviation, sound trap frequency, LIF band-pass cut-off frequency and ZIF low-pass cut-off frequency as well as the accuracy of the
synthesizer.
5. Ordering information
Table 2.
Ordering information
Type number
Package
Name
Description
Version
TDA9899HL
LQFP48
plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm
SOT313-2
TDA9899HN
HVQFN48
plastic thermal enhanced very thin quad flat package; no leads;
48 terminals; body 7 × 7 × 0.85 mm
SOT619-1
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
7 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
6. Block diagram
i.c.
i.c.
SCL
SDA
ADRSEL
BVS
GNDD
LFSYN2
24
23
14
18
25
32
22
1
I2C-BUS
SYNTHESIZER
AND VCO
TDA9899
A
AM average
AGCDIN
IF3A
IF3B
36
SIF AGC
B
FM peak
sideband
3
C
Q
4
SIDEBAND
FILTER
I
D
IF1A
IF1B
6
7
sideband
(L-accent)
VIF AGC
2×
IF2A
IF2B
CIFAGC
AGCVIN
I
9
NYQUIST
FILTER
Q
10
E
5
45
VIF PLL
AND
ACQUISITION
HELP
I2C-BUS
TOPNEG
DECODER
VIF
AFC
SOUND
CARRIER
TRAP
GROUP
DELAY
EQUALIZER
F
trap reference
PEAK
AGC
TUNER
TAGC
SYNTHESIZER
AND VCO
RSSI
DETECTOR
AND
L STANDARD
TUNER
AGC
47
standard
G
I2C-BUS TOP2
AND RSSI
H
I
48
2
GND
8
11
CTAGC
TOP2
37
13
38
LFVIF
LFSYN1
AGCSWI
n.c.
optional tuner AGC TOP
for positive modulation
and radio signal strength
detector onset
008aaa030
Fig 1. Block diagram of TDA9899 (continued in Figure 2)
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
8 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
R(2)
4 MHz reference
input/output
R(2)
EXTERNAL SOUND
BAND-PASS FILTER(1)
VP
GNDA
EXTFILO
EXTFILI
FREF
OPTXTAL
43, 44
40, 41
15
17
46
39
4 MHz FREQUENCY
REFERENCE
SUPPLY
+3 dB
TDA9899
29
OUT2A
A
30
OUT2B
BP on/off
output
switch
B
C
D
26
BAND-PASS
FILTER
OUT1A
27
OUT1B
21
EXTFMI
35 APCLC
34 APCHC
20 CDEEM
FM switch
E
31
AUDIO
PROCESSOR
AUD
28 CAF
FM CARRIER AGC
AM
F
WAFP
TAGC
SIF AGC
AM DEMODULATOR
FM
AND
FM NARROW-BAND PLL AM
16
MPP2
FM AGC
AFC
G
33
42
H
VIF AGC
I
I2C-bus
12
CVBS
DIV
MPP1
port
19
LFFM
001aaf553
(1) Optional.
(2) Connect resistor if input or crystal is not used.
Fig 2. Block diagram of TDA9899 (continued from Figure 1)
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
9 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
7. Pinning information
37 AGCSWI
38 LFSYN1
39 OPTXTAL
40 GNDA
41 GNDA
42 DIV
43 VP
44 VP
45 AGCVIN
46 FREF
47 TAGC
48 GND
7.1 Pinning
LFSYN2
1
36 AGCDIN
n.c.
2
35 APCLC
IF3A
3
34 APCHC
IF3B
4
33 CVBS
CIFAGC
5
32 BVS
IF1A
6
IF1B
7
CTAGC
8
29 OUT2A
IF2A
9
28 CAF
31 AUD
TDA9899HL
30 OUT2B
SCL 24
SDA 23
GNDD 22
EXTFMI 21
CDEEM 20
LFFM 19
i.c. 18
EXTFILI 17
MPP2 16
25 ADRSEL
EXTFILO 15
26 OUT1A
MPP1 12
i.c. 14
27 OUT1B
TOP2 11
LFVIF 13
IF2B 10
008aaa031
Fig 3. Pin configuration for LQFP48
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
10 of 103
TDA9899
NXP Semiconductors
37 AGCSWI
38 LFSYN1
39 OPTXTAL
40 GNDA
41 GNDA
42 DIV
43 VP
44 VP
45 AGCVIN
46 FREF
terminal 1
index area
47 TAGC
48 GND
Multistandard hybrid IF processing including car mobile
LFSYN2
1
36 AGCDIN
n.c.
2
35 APCLC
IF3A
3
34 APCHC
IF3B
4
33 CVBS
CIFAGC
5
32 BVS
IF1A
6
IF1B
7
CTAGC
8
29 OUT2A
IF2A
9
28 CAF
31 AUD
TDA9899HN
30 OUT2B
SCL 24
SDA 23
GNDD 22
EXTFMI 21
CDEEM 20
LFFM 19
i.c. 18
EXTFILI 17
MPP2 16
25 ADRSEL
EXTFILO 15
26 OUT1A
MPP1 12
i.c. 14
27 OUT1B
TOP2 11
LFVIF 13
IF2B 10
008aaa032
Transparent top view
Fig 4. Pin configuration for HVQFN48
7.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
LFSYN2
1
loop filter synthesizer 2 (conversion synthesizer)
n.c.
2
not connected
IF3A
3
IF symmetrical input 3 for sound
IF3B
4
CIFAGC
5
IF AGC capacitor; L standard
IF1A
6
IF symmetrical input 1 for vision or digital
IF1B
7
CTAGC
8
TAGC capacitor
IF2A
9
IF symmetrical input 2 for vision or digital
IF2B
10
TOP2
11
TOP potentiometer for positive modulated standards and RSSI reference
MPP1
12
multipurpose pin 1: VIF AGC monitor output or port function
LFVIF
13
loop filter VIF PLL
i.c.
14
internally connected; connect to ground
EXTFILO
15
output to external filter
MPP2
16
multipurpose pin 2: SIF AGC or FM AGC or TAGC or VIF AFC or FM AFC or
WAFP monitor output
EXTFILI
17
input from external filter
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
11 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 3.
Pin description …continued
Symbol
Pin
Description
i.c.
18
internally connected; connect to ground
LFFM
19
loop filter FM PLL
CDEEM
20
de-emphasis capacitor
EXTFMI
21
external FM input
GNDD
22
digital ground
SDA
23
I2C-bus data input and output
SCL
24
I2C-bus clock input
ADRSEL
25
address select
OUT1A
26
zero IF I or low IF or 2nd sound intercarrier symmetrical output
OUT1B
27
CAF
28
Direct Current (DC) decoupling capacitor
OUT2A
29
zero IF Q or 1st Digital IF (DIF) symmetrical output
OUT2B
30
AUD
31
audio signal output
BVS
32
I2C-bus voltage select
CVBS
33
composite video signal output
APCHC
34
audio processing capacitor for high cut
APCLC
35
audio processing capacitor and resistor for low cut
AGCDIN
36
AGC input for DIF amplifier for e.g. input from channel decoder AGC
AGCSWI
37
AGC control switch
LFSYN1
38
loop filter synthesizer 1 (filter control synthesizer)
OPTXTAL
39
optional quartz input
GNDA
40
analog ground
GNDA
41
analog ground
DIV
42
diversity output
VP
43
supply voltage
VP
44
supply voltage
AGCVIN
45
AGC input for VIF amplifier
FREF
46
4 MHz reference input or output
TAGC
47
TAGC output
GND
48
ground; plateau connection
8. Functional description
8.1 IF input switch
Different signal bandwidth can be handled by using two signal processing chains with
individual gain control.
Switch configuration allows independent selection of filter for analog VIF and for analog
SIF (used at same time) or DIF.
TDA9899_3
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TDA9899
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Multistandard hybrid IF processing including car mobile
The switch takes into account correct signal selection for TAGC in the event of VIF and
DIF signal processing.
8.2 VIF demodulator
ATV demodulation using 6 MHz DVB window (band-pass) filter (for 6 MHz, 7 MHz or
8 MHz channel width).
IF frequencies adapted to enable the use of different filter configurations. The Nyquist
processing is integrated.
For optional use of standard Nyquist filter the integrated Nyquist processing can be
switched off.
Sideband switch supplies selection of lower or upper sideband (e.g. for L-accent).
Equalizer provides optimum pulse response at different standards [e.g. to cope with
higher demands for Liquid Crystal Display (LCD) TV].
Integrated sound traps.
Sound trap reference independent from received 2nd sound IF (reference taken from
integrated reference synthesizer).
IF level selection provides an optimum adaptation of the demodulator to high linearity or
low noise.
Separate passive video detector for monitoring the received IF level in combination with
AGC hold mode for diversity application.
8.3 VIF AGC and tuner AGC
8.3.1 Mode selection of VIF AGC
Peak white AGC for positive modulation mode with adaptation for speed up and black level
AGC (using proven system from TDA9886).
For negative modulation mode equal response times for increasing or decreasing input
level (optimum for amplitude fading) or normal peak AGC or ultra fast peak AGC (for car
mobile).
8.3.2 External VIF AGC control
AGC input for external control enabled via fast switching input (car mobile).
AGC hold mode (for diversity detection) via fast switching input (car mobile).
8.3.3 VIF AGC monitor
VIF AGC DC voltage monitor output (with expanded internal characteristic).
VIF AGC read out via I2C-bus (for IF level indication) with zero-calibration via TOP setting
(TOP setting either via I2C-bus or via TOP potentiometer).
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
13 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
8.3.4 Tuner AGC
Independent integral tuner gain control loop (not nested with VIF AGC). Integral
characteristic provides high control accuracy.
Accurate setting of tuner control onset (TOP) for integral tuner gain control loop via
I2C-bus.
For L standard, TAGC remains VIF AGC nested, as from field experience in the past this
narrow-band TAGC gives best performance.
Thus two switchable TAGC systems for negative/DIF and positive modulation
implemented.
L standard TAGC output changed from current output to voltage output, as it is not
necessary to adapt for other than 5 V tuner.
L standard tuner time constant switching integrated (= speed up function in the event of
step into high input levels), to minimize external application.
For high TOP accuracy at L standard, additional adjustment via optional potentiometer or
I2C-bus is provided.
Tuner AGC status bit provided. This function enables TOP alignment without need for
TAGC voltage measurement (e.g. for TOP alignment in a complete set, where access to
internal signals is not possible).
8.4 DIF/SIF FM and AM sound AGC
External AGC control input for DIF. DIF includes 1st IF, zero IF and low IF.
Integrated gain control loop for SIF.
Bandwidth of AGC control for FM SIF related to used SAW bandwidth.
Peak AGC control in the event of FM SIF.
Ultra fast SIF AGC time constant for mobile mode.
Slow average AGC control in the event of AM sound.
AM sound AGC related to AM sound carrier level.
Fast AM sound AGC in the event of fast VIF AGC (speed up).
SIF AGC DC voltage monitor output with expanded internal characteristic.
8.5 Frequency phase-locked loop for VIF
Basic function as previous TDA9887 design.
PLL gating mode for positive and negative modulation, optional.
PLL optimized for either overmodulation or strong multipath (car mobile).
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
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TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
8.6 DIF/SIF converter stage
Frequency conversion with sideband suppression.
Selection mode of upper or lower sideband for pass or suppression.
Suppression around zero for frequency conversion.
I/Q output mode for zero IF conversion.
Conversion mode selection via synthesizer for DIF, TSS and radio mode or via VIF
Frequency Phase-Locked Loop (FPLL) for TV QSS sound (FM/AM).
External BP filter (e.g. for 4.5 MHz) for additional filtering, optional.
Bypass mode selection for use of external filter.
Integrated SIF BP tracking filter for chroma suppression.
Integrated tracking filters for LIF and ZIF.
Symmetrical output stages for DIF, ZIF and 2nd SIF.
Second narrow-band gain control loop for 2nd SIF via FM PLL.
8.7 Mono sound demodulator
8.7.1 Narrow-band FM PLL demodulation
Additional external input for either TV or radio intercarrier signal.
FM carrier selection independent from VIF trap, because VIF trap uses reference via
synthesizer.
FM wide and ultra wide mode with adapted loop bandwidth and different selectable
FM acquisition window widths to cope with FM overmodulation conditions.
8.7.2 AM sound demodulation
Passive AM sound detector.
L and L-accent standard without SAW switching (done by sideband selection of SIF
converter).
8.8 Audio amplifier
Different gain settings for FM sound to adapt to different FM deviation.
Switchable de-emphasis for FM sound.
Automatic mute function when FM PLL is unlocked.
Forced mute function.
Weak signal processing for FM sound in the event of low or noisy FM carrier.
Weak signal processing includes noise dependent gain and bandwidth control.
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
15 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Output amplifier for AM sound.
8.9 Synthesizer
In DIF mode, the synthesizer supports low and zero IF input frequencies for 34.5 MHz,
36 MHz, 44 MHz and 57 MHz center frequencies.
In TSS and radio mode, the synthesizer supports 2nd sound intercarrier conversion.
A large set of synthesizer frequencies in steps of 0.5 MHz enables flexible combination of
filter and 2nd IF frequencies.
Synthesizer loop internally adapted to divider ratio range for optimum phase noise
requirement (loop bandwidth).
Synthesizer reference either via 4 MHz crystal or via an external source. Individual pins
for crystal and external reference allows optimum interface definition and supports use of
custom reference frequency offset.
Buffered reference frequency output optional via external reference pin.
8.10 I2C-bus transceiver and slave address
Four different I2C-bus device addresses to enable application with multi-IC use.
I2C-bus transceiver input ports can handle three different I2C-bus voltages.
Read-out functions as TDA9887 plus additional read out of VIF AGC and TAGC status.
Table 4.
Slave address detection
Slave address
Selectable address bit
Pin ADRSEL
A3
A0
MAD1
0
1
GND
MAD2
0
0
VP
MAD3
1
1
resistor to GND
MAD4
1
0
resistor to VP
9. I2C-bus control
Table 5.
Slave addresses[1]
Slave address
Bit
Name
Value
A6
A5
A4
A3
A2
A1
A0
MAD1
43h
1
0
0
0
0
1
1
MAD2
42h
1
0
0
0
0
1
0
MAD3
4Bh
1
0
0
1
0
1
1
MAD4
4Ah
1
0
0
1
0
1
0
[1]
For MAD activation via pin ADRSEL: see Table 4.
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
16 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
9.1 Read format
S
BYTE 1
A
BYTE 2
A
BYTE 3
A6 to A0
R/W
D7 to D0
D7 to D0
slave address
1
data (R1)
data (R2)
from master to slave
NA
S = START condition
A = acknowledge
NA = not acknowledge
P = STOP condition
from slave to master
P
001aad167
Fig 5. I2C-bus read format (slave transmits data)
Table 6.
R1 - data read register 1 bit allocation
7
6
5
4
3
2
1
0
AFCWIN
reserved
CARRDET
AFC4
AFC3
AFC2
AFC1
PONR
Table 7.
R1 - data read register 1 bit description
Bit
Symbol
Description
7
AFCWIN
AFC window[1]
1 = VCO in ±1.6 MHz AFC window[2]
1 = VCO in ±0.8 MHz AFC window[3]
0 = VCO out of ±1.6 MHz AFC window[2]
0 = VCO out of ±0.8 MHz AFC window[3]
6
-
reserved
5
CARRDET
FM carrier detection[4]
1 = detection (FM PLL is locked and level is less than 6 dB below
gain controlled range of FM AGC)
0 = no detection
4 to 1
AFC[4:1]
automatic frequency control; see Table 8
0
PONR
power-on reset
1 = after power-on reset or after supply breakdown
0 = after a successful reading of the status register
[1]
If no IF input is applied, then bit AFCWIN can be logic 1 due to the fact that the VCO is forced to the AFC
window border for fast lock-in behavior.
[2]
All standards except M/N standard.
[3]
M/N standard.
[4]
Typical time constant of FM carrier detection is 50 ms. The minimal recommended wait time for read out is
80 ms.
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
17 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 8.
Automatic frequency control bits[1]
f[2]
Bit
AFC4
AFC3
AFC2
AFC1
R1[4]
R1[3]
R1[2]
R1[1]
0
1
1
1
≤ (fnom − 187.5 kHz)
0
1
1
0
fnom − 162.5 kHz
0
1
0
1
fnom − 137.5 kHz
0
1
0
0
fnom − 112.5 kHz
0
0
1
1
fnom − 87.5 kHz
0
0
1
0
fnom − 62.5 kHz
0
0
0
1
fnom − 37.5 kHz
0
0
0
0
fnom − 12.5 kHz
1
1
1
1
fnom + 12.5 kHz
1
1
1
0
fnom + 37.5 kHz
1
1
0
1
fnom + 62.5 kHz
1
1
0
0
fnom + 87.5 kHz
1
0
1
1
fnom + 112.5 kHz
1
0
1
0
fnom + 137.5 kHz
1
0
0
1
fnom + 162.5 kHz
1
0
0
0
≥ (fnom + 187.5 kHz)
[1]
fnom is the nominal frequency.
[2]
In ATV mode f means vision intermediate frequency; in radio mode f means radio intermediate frequency.
Table 9.
R2 - data read register 2 bit allocation
7
6
5
4
3
2
1
0
reserved
TAGC
VAGC5
VAGC4
VAGC3
VAGC2
VAGC1
VAGC0
Table 10.
R2 - data read register 2 bit description
Bit
Symbol
Description
7
-
reserved
6
TAGC
tuner AGC
1 = active
0 = inactive
5 to 0
VAGC[5:0]
AGC level detector; VIF AGC in ATV mode, SIF AGC in radio mode
and DIF AGC in DTV mode; see Table 11
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
18 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 11.
AGC bits (for corresponding AGC characteristic see Figure 10)
Bit
VAGC5
VAGC4
VAGC3
VAGC2
VAGC1
VAGC0
R2[5]
R2[4]
R2[3]
R2[2]
R2[1]
R2[0]
1
1
1
1
1
1
0 (TOP)[1]
1
1
1
1
1
0
−0.04
1
1
1
1
0
1
−0.08
1
1
1
1
0
0
−0.12
1
1
1
0
1
1
−0.16
1
1
1
0
1
0
−0.20
1
1
1
0
0
1
−0.24
1
1
1
0
0
0
−0.28
1
1
0
1
1
1
−0.32
1
1
0
1
1
0
−0.36
1
1
0
1
0
1
−0.40
1
1
0
1
0
0
−0.44
1
1
0
0
1
1
−0.48
1
1
0
0
1
0
−0.52
1
1
0
0
0
1
−0.56
1
1
0
0
0
0
−0.60
1
0
1
1
1
1
−0.64
1
0
1
1
1
0
−0.68
1
0
1
1
0
1
−0.72
1
0
1
1
0
0
−0.76
1
0
1
0
1
1
−0.80
1
0
1
0
1
0
−0.84
1
0
1
0
0
1
−0.88
1
0
1
0
0
0
−0.92
1
0
0
1
1
1
−0.96
1
0
0
1
1
0
−1.00
1
0
0
1
0
1
−1.04
1
0
0
1
0
0
−1.08
1
0
0
0
1
1
−1.12
1
0
0
0
1
0
−1.16
1
0
0
0
0
1
−1.20
1
0
0
0
0
0
−1.24
0
1
1
1
1
1
−1.28
0
1
1
1
1
0
−1.32
0
1
1
1
0
1
−1.36
0
1
1
1
0
0
−1.40
0
1
1
0
1
1
−1.44
0
1
1
0
1
0
−1.48
0
1
1
0
0
1
−1.52
TDA9899_3
Product data sheet
Typical
∆VAGC(VIF)
(V)
© NXP B.V. 2008. All rights reserved.
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19 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 11.
AGC bits (for corresponding AGC characteristic see Figure 10) …continued
Bit
Typical
∆VAGC(VIF)
(V)
VAGC5
VAGC4
VAGC3
VAGC2
VAGC1
VAGC0
R2[5]
R2[4]
R2[3]
R2[2]
R2[1]
R2[0]
0
1
1
0
0
0
−1.56
0
1
0
1
1
1
−1.60
0
1
0
1
1
0
−1.64
0
1
0
1
0
1
−1.68
0
1
0
1
0
0
−1.72
0
1
0
0
1
1
−1.76
0
1
0
0
1
0
−1.80
0
1
0
0
0
1
−1.84
0
1
0
0
0
0
−1.88
0
0
1
1
1
1
−1.92
0
0
1
1
1
0
−1.96
0
0
1
1
0
1
−2.00
0
0
1
1
0
0
−2.04
0
0
1
0
1
1
−2.08
0
0
1
0
1
0
−2.12
0
0
1
0
0
1
−2.16
0
0
1
0
0
0
−2.20
0
0
0
1
1
1
−2.24
0
0
0
1
1
0
−2.28
0
0
0
1
0
1
−2.32
0
0
0
1
0
0
−2.36
0
0
0
0
1
1
−2.40
0
0
0
0
1
0
−2.44
0
0
0
0
0
1
−2.48
0
0
0
0
0
0
−2.52
[1]
The reference of 0 (TOP) can be adjusted via TOPPOS[4:0] (register W10; see Table 51 and Table 49) or
via potentiometer at pin TOP2.
9.2 Write format
S
BYTE 1
A
BYTE 2
A
BYTE 3
A
BYTE n
A6 to A0
R/W
A7 to A0
bits 7 to 0
bits 7 to 0
slave address
0
subaddress
data 1
data n
from master to slave
A
P
S = START condition
A = acknowledge
P = STOP condition
from slave to master
001aad166
Fig 6. I2C-bus write format (slave receives data)
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
20 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
9.2.1 Subaddress
Table 12.
W0 - subaddress register bit allocation
7
6
5
4
3
2
1
0
A7
A6
A5
A4
A3
A2
A1
A0
Table 13.
W0 - subaddress register bit description
Bit
Symbol
Description
7 to 4
A[7:4]
has to be set to logic 0
3 to 0
A[3:0]
subaddress; see Table 14
Table 14.
Subaddress control bits
Bit
Table 15.
Mode
A3
A2
A1
A0
0
0
0
0
subaddress for register W1
0
0
0
1
subaddress for register W2
0
0
1
0
subaddress for register W3
0
0
1
1
subaddress for register W4
0
1
0
0
subaddress for register W5
0
1
0
1
subaddress for register W6
0
1
1
0
subaddress for register W7
0
1
1
1
subaddress for register W8
1
0
0
0
subaddress for register W9
1
0
0
1
subaddress for register W10
I2C-bus write register overview[1]
Register 7
6
5
4
3
2
1
0
W1[2]
RADIO
STD1
STD0
TV2
TV1
DUAL
FM
EXTFIL
W2[3]
MOD
STD4
STD3
STD2
SB
PLL
GATE
TRAP
W3[4]
RESCAR
AMUTE
FMUTE
FMWIDE0
DEEMT
DEEM
AGAIN1
AGAIN0
W4[5]
VIFLEVEL
BP
MPP2S1
MPP2S0
AGCSW
IFIN1
IFIN0
VIFIN
W5[6]
FSFREQ1
FSFREQ0
SFREQ5
SFREQ4
SFREQ3
SFREQ2
SFREQ1
SFREQ0
W6[7]
TAGC1
TAGC0
AGC2
AGC1
FMWIDE1
TWOFLO
AUDIOPRO DIRECT
W7[8]
FREFOUT
WAFP
SIFLEVEL
VIDLEVEL
OPSTATE
PORT
FILOUTBP
NYQOFF
W8[9]
0
0
0
0
EASY3
EASY2
EASY1
EASY0
W9[10]
DAGCSLOPE TAGCIS
TAGCTC
TOPNEG4
TOPNEG3
TOPNEG2
TOPNEG1
TOPNEG0
W10[11]
0
XPOTPOS
TOPPOS4
TOPPOS3
TOPPOS2
TOPPOS1
TOPPOS0
0
[1]
The register setting after power-on is not specified.
[2]
See Table 17 for detailed description of W1.
[3]
See Table 25 for detailed description of W2.
[4]
See Table 29 for detailed description of W3.
[5]
See Table 31 for detailed description of W4.
[6]
See Table 36 for detailed description of W5.
[7]
See Table 40 for detailed description of W6.
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
21 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
[8]
See Table 43 for detailed description of W7.
[9]
See Table 45for detailed description of W8.
[10] See Table 48 for detailed description of W9.
[11] See Table 51 for detailed description of W10.
9.2.2 Description of data bytes
Table 16.
W1 - data write register bit allocation
7
6
5
4
3
2
1
0
RADIO
STD1
STD0
TV2
TV1
DUAL
FM
EXTFIL
Table 17.
W1 - data write register bit description
Bit
Symbol
Description
7
RADIO
FM mode
1 = radio
0 = ATV/DTV
6 and 5
STD[1:0]
2nd sound IF; see Table 18, Table 19 and Table 20
4 and 3
TV[2:1]
TV mode
00 = DTV and ZIF
01 = DTV and LIF
10 = ATV and TSS
11 = ATV and QSS
2
ATV and DTV dual mode for channel search; see Table 23
DUAL
1 = dual (TV2 = 0)
0 = normal
FM and EXTFIL FM and output switching; see Table 22
1 and 0
Table 18.
Intercarrier sound BP and FM PLL frequency select for ATV, QSS mode[1]
Bit
fFMPLL
(MHz)
Sound BP
RADIO
MOD
STD1
STD0
FSFREQ1 FSFREQ0 TV1
W1[7]
W2[7]
W1[6]
W1[5]
W5[7]
W5[6]
W1[3]
0
1
0
0
X
X
1
4.5
M/N standard
0
1
0
1
X
X
1
5.5
B/G standard
0
1
1
0
X
X
1
6.0
I standard
0
1
1
1
X
X
1
6.5
D/K standard
0
0
1
1
X
X
1
off
L/L-accent standard
[1]
For description of bit MOD refer to Table 25 and bits FSFREQ[1:0] are described in Table 36.
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
22 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 19.
Intercarrier sound BP and FM PLL frequency select for ATV, TSS mode[1]
Bit
fFMPLL
(MHz)
Sound BP;
recommended for
RADIO
MOD
STD1
STD0
FSFREQ1 FSFREQ0 TV1
W1[7]
W2[7]
W1[6]
W1[5]
W5[7]
W5[6]
W1[3]
0
1
0
1
0
0
0
5.5
M/N standard
0
1
0
1
0
1
0
5.5
B/G standard
0
1
0
1
1
0
0
5.5
I standard
0
1
0
1
1
1
0
5.5
D/K standard
0
0
1
1
X
X
0
off
L/L-accent standard
[1]
For description of bit MOD refer to Table 25 and bits FSFREQ[1:0] are described in Table 36.
Table 20.
Intercarrier sound BP and FM PLL frequency select for radio, QSS mode[1]
Bit
fFMPLL
(MHz)
Sound BP
RADIO
MOD
STD1
STD0
FSFREQ1 FSFREQ0 TV1
W1[7]
W2[7]
W1[6]
W1[5]
W5[7]
W5[6]
W1[3]
1
1
X
X
0
0
0
4.5
M/N standard
1
1
X
X
0
1
0
5.5
B/G standard
1
1
X
X
1
0
0
6.0
I standard
1
1
X
X
1
1
0
6.5
D/K standard
1
0
X
X
X
X
0
10.7
RADIO
[1]
For description of bit MOD refer to Table 25 and bits FSFREQ[1:0] are described in Table 36.
Table 21.
Second sound IF selection for 10.7 MHz[1]
Bit
fFMPLL (MHz)
BP
MOD
RADIO
W4[6]
W2[7]
W1[7]
0
0
1
[1]
10.7
For description of bit MOD refer to Table 25 and for BP refer to Table 31.
Table 22.
MOD
FM
2nd intercarrier and sound input and output switching
EXTFIL Mode
W2[7] W1[1] W1[0]
Input signal selection Signal at OUT1A and OUT1B
(input switch)
(output switch)
Mono sound
demodulation
1
0
0
FM sound internal
internal BP via FM AGC
internal BP
1
0
1
FM sound EXTFILI
internal BP
external BP
1
1
0
FM sound EXTFMI
internal BP
external input
1
1
1
FM sound EXTFILI
external BP via FM AGC
external BP
0
0
0
AM sound not used
0
0
1
AM sound -
internal BP
internal BP
0
1
0
AM sound -
internal BP
internal BP
0
1
1
AM sound EXTFILI
external BP
internal BP
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
23 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
BYPASS
output
switch
OUT1A
OUT1B
BAND-PASS
W7.1 = 0
W7.1 = 1
FM
switch
3 dB
external filter output
external filter input
external FM input
FM PLL
FM AGC
amplifier
EXTFILI
EXTFILO
EXTFMI
001aad351
Fig 7. Signal path for intercarrier (2nd SIF) processing
Table 23.
Dual mode options
Bit
Output mode
TV2
TV1
DIRECT DUAL
W1[4]
W1[3]
W6[0]
W1[2]
X
X
X
0
all normal mode functions (ATV OR DTV)
0
X
1
1
analog CVBS at pin CVBS AND direct 1st DIF at
pins OUT2A and OUT2B
0
0
0
1
analog CVBS at pin CVBS AND digital zero IF I/Q at
pins OUT1A, OUT1B and OUT2A, OUT2B
0
1
0
1
analog CVBS at pin CVBS AND digital low IF at
pins OUT1A and OUT1B
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
24 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 24.
W2 - data write register bit allocation
7
6
5
4
3
2
1
0
MOD
STD4
STD3
STD2
SB
PLL
GATE
TRAP
Table 25.
W2 - data write register bit description
Bit
Symbol
Description
7
MOD
modulation
1 = negative; FM mono sound at ATV and dual mode
0 = positive; AM mono sound at ATV and dual mode
6 to 4
STD[4:2]
vision IF; see Table 26
3
SB
sideband for sound IF and digital low IF
1 = upper
0 = lower
2
PLL
operating modes; see Table 27
1
GATE
PLL gating
1 = on
0 = off
0
TRAP
sound trap
1 = on
0 = bypass
Table 26.
Vision IF
Bit
fVIF (MHz)
NYQOFF
MOD
STD4
STD3
STD2
W7[0]
W2[7]
W2[6]
W2[5]
W2[4]
X
0
0
0
X
0
0
0
X
0
0
X
0
TV1 = 0 (TSS)
TV1 = 1 (QSS)
0
38.0
38.0
low
1
38.5
38.375
low
1
0
39.0
38.875
low
0
1
1
39.5
39.875
low
X
0
1
0
0
32.0
32.25
high
0
0
1
0
1
32.5
32.625
high
1
0
1
0
1
32.5
33.9
-
X
0
1
1
0
33.0
33.125
high
X
0
1
1
1
33.5
33.625
high
X
1
0
0
0
38.0
38.0
low
X
1
0
0
1
38.5
38.375
low
X
1
0
1
0
39.0
38.875
low
X
1
0
1
1
39.5
39.875
low
X
1
1
0
0
46.5
45.75
low
X
1
1
0
1
59.5
58.75
low
X
1
1
1
0
46.0
46.25
low
X
1
1
1
1
59.0
59.25
low
TDA9899_3
Product data sheet
Sideband
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
25 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 27.
VIF PLL gating and detector mode
Bit
Gating and detector mode
MOD
PLL
W2[7]
W2[2]
0
0
0 % gating in positive modulation mode (W2[1] = 1)
0
1
36 % gating in positive modulation mode (W2[1] = 1)
1
0
π mode on; optimized for overmodulation in negative modulation mode;
fPC = 0 kHz ± 187.5 kHz
1
1
π mode off; optimized for multipath in negative modulation mode;
fPC = 0 kHz ± 187.5 kHz
Table 28.
W3 - data write register bit allocation
7
6
5
4
3
2
1
0
RESCAR
AMUTE
FMUTE
FMWIDE0
DEEMT
DEEM
AGAIN1
AGAIN0
Table 29.
W3 - data write register bit description
Bit
Symbol
Description
7
RESCAR
video gain correction for residual carrier
1 = 20 % residual carrier
0 = 10 % residual carrier
6
AMUTE
auto mute
1 = on
0 = off
5
FMUTE
forced mute
1 = on
0 = off
4
FMWIDE0
FM window (W6[3] = 0)
1 = 475 kHz; normal FM phase detector steepness
0 = 237.5 kHz; high FM phase detector steepness
3
DEEMT
de-emphasis time
1 = 50 µs
0 = 75 µs
2
DEEM
de-emphasis
1 = on
0 = off
1 and 0
AGAIN[1:0]
audio gain
00 = 0 dB
01 = −6 dB
10 = −12 dB (only for FM mode)
11 = −18 dB (only for FM mode)
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
26 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 30.
W4 - data write register bit allocation
7
6
5
4
3
2
1
0
VIFLEVEL
BP
MPP2S1
MPP2S0
AGCSW
IFIN1
IFIN0
VIFIN
Table 31.
W4 - data write register bit description
Bit
Symbol
Description
7
VIFLEVEL
control of internal VIF mixer input level (W1[4] = 1) and
OUT1/OUT2 output level; see Table 32
1 = reduced
0 = normal
6
BP
SIF/DIF BP
1 = on (bit W6[0] = 0; see Table 40)
0 = bypass
5 and 4
MPP2S[1:0]
AGC or AFC output; see Table 33
3
AGCSW
VIF AGC switch state; see Table 34
1 = VIF AGC hold (for diversity detection)
0 = VIF AGC external
2 and 1
IFIN[1:0]
DIF/SIF input
00 = IF1A/B input
01 = IF3A/B input
10 = not used
11 = IF2A/B input
0
VIFIN
VIF input
1 = IF1A/B input
0 = IF2A/B input
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
27 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 32.
List of output signals at OUT1 and OUT2
Bit
Output signal at
TV2
TV1
DIRECT
FM
EXTFIL
OUT2A, OUT2B
W1[4]
W1[3]
W6[0]
W1[1]
W1[0]
0
0
0
X
X
zero IF I
zero IF Q
0
1
0
X
X
low IF
off
0
X
1
X
X
off
direct IF
SIF[2]
1
X
1
0
0
intercarrier[1]
1
X
1
0
1
intercarrier[3]
SIF[2]
SIF[2]
1
X
1
1
0
intercarrier[3]
1
X
1
1
1
intercarrier[1]
SIF[2]
1
X
0
0
0
intercarrier[1]
off
1
X
0
0
1
intercarrier[3]
off
0
intercarrier[3]
off
1
intercarrier[1]
off
1
X
1
0
X
1
0
1
[1]
Intercarrier output level based on wide-band AGC of SIF amplifier.
[2]
SIF output level based on wide-band AGC of SIF amplifier.
[3]
Intercarrier output level based on narrow-band AGC of FM amplifier.
Table 33.
Output mode at pin MPP2 for ATV; dual or radio mode
Bit
Pin MPP2 output mode
WAFP
RADIO
MPP2S1
MPP2S0
W7[6]
W1[7]
W4[5]
W4[4]
0
X
0
0
gain control voltage of FM PLL
0
X
0
1
gain control voltage of SIF amplifier
0
X
1
0
TAGC monitor voltage
0
0
1
1
AFC current output, VIF PLL
0
1
1
1
AFC current output, radio mode
1
X
0
0
voltage output of weak audio signal detector
Table 34.
Control function of bit AGCSW
W4[3]
(AGCSW)
VAGCSWI
Function
0
<1V
VIF AGC from internal
0
>2V
VIF AGC from pin AGCVIN
1
<1V
VIF AGC is not on hold
1
>2V
VIF AGC is on hold
TDA9899_3
Product data sheet
OUT1A, OUT1B
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
28 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 35.
7
W5 - data write register bit allocation
6
FSFREQ1 FSFREQ0
Table 36.
5
4
3
2
1
0
SFREQ5
SFREQ4
SFREQ3
SFREQ2
SFREQ1
SFREQ0
W5 - data write register bit description[1]
Bit
Symbol
Description
7 and 6
FSFREQ[1:0]
DTV filter or sound trap selection for video
ATV; sound trap; TV2 = 1
00 = M/N standard (4.5 MHz)
01 = B/G standard (5.5 MHz)
10 = I standard (6.0 MHz)
11 = D/K and L/L-accent standard (6.5 MHz)
DTV (zero IF); low-pass cut-off frequency; TV2 = 0 and TV1 = 0
00 = 3.0 MHz
01 = 3.5 MHz
10 = 4.0 MHz
11 = not used
DTV (low IF); upper BP cut-off frequency; TV2 = 0 and TV1 = 1
00 = 7.0 MHz
01 = 8.0 MHz
10 = 9.0 MHz
11 = not used
5 to 0
[1]
SFREQ[5:0]
synthesizer frequencies; see Table 37 and Table 38
For bit description of TV1 and TV2 see Table 16 W1[3] and W1[4] and Table 17.
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
29 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 37.
DIF/SIF synthesizer frequencies (using bit TWOFLO = 0)
Bit
SFREQ5
fsynth (MHz)
SFREQ4
SFREQ3
SFREQ2
SFREQ1
SFREQ0
W5[5]
W5[4]
W5[3]
W5[2]
W5[1]
W5[0]
1
1
1
1
1
1
22.0
1
1
1
1
1
0
22.5
1
1
1
1
0
1
23.0
1
1
1
1
0
0
23.5
1
1
1
0
1
1
24.0
1
1
1
0
1
0
24.5
1
1
1
0
0
1
25.0
1
1
1
0
0
0
25.5
1
1
0
1
1
1
26.0
1
1
0
1
1
0
26.5
1
1
0
1
0
1
27.0
1
1
0
1
0
0
27.5
1
1
0
0
1
1
28.0
1
1
0
0
1
0
28.5
1
1
0
0
0
1
29.0
1
1
0
0
0
0
29.5
1
0
1
1
1
1
30.0
1
0
1
1
1
0
30.5
1
0
1
1
0
1
31.0
1
0
1
1
0
0
31.5
1
0
1
0
1
1
32.0
1
0
1
0
1
0
32.5
1
0
1
0
0
1
33.0
1
0
1
0
0
0
33.5
1
0
0
1
1
1
34.0
1
0
0
1
1
0
34.5
1
0
0
1
0
1
35.0
1
0
0
1
0
0
35.5
1
0
0
0
1
1
36.0
1
0
0
0
1
0
36.5
1
0
0
0
0
1
37.0
1
0
0
0
0
0
37.5
0
1
1
1
1
1
38.0
0
1
1
1
1
0
38.5
0
1
1
1
0
1
39.0
0
1
1
1
0
0
39.5
0
1
1
0
1
1
40.0
0
1
1
0
1
0
40.5
0
1
1
0
0
1
41.0
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
30 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 37.
DIF/SIF synthesizer frequencies (using bit TWOFLO = 0) …continued
Bit
fsynth (MHz)
SFREQ5
SFREQ4
SFREQ3
SFREQ2
SFREQ1
SFREQ0
W5[5]
W5[4]
W5[3]
W5[2]
W5[1]
W5[0]
0
1
1
0
0
0
41.5
0
1
0
1
1
1
42.0
0
1
0
1
1
0
42.5
0
1
0
1
0
1
43.0
0
1
0
1
0
0
43.5
0
1
0
0
1
1
44.0
0
1
0
0
1
0
44.5
0
1
0
0
0
1
45.0
0
1
0
0
0
0
45.5
0
0
1
1
1
1
46.0
0
0
1
1
1
0
46.5
0
0
1
1
0
1
47.0
0
0
1
1
0
0
47.5
0
0
1
0
1
1
48.0
0
0
1
0
1
0
48.5
0
0
1
0
0
1
49.0
0
0
1
0
0
0
49.5
0
0
0
1
1
1
50.0
0
0
0
1
1
0
50.5
0
0
0
1
0
1
51.0
0
0
0
1
0
0
51.5
0
0
0
0
1
1
52.0
0
0
0
0
1
0
52.5
0
0
0
0
0
1
53.0
0
0
0
0
0
0
53.5
Table 38.
DIF/SIF synthesizer frequency for zero IF Japan (using bit TWOFLO = 1)
Bit
fsynth (MHz)
SFREQ5
SFREQ4
SFREQ3
SFREQ2
SFREQ1
SFREQ0
W5[5]
W5[4]
W5[3]
W5[2]
W5[1]
W5[0]
1
1
0
0
1
0
TDA9899_3
Product data sheet
57
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
31 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 39.
W6 - data write register bit allocation
7
6
5
4
3
2
1
0
TAGC1
TAGC0
AGC2
AGC1
FMWIDE1
TWOFLO
AUDIOPRO
DIRECT
Table 40.
W6 - data write register bit description
Bit
Symbol
Description
7 and 6
TAGC[1:0]
tuner AGC mode[1]
00 = TAGC integral loop mode; all currents off
01 = TAGC integral loop mode; source current off
10 = TAGC integral loop mode
11 = TAGC derived from IF AGC; recommended for positive
modulated signals
5 and 4
AGC[2:1]
AGC mode and behavior; see Table 41
3
FMWIDE1
FM window
1 = 1 MHz
0 = see Table 29 bit FMWIDE0
2
TWOFLO
synthesizer frequency selection
1 = zero IF Japan mode (57 MHz)
0 = synthesizer mode
1
AUDIOPRO
audio processing (weak signal handling)
1 = on
0 = bypass
0
direct IF at DTV mode; TV2 = 0[2]
DIRECT
1 = direct IF output
0 = zero IF or low IF output
direct SIF at ATV or radio mode; TV2 = 1 or RADIO = 1[2]
1 = buffered SIF output at pins OUT2A and OUT2B
0 = pins OUT2A and OUT2B switched off
[1]
In integral TAGC loop mode the pin TAGC provides sink and source currents for control. TakeOver Point
(TOP) is set via register W9 TOPNEG[4:0].
[2]
For bit description refer to Table 16 and Table 17.
Table 41.
AGC mode and behavior
Bit
VIF AGC; MOD = 1[1]
SIF AGC
AGC2
AGC1
W6[5]
W6[4]
0
0
normal
normal
0
1
off (minimum gain)
off (minimum gain)
1
0
fast
normal
1
1
2nd fast
fast
[1]
For bit description of MOD refer to Table 24 W2[7] and Table 25.
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
32 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 42.
W7 - data write register bit allocation
7
6
FREFOUT
WAFP
Table 43.
5
4
3
SIFLEVEL VIDLEVEL OPSTATE
2
PORT
1
0
FILOUTBP NYQOFF
W7 - data write register bit description
Bit
Symbol
Description
7
FREFOUT reference frequency output
1 = pin FREF works as reference frequency output[1]
0 = pin FREF works as quartz oscillator or reference frequency input
weak FM AF processing control voltage at pin MPP2; see Table 33
6
WAFP
5
SIFLEVEL SIF level reduction
1 = internal SIF level is reduced by 6 dB (only for AM sound)
0 = internal SIF level is normal
4
VIDLEVEL video level reduction
1 = internal video level is reduced by 6 dB
0 = internal video level is normal
3
OPSTATE
output state; PORT = 1
1 = output port is HIGH (external pull-up resistor needed)
0 = output port is LOW
2
PORT
port or VIF AGC monitor
1 = pin MPP1 is logic output port; level depends on OPSTATE
0 = pin MPP1 is VIF AGC monitor output; independent on OPSTATE
FILOUTBP external filter output signal source; see Figure 7
1
1 = signal for external filter is obtained behind internal BP filter
0 = signal for external filter is obtained behind SIF mixer
0
NYQOFF
internal Nyquist processing
1 = internal Nyquist processing off
0 = internal Nyquist processing on
[1]
Pin OPTXTAL wired as quartz oscillator or used as reference frequency input.
Table 44.
W8 - data write register bit allocation
7
6
5
4
3
2
1
0
0
0
0
0
EASY3
EASY2
EASY1
EASY0
Table 45.
W8 - data write register bit description
Bit
Symbol
Description
7 to 4
-
0 = fixed value
3 to 0
EASY[3:0]
easy setting; see Table 46
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
33 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 46.
Easy setting (to be used for fixed bit set-up only)[1]
Bit
EASY3
EASY2
EASY1
EASY0
Mode or
standard
Name
Bit definition (hexadecimal)
W1
W2
W3
W4
W5
W6
W7
W8[3]
W8[2]
W8[1]
W8[0]
0
0
0
0
off
-
-
-
-
-
-
-
-
0
0
0
1
-
-
-
-
-
-
-
-
-
0
0
1
0
-
-
-
-
-
-
-
-
-
0
0
1
1
-
-
-
-
-
-
-
-
-
0
1
0
0
-
-
-
-
-
-
-
-
-
0
1
0
1
I 6.0
ES2
58
B1
CC
60
80
80
0C
0
1
1
0
B/G 5.5
ES3
38
B1
4C
60
40
80
0C
0
1
1
1
direct IF
ES4
08
E1
64
62
00
81
08
1
0
0
0
M Japan 4.5
ES5
18
F1
44
73
00
80
08
1
0
0
1
LIF 6/36
ES6
28
88
60
61
AD
00
0C
1
0
1
0
-
-
-
-
-
-
-
-
-
1
0
1
1
D/K 6.5
ES8
78
B1
4C
70
C0
80
0C
1
1
0
0
radio 5.5
ES9
BB
B8
40
26
6B
00
04
1
1
0
1
-
-
-
-
-
-
-
-
-
1
1
1
0
L 6.5
ES11
79
33
00
60
C0
C0
0C
1
1
1
1
-
-
-
-
-
-
-
-
-
[1]
Access to register W1 to W6 after selection of an easy setting mode would require a transfer of all W1 to W6 register data.
Table 47.
W9 - data write register bit allocation
7
6
5
4
3
2
1
0
DAGCSLOPE
TAGCIS
TAGCTC
TOPNEG4
TOPNEG3
TOPNEG2
TOPNEG1
TOPNEG0
Table 48.
W9 - data write register bit description
Bit
Symbol
Description
7
DAGCSLOPE
AGCDIN input characteristic; see Figure 46
1 = high voltage for high gain
0 = low voltage for high gain
6
TAGCIS
tuner AGC IF input
1 = inverse to VIF input
0 = aligned to VIF input
5
TAGCTC
tuner AGC time constant
1 = 2nd mode
0 = normal
4 to 0
TOPNEG[4:0]
TOP adjustment for integral loop mode; see Table 49
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
34 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 49.
Tuner takeover point adjustment bits W9[4:0]
Bit
TOP adjustment (dBµV)
TOPNEG4
TOPNEG3
TOPNEG2
TOPNEG1
TOPNEG0
W9[4]
W9[3]
W9[2]
W9[1]
W9[0]
1
1
1
1
1
98.2 typical
:
:
:
:
:
see Figure 12
1
0
0
0
0
78.7[1]
:
:
:
:
:
see Figure 12
0
0
0
0
0
57.9 typical
[1]
See Table 55 for parameter tuner takeover point accuracy (αacc(set)TOP).
Table 50.
W10 - data write register bit allocation
7
6
0
0
5
4
3
2
1
0
XPOTPOS TOPPOS4 TOPPOS3 TOPPOS2 TOPPOS1 TOPPOS0
Table 51.
W10 - data write register bit description
Bit
Symbol
Description
7 and 6
-
0 = fixed value
5
XPOTPOS
TOP derived from IF AGC via I2C-bus or potentiometer
1 = TOP adjustment by external potentiometer at pin TOP2
0 = see Table 52
4 to 0
TOPPOS[4:0] TOP adjustment for TAGC derived from IF AGC; see Table 52
Table 52.
Tuner takeover point adjustment bits W10[4:0]
Bit
TOP adjustment (dBµV)
TOPPOS4
TOPPOS3
TOPPOS2
TOPPOS1
TOPPOS0
W10[4]
W10[3]
W10[2]
W10[1]
W10[0]
1
1
1
1
1
99 typical
:
:
:
:
:
see Figure 12
1
0
0
0
0
81[1]
:
:
:
:
:
see Figure 12
0
0
0
0
0
61 typical
[1]
See Table 55 for parameter tuner takeover point accuracy (αacc(set)TOP2).
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
35 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
10. Limiting values
Table 53. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VP
supply voltage
Vn
voltage on any other pin
all pins except ground
tsc
short-circuit time
to ground or VP
Tstg
storage temperature
−40 +150
°C
Tamb
ambient temperature
−20 +70
°C
Tcase
case temperature
TDA9899HL (LQFP48)
-
105
°C
TDA9899HN (HVQFN48)
-
115
°C
human body model
[1]
-
±3000 V
machine model
[2]
-
±300
Vesd
Conditions
electrostatic discharge voltage
[1]
Class 2 according to JESD22-A114.
[2]
Class B according to EIA/JESD22-A115.
Min Max
Unit
-
5.5
V
0
VP
V
-
10
s
V
11. Thermal characteristics
Table 54.
Thermal characteristics
Symbol
Parameter
Conditions
Rth(j-a)
thermal resistance from junction
to ambient
in free air; 2 layer board
Rth(j-c)
Typ
Unit
TDA9899HL (LQFP48)
67
K/W
TDA9899HN (HVQFN48)
48
K/W
TDA9899HL (LQFP48)
19
K/W
TDA9899HN (HVQFN48)
10
K/W
thermal resistance from junction
to case
12. Characteristics
12.1 Analog TV signal processing
Table 55. Characteristics
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
4.5
5.0
5.5
V
-
-
190
mA
Supply; pin VP
VP
supply voltage
IP
supply current
[1]
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
36 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
power-on reset supply
voltage
for start of reset at
decreasing supply voltage
for end of reset at
increasing supply voltage;
I2C-bus transmission
enable
Min
Typ
Max
Unit
[2]
2.5
3.0
3.5
V
[2]
-
3.3
4.4
V
Power-on reset
VP(POR)
VIF amplifier; pins IF1A, IF1B, IF2A and IF2B
VI
input voltage
-
1.95
-
V
-
2
-
kΩ
-
3
-
pF
lower limit at −1 dB video
output signal
-
60
100
µV
upper limit at +1 dB video
output signal
150
190
-
mV
-
-
320
mV
-
0.7
-
dB
Ri(dif)
differential input resistance
[3]
Ci(dif)
differential input capacitance
[3]
Vi(IF)(RMS)
RMS IF input voltage
permissible overload
[4]
∆GIF
IF gain variation
GVIF(cr)
control range VIF gain
60
66
-
dB
f−3dB(VIF)l
lower VIF cut-off frequency
-
15
-
MHz
f−3dB(VIF)u
upper VIF cut-off frequency
-
80
-
MHz
0.9
-
3.6
V
FPLL and true synchronous video
difference between
picture and sound carrier;
within AGC range;
∆f = 5.5 MHz
demodulator[5]
VLFVIF
voltage on pin LFVIF (DC)
fVCO(max)
maximum VCO frequency
fVCO = 2fPC
120
140
-
MHz
fVIF
VIF frequency
see Table 26
-
-
-
MHz
∆fVIF(dah)
digital acquisition help VIF
frequency window
related to fVIF
-
±2.3
-
MHz
-
±1.8
-
MHz
-
-
30
ms
-
30
70
µV
all standards except
M/N
M/N standard
tacq
acquisition time
BLF(−3dB) = 70 kHz
Vlock(min)(RMS)
RMS minimum lock-in
voltage
measured on pins IF1A
and IF1B or IF2A and
IF2B; maximum IF gain;
negative modulation
mode W2[7] = 1 and PLL
set to overmodulation
mode W2[2] = 0 and
W2[1] = 0
TDA9899_3
Product data sheet
[6]
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
37 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Tcy(dah)
Conditions
Min
Typ
Max
Unit
digital acquisition help cycle
time
-
64
-
µs
tw(dah)
digital acquisition help pulse
width
64
-
-
µs
Ipul(acq)VIF
VIF acquisition pulse current
sink or source
21
-
33
µA
KO(VIF)
VIF VCO steepness
∆fVIF / ∆VLFVIF
-
26
-
MHz/V
KD(VIF)
VIF phase detector
steepness
∆IVPLL / ∆ϕVCO(VIF)
-
23
-
µA/rad
Ioffset(VIF)
VIF offset current
−1
0
+1
µA
W4[7] = 0; W7[4] = 0
1.7
2.0
2.3
V
W4[7] = 1; W7[4] = 0
1.7
2.0
2.3
V
W4[7] = 0; W7[4] = 1
1.7
2.0
2.3
V
W4[7] = 1; W7[4] = 1
-
2.0
-
V
W4[7] = 0; W7[4] = 0
−240
-
+240
mV
W4[7] = 1; W7[4] = 0
−240
-
+240
mV
W4[7] = 0; W7[4] = 1
−240
-
+240
mV
2.0
2.33
2.75
W4[7] = 0; W7[4] = 0
1.0
1.2
1.4
V
W4[7] = 1; W7[4] = 0
0.9
1.2
1.5
V
W4[7] = 0; W7[4] = 1
0.9
1.2
1.5
V
VP − 1.2 VP − 1
-
V
-
0.4
0.9
V
-
-
30
Ω
1.5
2.0
-
mA
Video output 2 V; pin
CVBS[7]
Normal mode (sound carrier trap active) and sound carrier on
Vo(video)(p-p)
∆Vo(CVBS)
peak-to-peak video output
voltage
CVBS output voltage
difference
Vvideo/Vsync
video voltage to sync voltage
ratio
Vsyncl
sync level voltage
Vclip(video)u
upper video clipping voltage
Vclip(video)l
lower video clipping voltage
positive or negative
modulation; see Figure 8
difference between
L and B/G standard
[3]
RO
output resistance
Ibias(int)
internal bias current (DC)
Isink(o)(max)
maximum output sink current AC and DC
1
-
-
mA
Isource(o)(max)
maximum output source
current
AC and DC
3.9
-
-
mA
∆Vo(CVBS)
CVBS output voltage
difference
50 dB gain control
-
-
0.5
dB
30 dB gain control
-
-
0.1
dB
black level tilt to CVBS
voltage ratio
negative modulation
-
-
1
%
∆Vblt/VCVBS
for emitter-follower
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
38 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
∆Vblt(v)/VCVBS
vertical black level tilt to
CVBS voltage ratio
worst case in L standard;
vision carrier modulated
by test line [Vertical
Interval Test Signal
(VITS)] only
-
-
3
%
Gdif
differential gain
“ITU-T J.63 line 330”
-
-
5
%
-
-
7
%
B/G standard
-
2
4
deg
L standard
-
2
4
deg
53
57
-
dB
[8]
B/G standard
L standard
ϕdif
differential phase
“ITU-T J.63 line 330”
[8]
[9]
(S/N)w
weighted signal-to-noise ratio B/G standard; 50 % grey
video signal; unified
weighting filter
(“ITU-T J.61”);
see Figure 19
(S/N)unw
unweighted signal-to-noise
ratio
M/N standard; 50 IRE
grey video signal;
see Figure 19
47
51
-
dB
VPC(rsd)(RMS)
RMS residual picture carrier
voltage
fundamental wave and
harmonics
-
2
5
mV
∆fPC(p-p)
peak-to-peak picture carrier
frequency variation
3 % residual carrier;
50 % serration pulses;
L standard
[3]
-
-
12
kHz
∆ϕ
phase difference
0 % residual carrier;
50 % serration pulses;
L standard;
L-gating = 0 %
[3]
-
-
3
%
αH(video)
video harmonics suppression AC load: CL < 20 pF,
RL > 1 kΩ
[10]
35
40
-
dB
αsp
spurious suppression
[11]
40
-
-
dB
PSRRCVBS
power supply ripple rejection
on pin CVBS
fripple = 70 Hz;
video signal; grey level;
positive and negative
modulation; see Figure 9
14
20
-
dB
0.5 MHz to 2.5 MHz
−1
-
+1
dB
2.5 MHz to 3.6 MHz
−2
-
+2
dB
3.6 MHz to 3.8 MHz
−3
-
+2
dB
3.8 MHz to 4.2 MHz
−16
-
+2
dB
38
-
-
dB
29
-
-
dB
M/N standard inclusive Korea; see Figure 20[12]
αripple(resp)f
αSC1
frequency response ripple
first sound carrier attenuation f = fSC1 = 4.5 MHz
f = fSC1 ± 60 kHz
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
39 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
αSC2
second sound carrier
attenuation
f = fSC2 = 4.724 MHz
25
-
-
dB
td(grp)CC
color carrier group delay time f = 3.58 MHz; including
transmitter pre-correction;
see Figure 21
f = fSC2 ± 60 kHz
16
-
-
dB
−75
−50
+75
ns
0.5 MHz to 3.2 MHz
−1
-
+1
dB
3.2 MHz to 4.5 MHz
−2
-
+2
dB
4.5 MHz to 4.8 MHz
−4
-
+2
dB
4.8 MHz to 5 MHz
−12
-
+2
dB
35
-
-
dB
f = fSC1 ± 60 kHz
26
-
-
dB
f = fSC2 = 5.742 MHz
25
-
-
dB
[13]
B/G standard; see Figure 22[12]
αripple(resp)f
αSC1
frequency response ripple
first sound carrier attenuation f = fSC1 = 5.5 MHz
αSC2
second sound carrier
attenuation
f = fSC2 ± 60 kHz
16
-
-
dB
αSC(NICAM)
NICAM sound carrier
attenuation
fcar(NICAM) = 5.85 MHz;
f = fcar(NICAM) ± 250 kHz
12
-
-
dB
α
attenuation
f = f(N+1)ch = 7 MHz
21
-
-
dB
td(grp)CC
color carrier group delay time f = 4.43 MHz; including
transmitter pre-correction;
see Figure 23
f = f(N+1)ch ± 750 kHz
5
-
-
dB
−75
−10
+75
ns
0.5 MHz to 3.2 MHz
−1
-
+1
dB
3.2 MHz to 4.5 MHz
−2
-
+2
dB
4.5 MHz to 5 MHz
−4
-
+2
dB
5 MHz to 5.5 MHz
−12
-
+2
dB
35
-
-
dB
f = fSC1 ± 60 kHz
26
-
-
dB
fcar(NICAM) = 6.55 MHz;
f = fcar(NICAM) ± 250 kHz
12
-
-
dB
−75
−15
+75
ns
[13]
I standard; see Figure 24[12]
αripple(resp)f
αSC1
frequency response ripple
first sound carrier attenuation f = fSC1 = 6.0 MHz
αSC(NICAM)
NICAM sound carrier
attenuation
td(grp)CC
color carrier group delay time f = 4.43 MHz;
see Figure 25
[13]
D/K standard; see Figure 26[12]
αripple(resp)f
frequency response ripple
0.5 MHz to 3.1 MHz
−1
-
+1
dB
3.1 MHz to 4.5 MHz
−2
-
+2
dB
4.5 MHz to 4.8 MHz
−4
-
+2
dB
4.8 MHz to 5.1 MHz
−6
-
+2
dB
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
40 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
αSC1
first sound carrier attenuation f = fSC1 = 6.5 MHz
αSC2(us)
second sound carrier
attenuation (upper side)
Min
Typ
Max
Unit
35
-
-
dB
f = fSC1 ± 60 kHz
26
-
-
dB
f = fSC2 = 6.742 MHz
25
-
-
dB
f = fSC2 ± 60 kHz
16
-
-
dB
f = fSC2 = 6.258 MHz
25
-
-
dB
αSC2(ls)
second sound carrier
attenuation (lower side)
αSC(NICAM)
NICAM sound carrier
attenuation
td(grp)CC
color carrier group delay time f = 4.28 MHz; including
transmitter pre-correction;
see Figure 27
f = fSC2 ± 60 kHz
16
-
-
dB
fcar(NICAM) = 5.85 MHz;
f = fcar(NICAM) ± 250 kHz
6
-
-
dB
−50
0
+100
ns
0.5 MHz to 3.2 MHz
−1
-
+1
dB
3.2 MHz to 4.5 MHz
−2
-
+2
dB
4.5 MHz to 4.8 MHz
−4
-
+2
dB
4.8 MHz to 5.3 MHz
−12
-
+2
dB
fcar(NICAM) = 5.85 MHz;
f = fcar(NICAM) ± 250 kHz
5
-
-
dB
38
-
-
dB
29
-
-
dB
−75
−5
+75
ns
-
1.1
-
V
1.5
-
V
[13]
L standard; see Figure 28[12]
αripple(resp)f
frequency response ripple
αSC(NICAM)
NICAM sound carrier
attenuation
αSC(AM)
AM sound carrier attenuation f = fSC(AM) = 6.5 MHz
f = fSC(AM) ± 30 kHz
td(grp)CC
color carrier group delay time f = 4.28 MHz; including
transmitter pre-correction;
see Figure 29
Video output 1.1 V; pin CVBS
Trap bypass mode and sound carrier off[12]
Vo(video)(p-p)
peak-to-peak video output
voltage
see Figure 8
Vsyncl
sync level voltage
-
Vclip(video)u
upper video clipping voltage
VP − 1.1 VP − 1
-
V
-
0.4
0.9
V
6
8
-
MHz
Vclip(video)l
lower video clipping voltage
Bvideo(−3dB)
−3 dB video bandwidth
(S/N)w
weighted signal-to-noise ratio B/G standard; 50 % grey
video signal; unified
weighting filter
(“ITU-T J.61”);
see Figure 19
[9]
54
-
-
dB
(S/N)unw
unweighted signal-to-noise
ratio
[9]
47
51
-
dB
AC load: CL < 20 pF,
RL > 1 kΩ
M/N standard; 50 IRE
grey video signal;
see Figure 19
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
41 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Loop filter synthesizer; pin LFSYN1
VLFSYN1
voltage on pin LFSYN1
1.0
-
3.5
V
Isource(o)PD(max)
maximum phase detector
output source current
-
-
65
µA
Isink(o)PD(max)
maximum phase detector
output sink current
-
-
65
µA
KO
VCO steepness
-
3.75
-
MHz/V
KD
phase detector steepness
-
9
-
µA/rad
0.5
-
4.5
V
1 mV (60 dBµV)
2.2
-
2.6
V
10 mV (80 dBµV)
2.5
-
3.1
V
Pin MPP1 operating as VIF AGC voltage monitor
Vmonitor(VIFAGC)
VIF AGC monitor voltage
VAGC
AGC voltage
[3]
see Figure 10; Vi(IF) set to
200 mV (106 dBµV)
Io(max)
tresp
maximum output current
response time
sink or source
increasing VIF step;
negative modulation
3
-
4
V
10
-
-
µA
[14]
normal mode
-
4.3
-
µs/dB
fast mode
-
1.5
-
µs/dB
-
130
-
µs/dB
-
1.9
-
ms/dB
increasing VIF step;
positive modulation;
normal mode
[14]
decreasing VIF step;
negative modulation
[14]
normal mode
fast normal mode
-
0.08
-
ms/dB
2nd mode
-
0.25
-
ms/dB
-
0.01
-
ms/dB
20 dB
-
890
-
ms
fast mode
-
2.6
-
ms/dB
normal mode
-
143
-
ms/dB
fast 2nd mode
decreasing VIF step;
positive modulation
[14]
αth(fast)VIF
VIF fast mode threshold
L standard
−10
−6
−2
dB
∆VVAGC(step)
VIF AGC voltage difference
(step)
see Table 11
-
40
-
mV/bit
-
-
0.4
V
Pin MPP1 operating as open-collector output port
VOL
LOW-level output voltage
I = 2 mA (sink)
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
42 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Isink(o)
output sink current
W7[3] = 0
-
-
3
mA
µA
VOH
HIGH-level output voltage
W7[3] = 1
-
-
10
-
-
VP + 0.5 V
VIF AGC; pin CIFAGC
Ich(max)
maximum charge current
L standard
75
100
125
µA
Ich(add)
additional charge current
L standard: in the event of
missing VITS pulses and
no white video content
-
100
-
nA
Idch
discharge current
L standard; normal mode
-
35
-
nA
L standard; fast mode
-
1.8
-
µA
VIF AGC control; pin AGCVIN
maximum input sink current
[3]
-
-
1
µA
Isource(i)(max)
maximum input source
current
[3]
-
-
1
µA
Vi(max)
maximum input voltage
[3]
-
-
VP
V
VAGCVIN
voltage on pin AGCVIN
[3]
1
-
3.5
V
∆GVIF/∆VAGCVIN
change of VIF gain with
voltage on pin AGCVIN
-
−75
-
dB/V
Isink(i)(max)
VAGCVIN = 2.8 V
Tuner AGC; pin TAGC
Integral TAGC loop mode (W6[7:6] = 10); TAGC is current output; applicable for negative modulation only; unmodulated VIF;
see Table 48 and Figure 12
Vi(IF)(RMS)
RMS IF input voltage
αacc(set)TOP
TOP setting accuracy
Isource
source current
at starting point of tuner
AGC takeover;
Isink(TAGC) = 100 µA
W9[4:0] = 0 0000
-
57.9
-
dBµV
W9[4:0] = 1 0000
-
78.7
-
dBµV
W9[4:0] = 1 1111
-
98.2
-
dBµV
−2
-
+2
dB
TAGC charge current
normal mode
0.20
0.27
0.34
µA
fast mode activated by
internal level detector
7
10
13
µA
Isink
sink current
TAGC discharge current;
VTAGC = 1 V
400
500
600
µA
∆αacc(set)TOP/∆T
TOP setting accuracy
variation with temperature
W9[4:0] = 1 0000
-
-
0.02
dB/K
RL
load resistance
50
-
-
MΩ
Vsat(u)
upper saturation voltage
VP − 0.3 -
-
V
[3]
pin operating as current
output
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
43 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Vsat(l)
lower saturation voltage
pin operating as current
output
-
-
0.3
V
αth(fast)AGC
AGC fast mode threshold
activated by internal fast
AGC detector; I2C-bus
setting corresponds to
W9[4:0] = 1 0000
6
8
10
dB
td
delay time
before activating; Vi(IF)
below αth(fast)AGC
40
60
80
ms
[3]
TAGC loop based on VIF AGC (W6[7:6] = 11); TAGC is voltage output; applicable for TV mode: positive modulation and
optional for negative modulation); see Table 51; Figure 12 and Figure 13
Vi(IF)(RMS)
αacc(set)TOP2
RMS IF input voltage
∆Gslip(TAGC)
RTOP2 = 22 kΩ or
W10[5:0] = 00 0000
-
61
-
dBµV
RTOP2 = 10 kΩ or
W10[5:0] = 01 0000
-
81
-
dBµV
RTOP2 = 0 kΩ
-
96
-
dBµV
W10[5:0] = 01 1111
-
99
-
dBµV
−6
-
+6
dB
VTAGC = 3.5 V
-
0.03
0.07
dB/K
no tuner gain reduction
4.5
-
VP
V
maximum tuner gain
reduction
0.2
-
0.6
V
tuner gain voltage from
0.6 V to 3.5 V
3
5
8
dB
-
3.5
-
V
-
27
-
kΩ
W10[5] = 1; external
resistor operation
0
-
22
kΩ
W10[5] = 0; forced
I2C-bus operation
100
-
-
kΩ
TOP2 setting accuracy
∆αacc(set)TOP2/∆T TOP2 setting accuracy
variation with temperature
VO
at starting point of tuner
AGC takeover;
VTAGC = 3.5 V
output voltage
TAGC slip gain offset
TOP adjust 2; pin TOP2; IF based TAGC loop mode; see Figure 13
VTOP2
voltage on pin TOP2 (DC)
RI
input resistance
RTOP2
resistance on pin TOP2
pin open-circuit
adjustment of VIF AGC
based TAGC loop
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
44 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
AGC switch; pin AGCSWI
VAGCSWI
RI
voltage on pin AGCSWI (DC) pin open-circuit
-
0
-
V
LOW-level input voltage;
see Table 34
-
-
1
V
HIGH-level input voltage;
see Table 34
2
-
-
V
-
50
-
kΩ
input resistance
Pin CTAGC
VCTAGC
IL
voltage on pin CTAGC
[3]
0.2
-
0.55VP
V
leakage current
sink
[3]
-
-
10
nA
source
[3]
-
-
10
nA
Control current or voltage monitor output; pin MPP2
General
Vsat(u)
upper saturation voltage
VP − 0.8 VP − 0.5 -
V
Vsat(l)
lower saturation voltage
-
0.5
0.8
V
100 kHz VIF deviation
80
-
160
µA
200 kHz VIF deviation
160
200
240
µA
1.5 MHz VIF deviation
160
-
240
µA
[16]
0.85
1.05
1.25
µA/kHz
AFC (current output)
Io
output current
sink or source;
see Figure 16 and
Figure 17
[15][16]
AFC TV mode
∆IAFC/∆fVIF
change of AFC current with
VIF frequency
fVIFacc(dig)
digital accuracy of VIF
frequency
read-out via I2C-bus;
R1[4:1] = f0; fref = 4 MHz
[17]
−20
-
+20
kHz
fVIFacc(a)
analog accuracy of VIF
frequency
IAFC = 0 A; fref = 4 MHz
[17]
−20
-
+20
kHz
[16]
0.85
1.05
1.25
µA/kHz
AFC radio mode
∆IAFC/∆fRIF
change of AFC current with
RIF frequency
fRIFacc(dig)
digital accuracy of RIF
frequency
read-out via I2C-bus;
R1[4:1] = f0; fref = 4 MHz
[17]
−10
-
+10
kHz
fRIFacc(a)
analog accuracy of RIF
frequency
IAFC = 0 A; fref = 4 MHz
[17]
−10
-
+10
kHz
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
45 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
voltage on pin MPP2 to
internal control voltage;
see Table 33
-
0
-
dB
SIF AGC
-
6
-
dB
FM AGC
-
6
-
dB
WAFP
-
6
-
dB
TAGC
-
0
-
dB
350
-
-
µA
AGC or WAFP monitor (voltage output)
Gv
Io(max)
voltage gain
maximum output current
sink or source
SIF amplifier; pins IF3A and IF3B or pins IF1A and IF1B or pins IF2A and IF2B
VI
input voltage
-
1.95
-
V
Ri(dif)
differential input resistance
-
2
-
kΩ
Ci(dif)
differential input capacitance
-
3
-
pF
Vi(SIF)(RMS)
RMS SIF input voltage
FM mode; −3 dB at
intercarrier output
pins OUT1A and OUT1B;
without FM AGC;
see Table 22
-
60
100
µV
AM mode; −3 dB at
AF output pin AUD
-
40
70
µV
FM mode; +1 dB at
intercarrier output
pins OUT1A and OUT1B;
without FM AGC;
see Table 22
150
190
-
mV
AM mode; +1 dB at
AF output pin AUD
70
140
-
mV
permissible overload
-
-
320
mV
FM and AM mode
60
66
-
dB
GSIF(cr)
control range SIF gain
f−3dB(SIF)l
lower SIF cut-off frequency
-
7
-
MHz
f−3dB(SIF)u
upper SIF cut-off frequency
-
80
-
MHz
W2[7] = 1
-
1.0
-
V
W2[7] = 0; AM = 0 %
-
0.5
-
V
W2[7] = 1
-
0.5
-
V
W2[7] = 0; AM = 0 %
-
0.25
-
V
Buffered SIF; pins OUT2A and OUT2B
Vo(dif)(p-p)
peak-to-peak differential
output voltage
W6[0] = 1; W4[7] = 0;
fSIF ≤ 45 MHz
W6[0] = 1; W4[7] = 1;
fSIF ≤ 60 MHz
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
46 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RL(max)
maximum load resistance
single-ended to GND
1
-
-
kΩ
CL(max)
maximum load capacitance
single-ended to GND
-
-
5
pF
increasing
-
8
-
ms
decreasing
-
25
-
ms
increasing
-
80
-
ms
decreasing
-
250
-
ms
increasing
-
0.3
-
ms
decreasing
-
20
-
ms
increasing
-
0.1
-
ms
decreasing
-
4
-
ms
VSIF = 100 µV
1.5
-
2.4
V
VSIF = 10 mV
2.6
-
3.4
V
VSIF = 140 mV
3.3
-
VP
V
VSIF = 100 µV
1.5
-
2.4
V
VSIF = 10 mV
2.9
-
3.9
V
VSIF = 140 mV
3.3
-
VP
V
1
-
3
V
-
31
-
MHz/V
SIF AGC detector; pin MPP2; see Figure 15
tresp
response time
increasing or decreasing
SIF step of 20 dB;
AM mode; fast AGC
increasing or decreasing
SIF step of 20 dB;
AM mode; slow AGC
increasing or decreasing
SIF step of 20 dB;
FM mode; normal AGC
increasing or decreasing
SIF step of 20 dB;
FM mode; fast AGC
VAGC(SIF)
SIF AGC voltage
FM mode
AM mode
Conversion synthesizer PLL; pin LFSYN2 (TSS mode)
VLFSYN2
voltage on pin LFSYN2
KO
VCO steepness
∆fVCO / ∆VLFSYN2
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
47 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
KD
phase detector steepness
∆ILFSYN2 / ∆ϕVCO;
see Table 59;
fVCO selection:
Io(PD)
ϕn(synth)
αsp
Min
Typ
Max
Unit
22 MHz to 29.5 MHz
-
32
-
µA/rad
30 MHz to 37.5 MHz
-
38
-
µA/rad
38 MHz to 45.5 MHz
-
47
-
µA/rad
46 MHz to 53.5 MHz
-
61
-
µA/rad
57 MHz
-
61
-
µA/rad
22 MHz to 29.5 MHz
-
200
-
µA
30 MHz to 37.5 MHz
-
238
-
µA
38 MHz to 45.5 MHz
-
294
-
µA
phase detector output current sink or source;
fVCO selection:
synthesizer phase noise
spurious suppression
46 MHz to 53.5 MHz
-
384
-
µA
57 MHz
-
384
-
µA
with 4 MHz crystal
oscillator reference;
fsynth = 31 MHz;
fIF = 36 MHz
at 1 kHz
[3]
89
99
-
dBc/Hz
at 10 kHz
[3]
89
99
-
dBc/Hz
at 100 kHz
[3]
98
102
-
dBc/Hz
at 1.4 MHz
[3]
115
119
-
dBc/Hz
multiple of ∆f = 500 kHz
[3]
50
-
-
dBc
[3]
-
-
10
nA
-
50
-
dB
1.8
2.0
2.2
V
1.8
2.0
2.2
V
2.0
2.5
-
mA
IL
leakage current
synthesizer spurious
performance > 50 dBc
PSRR
power supply ripple rejection
residual spurious at
nominal differential output
voltage dependent on
power supply ripple at
70 Hz; see Figure 9
Single reference QSS/TSS intercarrier mixer; pins OUT1A and OUT1B
VOUT1A
voltage on pin OUT1A (DC)
VOUT1B
voltage on pin OUT1B (DC)
Ibias(int)
internal bias current (DC)
Isink(o)(max)
maximum output sink current DC and AC
1.4
1.7
-
mA
Isource(o)(max)
maximum output source
current
3.0
-
-
mA
for emitter-follower
DC and AC; with external
resistor to GND
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
48 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RO
output resistance
output active;
single-ended to GND
-
-
25
Ω
output inactive; internal
resistance to GND
-
800
-
Ω
IF intercarrier
single-ended to GND;
SC1 on; SC2 off
90
140
180
mV
45
70
90
mV
Vo(RMS)
RMS output voltage
IF intercarrier
single-ended to GND;
L standard;
without modulation;
BP on
W7[5] = 0
20
35
45
mV
f−3dB(ic)u
upper intercarrier cut-off
frequency
internal sound band-pass
off
W7[5] = 1
11
15
-
MHz
αimage
image rejection
band-pass off;
−8 MHz to 0 MHz
24
28
-
dB
Vinterf(RMS)
RMS interference voltage
fundamental wave and
harmonics
-
2
5
mV
-
5
-
dB
AM intercarrier from pin EXTFILI to pins OUT1A and OUT1B
G
gain
IF intercarrier; L standard;
without modulation
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
49 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
center frequency
QSS mode;
BP selection for standard
M/N
-
4.7
-
MHz
B/G
-
5.75
-
MHz
I
-
6.25
-
MHz
D/K
-
6.25
-
MHz
L/L-accent
-
6.05
-
MHz
M/N, B/G or I
-
5.1
-
MHz
D/K
-
5.75
-
MHz
L/L-accent
-
6.95
-
MHz
M/N
-
4.7
-
MHz
B/G
-
5.75
-
MHz
I
-
6.25
-
MHz
D/K
-
6.78
-
MHz
RADIO
-
10.7
-
MHz
M/N, B/G, I, D/K or
L/L-accent standard
fc + 0.5
fc + 0.65 fc + 0.8
RADIO 10.7
fc + 0.25 fc + 0.4
M/N, B/G, I, D/K or
L/L-accent standard
fc − 0.5
RADIO 10.7
fc − 0.25 fc − 0.4
fc − 0.55 MHz
M/N, B/G, I, D/K or
L/L-accent standard
20
30
-
dB
RADIO 10.7
15
25
-
dB
Band-pass mode
fc
TSS mode; BP selection
recommended for
standard
radio mode;
BP selection for standard
f−3dB(BP)u
f−3dB(BP)l
αstpb
upper BP cut-off frequency
lower BP cut-off frequency
stop-band attenuation
fc + 0.55 MHz
fc − 0.65 fc − 0.8
MHz
at fc ± 1.5 MHz
TDA9899_3
Product data sheet
MHz
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
50 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
αCC
color carrier attenuation
QSS mode;
BP selection for standard
M/N; fCC = 3.58 MHz
15
23
-
dB
B/G; fCC = 4.43 MHz
22
30
-
dB
I; fCC = 4.43 MHz
20
28
-
dB
D/K; fCC = 4.28 MHz
20
28
-
dB
L/L-accent;
fCC = 4.28 MHz
20
28
-
dB
M/N; fCC = 5.42 MHz
15
23
-
dB
B/G; fCC = 6.57 MHz
22
30
-
dB
I; fCC = 7.57 MHz
20
25
-
dB
L/L-accent;
fCC = 8.72 MHz
20
28
-
dB
1.8
2.0
2.2
V
420
620
820
mV
W7[5] = 0
210
310
410
mV
W7[5] = 1
105
155
205
mV
AC and DC
1
-
-
mA
see Table 18 and
Table 21
-
4.5
-
MHz
-
5.5
-
MHz
-
6.0
-
MHz
-
6.5
-
MHz
-
10.7
-
MHz
fFMPLL = 4.5 MHz
1.5
1.9
3.3
V
fFMPLL = 5.5 MHz
1.5
2.2
3.3
V
fFMPLL = 6.0 MHz
1.5
2.35
3.3
V
fFMPLL = 6.5 MHz
1.5
2.5
3.3
V
fFMPLL = 10.7 MHz
1.5
2.4
3.3
V
-
64
-
µs
TSS mode;
BP selection for standard
External filter output; pin EXTFILO
VEXTFILO
voltage on pin EXTFILO (DC)
VEXTFILO(p-p)
peak-to-peak voltage on
pin EXTFILO
IF intercarrier; SC1 on;
SC2 off
IF intercarrier; L standard;
without modulation
Io(max)
maximum output current
FM PLL demodulator
fFMPLL
FM PLL frequency
FM PLL filter; pin LFFM
VLFFM
Tcy(dah)
voltage on pin LFFM
digital acquisition help cycle
time
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
51 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
tw(dah)
digital acquisition help pulse
width
Io(dah)
digital acquisition help output sink or source
current
W3[4] = 0; W6[3] = 0;
FM window
width = 237.5 kHz
KD(FM)
KO(FM)
Ioffset(FM)
FM phase detector
steepness
FM VCO steepness
FM offset current
Conditions
Min
Typ
Max
Unit
-
16
-
µs
14
18
22
µA
W3[4] = 1; W6[3] = 0;
FM window
width = 475 kHz
28
36
44
µA
W3[4] = 0; W6[3] = 1;
FM window
width = 1 MHz
14
18
22
µA
W3[4] = 1; W6[3] = 1;
FM window
width = 1 MHz
28
36
44
µA
W3[4] = 0; W6[3] = 0;
FM window
width = 237.5 kHz
-
4
-
µA/rad
W3[4] = 1; W6[3] = 0;
FM window
width = 475 kHz
-
10
-
µA/rad
W3[4] = 0; W6[3] = 1;
FM window
width = 1 MHz
-
4
-
µA/rad
W3[4] = 1; W6[3] = 1;
FM window
width = 1 MHz
-
10
-
µA/rad
f < 10 MHz
-
3.3
-
MHz/V
f = 10.7 MHz
-
5.9
-
MHz/V
W6[3] = 0; W3[4] = 0
−1.5
0
+1.5
µA
W6[3] = 0; W3[4] = 1
−2.5
0
+2.5
µA
∆IFMPLL / ∆ϕVCO(FM)
∆fFMPLL / ∆VLFFM
FM intercarrier input; pins EXTFMI and EXTFILI; see Figure 14
|Zi|
input impedance
AC-coupled via 4 pF
-
20
-
kΩ
Vi(FM)(RMS)
RMS FM input voltage
gain controlled operation;
W1[1:0] = 10 or
W1[1:0] = 11 or
W1[1:0] = 01
2
-
300
mV
Vlock(min)(RMS)
RMS minimum lock-in
voltage
W1[1:0] = 10 or
W1[1:0] = 11 or
W1[1:0] = 01
-
-
1.5
mV
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
52 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Vdet(FM)min(RMS)
RMS minimum FM carrier
detection voltage
W1[1:0] = 10 or
W1[1:0] = 11 or
W1[1:0] = 01
-
-
1.8
mV
QSS or TSS mode;
25 kHz FM deviation;
75 µs de-emphasis
400
500
600
mV
QSS or TSS mode;
27 kHz FM deviation;
50 µs de-emphasis
430
540
650
mV
QSS or TSS mode;
55 kHz FM deviation;
50 µs de-emphasis
900
-
1300
mV
radio mode;
22.5 kHz FM deviation;
75 µs de-emphasis
360
450
540
mV
-
3 × 10−3 7 × 10−3 dB/K
-
0.15
0.50
%
W3[1:0] = 00 (audio
gain = 0 dB)
±55
-
-
kHz
W3[1:0] = 01 (audio
gain = −6 dB)
±110
-
-
kHz
W3[1:0] = 10 (audio
gain = −12 dB)
±170
-
-
kHz
W3[1:0] = 11 (audio
gain = −18 dB) and
W3[4] = 1 (FM window
width = 475 kHz)
±380
-
-
kHz
FM window
width = 237.5 kHz;
−6 dB audio gain;
FM deviation 100 kHz
15
-
-
kHz
FM window
width = 475 kHz;
−18 dB audio gain;
FM deviation 300 kHz
15
-
-
kHz
FM demodulator part; audio output; pin AUD
Vo(AF)(RMS)
RMS AF output voltage
∆Vo(AF)/∆T
AF output voltage variation
with temperature
THD
total harmonic distortion
50 µs de-emphasis;
FM deviation: for
TV mode 27 kHz and for
radio mode 22.5 kHz
∆fAF(max)
maximum AF frequency
deviation
THD < 2 %; pre-emphasis
off; fAF = 400 Hz
fAF(max)
maximum AF frequency
THD < 2 %;
pre-emphasis off
TDA9899_3
Product data sheet
[18]
[3]
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
53 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
f−3dB(AF)
AF cut-off frequency
W3[2] = 0; W3[4] = 0;
without de-emphasis;
FM window
width = 237.5 kHz
80
100
-
kHz
(S/N)w(AF)
AF weighted signal-to-noise
ratio
27 kHz FM deviation;
50 µs de-emphasis; vision
carrier unmodulated;
FM PLL only;
“ITU-R BS.468-4”
48
56
-
dB
(S/N)unw(AF)
AF unweighted
signal-to-noise ratio
radio mode (10.7 MHz);
22.5 kHz FM deviation;
75 µs de-emphasis
-
58
-
dB
VSC(rsd)(RMS)
RMS residual sound carrier
voltage
fundamental wave and
harmonics; without
de-emphasis
-
-
2
mV
αAM
AM suppression
referenced to 27 kHz
FM deviation;
50 µs de-emphasis;
AM: f = 1 kHz; m = 54 %
35
46
-
dB
PSRR
power supply ripple rejection
fripple = 70 Hz;
see Figure 9
14
20
-
dB
-
-
300
Ω
Audio amplifier
Audio output; pin AUD
RO
output resistance
VO
output voltage
RL
load resistance
CL
load capacitance
Vo(AF)(RMS)
RMS AF output voltage
[3]
2.0
2.4
2.7
V
AC-coupled
[3]
10
-
-
kΩ
DC-coupled
[3]
100
-
-
kΩ
[3]
-
-
1
nF
0 dB
400
500
600
mV
−6 dB
-
250
-
mV
−12 dB
-
125
-
mV
−18 dB
-
62.5
-
mV
0 dB
400
500
600
mV
−6 dB
-
250
-
mV
25 kHz FM deviation;
75 µs de-emphasis;
see Table 29
AM; m = 54 %;
see Table 29
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
54 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
f−3dB(AF)u
f−3dB(AF)l
Parameter
upper AF cut-off frequency
lower AF cut-off frequency
Conditions
Min
Typ
Max
Unit
W6[1] = 0 (audio
processing off)
-
150
-
kHz
W6[1] = 1 (audio
processing on);
no interference
-
26
-
kHz
W6[1] = 1 (audio
processing on);
interference at 90 kHz
AF and 40 kHz
FM deviation
-
1.7
-
kHz
-
20
-
Hz
W6[1] = 1 (audio
processing on);
no interference
-
16
-
Hz
W6[1] = 1 (audio
processing on);
interference at 90 kHz
AF and 40 kHz
FM deviation
-
240
-
Hz
-
28
-
dB
70
-
-
dB
W3[2] = 0 (without
de-emphasis); see
Figure 33 and Figure 34
W3[2] = 0 (without
de-emphasis); see
Figure 33 and Figure 34
W6[1] = 0 (audio
processing off)
α660Hz
attenuation at 660 Hz
W3[2] = 0 (without
de-emphasis); W6[1] = 1
(audio processing on);
interference at 90 kHz AF
and 40 kHz FM deviation;
see Figure 33 and
Figure 34
αmute
mute attenuation
of AF signal
TDA9899_3
Product data sheet
[19]
[19]
[20]
[19]
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
55 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
∆Vjmp
jump voltage difference (DC) switching AF output to
mute state or vice versa;
activated by digital
acquisition help W3[6] = 1
or via W3[5]
PSRR
power supply ripple rejection
Conditions
Min
Typ
Max
Unit
-
±50
±150
mV
switching audio
processing on/off or vice
versa; W6[1] = 0/1
transition
−350
-
+350
mV
audio processing
controlled by switching
from no interference to
interference or vice versa;
W6[1] = 1; interference at
90 kHz AF and 40 kHz
FM deviation
−150
-
+150
mV
fripple = 70 Hz;
see Figure 9
14
20
-
dB
-
2.4
-
V
W3[3:2] = 11 (50 µs
de-emphasis)
8.5
-
14
kΩ
W3[3:2] = 01 (75 µs
de-emphasis)
13
-
21
kΩ
fAF = 400 Hz;
Vo(AF) = 500 mV (RMS);
0 dB attenuation
-
170
-
mV
fFMPLL = 4.5 MHz
1.5
1.9
3.3
V
fFMPLL = 5.5 MHz
1.5
2.2
3.3
V
fFMPLL = 6.0 MHz
1.5
2.35
3.3
V
fFMPLL = 6.5 MHz
1.5
2.5
3.3
V
fFMPLL = 10.7 MHz
1.5
2.4
3.3
V
De-emphasis network; pin CDEEM
VO
output voltage
RO
output resistance
VAF(RMS)
RMS AF voltage
AF decoupling; pin CAF
Vdec
decoupling voltage (DC)
IL
leakage current
∆VAUD < ±50 mV (p-p);
0 dB attenuation
-
-
±25
nA
Io(max)
maximum output current
sink or source
1.15
1.5
1.85
µA
Audio processing capacitor for soft mute and low cut; pin APCLC
VO
output voltage
-
2.4
-
V
IL
leakage current
-
-
6
nA
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
56 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Audio processing capacitor for high cut; pin APCHC
VO
output voltage
-
2.4
-
V
IL
leakage current
-
-
6
nA
black picture
45
50
-
dB
white picture
45
50
-
dB
6 kHz sine wave
(black-to-white
modulation)
43
47
-
dB
250 kHz square wave
(black-to-white
modulation)
45
50
-
dB
FM
operation[21][22]
Single reference QSS AF performance; pin AUD[23]
(S/N)w(SC1)
first sound carrier weighted
signal-to-noise ratio
PC / SC1 > 40 dB at
pins IF1A and IF1B or
IF2A and IF2B;
27 kHz FM deviation;
BP off; “ITU-R BS.468-4”
Single reference QSS AF performance with external FM demodulator connected to OUT1A and OUT1B[24]
(S/N)w(SC1)
first sound carrier weighted
signal-to-noise ratio
PC / SC1 > 40 dB at
pins IF1A and IF1B or
IF2A and IF2B;
27 kHz FM deviation;
BP off; “ITU-R BS.468-4”
black picture
58
-
dB
white picture
50
53
-
dB
6 kHz sine wave
(black-to-white
modulation)
44
48
-
dB
250 kHz square wave
(black-to-white
modulation)
40
45
-
dB
sound carrier
subharmonics;
f = 2.75 MHz ± 3 kHz
45
51
-
dB
sound carrier
subharmonics;
f = 2.87 MHz ± 3 kHz
46
52
-
dB
TDA9899_3
Product data sheet
53
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
57 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
(S/N)w(SC2)
second sound carrier
with external reference
weighted signal-to-noise ratio FM demodulator;
PC / SC2 > 40 dB at
pins IF1A and IF1B or
IF2A and IF2B; 27 kHz
(54 % FM deviation);
BP off; “ITU-R BS.468-4”
black picture
48
55
-
dB
white picture
46
51
-
dB
6 kHz sine wave
(black-to-white
modulation)
42
46
-
dB
250 kHz square wave
(black-to-white
modulation)
29
34
-
dB
sound carrier
subharmonics;
f = 2.75 MHz ± 3 kHz
44
50
-
dB
sound carrier
subharmonics;
f = 2.87 MHz ± 3 kHz
45
51
-
dB
AM operation
L standard; pin AUD
Vo(AF)(RMS)
RMS AF output voltage
54 % modulation
400
500
600
mV
THD
total harmonic distortion
54 % modulation; BP on;
see Figure 32
-
0.5
1.0
%
BAF(−3dB)
−3 dB AF bandwidth
12
18
-
kHz
(S/N)w(AF)
AF weighted signal-to-noise
ratio
38
42
-
dB
“ITU-R BS.468-4”
BP on
BP off
composite IF; VIF
modulation = color bar;
“ITU-R BS.468-4”; BP on
[3]
44
50
-
dB
-
40
-
dB
Diversity output; pin DIV
Vo(video)(p-p)
peak-to-peak video output
voltage
[25]
0.8
1.0
1.2
V
Vwhl(DIV)
white level voltage on pin DIV 10 % residual carrier
[25]
3.2
3.4
3.6
V
f−3dB(u)
upper cut-off frequency
Io(max)
maximum output current
AC and DC;
sink or source
TDA9899_3
Product data sheet
-
300
-
kHz
1
-
-
mA
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
58 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
4
-
MHz
2.3
2.6
2.9
V
-
2
-
kΩ
-
-
200
Ω
-
-
-
pF
to switch off crystal input
by external resistor wired
between pin OPTXTAL
and GND
0.22
-
4.7
kΩ
Rswoff(OPTXTAL) = 0.22 kΩ
-
-
1600
µA
Rswoff(OPTXTAL) = 3.3 kΩ
-
500
-
µA
2.3
2.6
2.9
V
-
2
-
kΩ
Reference frequency
General
fref
[26]
reference frequency
Reference frequency generation with crystal; pin OPTXTAL
VOPTXTAL
voltage on pin OPTXTAL
(DC)
Ri
input resistance
Rrsn(xtal)
crystal resonance resistance
Cpull
pull capacitance
Rswoff(OPTXTAL)
switch-off resistance on pin
OPTXTAL
Iswoff
switch-off current
pin open-circuit
[3]
[27]
Reference frequency input from external source; pin OPTXTAL
VOPTXTAL
voltage on pin OPTXTAL
(DC)
Ri
input resistance
Vref(RMS)
RMS reference voltage
pin open-circuit
[3]
80
-
400
mV
-
2
4.7
kΩ
100
-
pF
RO
output resistance
of external reference
signal source
[3]
Cdec
decoupling capacitance
to external reference
signal source
[3]
22
2.2
2.5
2.8
V
[3]
50
-
-
kΩ
-
4
-
MHz
Reference frequency input from external source; W7[7] = 0; pin FREF
VFREF
voltage on pin FREF (DC)
Ri
input resistance
pin open-circuit
fref
reference frequency
Vref(RMS)
RMS reference voltage
see Figure 35
15
150
500
mV
RO
output resistance
of external reference
signal source;
AC-coupled
-
-
4.7
kΩ
Cdec
decoupling capacitance
to external reference
signal source
22
100
-
pF
Rswoff(FREF)
switch-off resistance on
pin FREF
to switch off reference
signal input by external
resistor wired between
pin FREF and GND
3.9
-
27
kΩ
Iswoff
switch-off current
Rswoff(FREF) = 3.9 kΩ
-
-
100
µA
Rswoff(FREF) = 22 kΩ
-
75
-
µA
[26]
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
59 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Reference frequency output; W7[7] = 1; pin FREF
VFREF
voltage on pin FREF (DC)
2.3
2.6
2.9
V
RO
output resistance
[3]
200
350
500
Ω
Vo(fref)(p-p)
peak-to-peak reference
frequency output voltage
[3]
200
300
360
mV
f−3dB(u)
upper cut-off frequency
[3]
4
8
12
MHz
Ibias(int)
internal bias current (DC)
[3]
150
200
-
µA
maximum output sink current AC and DC
[3]
100
-
-
µA
maximum output source
current
[3]
430
-
-
µA
-
0.5VP
-
V
MAD1; pin connected
to GND
0
-
0.04VP
V
MAD3; pin connected
to GND via RADRSEL
0.12VP
-
0.30VP
V
MAD4; pin connected
to VP via RADRSEL
0.66VP
-
0.86VP
V
MAD2; pin connected
to VP
0.96VP
-
VP
V
-
35
-
kΩ
42.3
47
51.7
kΩ
Isink(o)(max)
Isource(o)(max)
pin open-circuit
pin open-circuit
of emitter follower
AC and DC
I2C-bus transceiver[28]
Address select; pin ADRSEL
VADRSEL
voltage on pin ADRSEL (DC) pin open-circuit
for address select
Ri
input resistance
RADRSEL
resistance on pin ADRSEL
I2C-bus
[3]
voltage select; pin BVS
VBVS
voltage on pin BVS (DC)
pin open-circuit
-
0.52VP
-
V
Isink(I)
input sink current
pin connected to VP
-
-
10
µA
Isource(I)
input source current
pin connected to GND
-
-
60
µA
VI
input voltage
VCC(I2C-bus) = 5.0 V; pin
connected to VP
0.88VP
-
VP
V
VCC(I2C-bus) = 3.3 V; pin
open-circuit
0.46VP
-
0.58VP
V
VCC(I2C-bus) = 2.5 V; pin
connected to GND
0
-
0.12VP
V
I2C-bus transceiver; pins SCL and SDA[29]
VIH
HIGH-level input voltage
VCC(I2C-bus) = 5.0 V
[30]
0.6VP
-
VP
V
VCC(I2C-bus) = 3.3 V
[31]
2.3
-
VP
V
VCC(I2C-bus) = 2.5 V
[31]
1.75
-
VP
V
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
60 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 55. Characteristics …continued
VP = 5 V; Tamb = 25 °C; see Table 26 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Symbol
VIL
Parameter
Conditions
LOW-level input voltage
Min
Typ
Max
Unit
VCC(I2C-bus) = 5.0 V
[30]
−0.3
-
+0.3VP
V
VCC(I2C-bus) = 3.3 V
[31]
−0.3
-
+1.0
V
VCC(I2C-bus) = 2.5 V
[31]
−0.3
-
+0.75
V
IIH
HIGH-level input current
−10
-
+10
µA
IIL
LOW-level input current
−10
-
+10
µA
VOL
LOW-level output voltage
-
-
0.4
V
fSCL
SCL clock frequency
0
-
400
kHz
[1]
IOL = 3 mA; for data
transmission (SDA)
Values of video and sound parameters can be decreased at VP = 4.5 V.
[2]
Condition for secure POR is a rise or fall time greater than 2 µs.
[3]
This parameter is not tested during the production and is only given as application information for designing the receiver circuit.
[4]
Level headroom for input level jumps during gain control setting.
[5]
BLF(−3dB) = 100 kHz (damping factor d = 1.9; calculated with sync level within gain control range). Calculation of the VIF PLL filter can be
done by use of the following formula:
1
B LF ( –3dB ) = ------K O K D R , valid for d ≥ 1.2
2π
1
d = --- R K O K D C ,
2
where:
Hz
A
rad
KO is the VCO steepness  -------- or  2π ------ ; KD is the phase detector steepness  -------- ;
 sV 

V
 rad
R is the loop filter serial resistor (Ω); C is the loop filter serial capacitor (F); BLF(−3dB) is the −3 dB LF bandwidth (Hz); d is the damping
factor.
[6]
The VCO frequency offset related to the PC frequency is set to 1 MHz with white picture video modulation.
[7]
AC load; CL < 20 pF and RL > 1 kΩ. The sound carrier frequencies (depending on TV standard) are attenuated by the integrated sound
carrier traps.
[8]
Condition: luminance range (5 steps) from 0 % to 100 %. Measurement value is based on 4 of 5 steps.
[9]
Measurement using 200 kHz high-pass filter, 5 MHz low-pass filter and subcarrier notch filter (“ITU-T J.64”).
[10] Modulation VSB; sound carrier off; fvideo > 0.5 MHz.
[11] Sound carrier on; fvideo = 10 kHz to 10 MHz.
[12] The sound carrier trap can be bypassed by setting the I2C-bus bit W2[0] to logic 0; see Table 25. In this way the full composite video
spectrum appears at pin CVBS. The video amplitude is reduced to 1.1 V (p-p).
[13] Measurement condition: with transformer, transmitter pre-correction on; reference is at 1 MHz.
[14] The response time is valid for a VIF input level range from 200 µV to 70 mV.
[15] See Figure 18 to smooth current pulses.
[16] To match the AFC output signal to different tuning systems a current output is provided. The test circuit is given in Figure 18. The
AFC steepness can be changed by resistors R1 and R2.
[17] The AFC value of the VIF and RIF frequency is generated by using digital counting methods. The used counter resolution is provided
with an uncertainty of ±1 bit corresponding to ±25 kHz. This uncertainty of ±25 kHz has to be added to the frequency accuracy
parameter.
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
61 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
[18] Measured with an FM deviation of 25 kHz and the typical AF output voltage of 500 mV (RMS). The audio signal processing stage
provides headroom of 6 dB with THD < 1.5 %. The I2C-bus bits W3[0] and W3[1] control the AF output signal amplitude from
0 dB to −18 dB in steps of −6 dB. Reducing the audio gain for handling a frequency deviation of more than 55 kHz avoids AF output
signal clipping.
[19] Amplitude response depends on dimensioning of FM PLL loop filter and components at pin APCLC and pin APCHC.
[20] The lower AF cut-off frequency depends on the value of the capacitor at pin CAF. A value of CAF = 470 nF leads to f−3dB(AF)l ≈ 20 Hz and
CAF = 220 nF leads to f−3dB(AF)l ≈ 40 Hz.
[21] For all signal-to-noise measurements the used VIF modulator has to meet the following specifications:
a) Incidental phase modulation for black-to-white jump less than 0.5 degrees.
b) QSS AF performance, measured with the television demodulator AMF2 (audio output, weighted signal-to-noise ratio) better than
60 dB (at deviation 27 kHz) for 6 kHz sine wave black-to-white video modulation.
c) Picture-to-sound carrier ratio PC / SC1 = 13 dB (transmitter).
[22] The PC / SC ratio is calculated as the addition of TV transmitter PC / SC1 ratio and SAW filter PC / SC1 ratio. This PC / SC ratio is
necessary to achieve the weighted signal-to-noise values as noted. A different PC / SC ratio will change these values.
[23] Measurement condition is SC1 / SC2 ≥ 7 dB.
[24] The differential QSS signal output on pins OUT1A and OUT1B is analyzed by a test demodulator TDA9820. The signal-to-noise ratio of
this device is better than 60 dB. The measurement is related to an FM deviation of ±27 kHz and in accordance with “ITU-R BS.468-4”.
[25] Sound carrier not present.
[26] The tolerance of the reference frequency determines the accuracy of VIF AFC, RIF AFC, FM demodulator center frequency, maximum
FM deviation, sound trap frequency, LIF band-pass cut-off frequency and ZIF low-pass cut-off frequency as well as the accuracy of the
synthesizer.
[27] The value of Cpull determines the accuracy of the resonance frequency of the crystal. It depends on the used type of crystal.
[28] The AC characteristics are in accordance with the I2C-bus specification for fast mode (maximum clock frequency is 400 kHz).
Information about the I2C-bus can be found in the brochure “The I2C-bus and how to use it” (order number 9398 393 40011).
[29] The SDA and SCL lines will not be pulled down if VP is switched off.
[30] The threshold is dependent on VP.
[31] The threshold is independent of VP.
Table 56.
Examples to the FM PLL filter
BLF(−3dB) (kHz)
Cs (nF)
Cpar (pF)
Rs (kΩ)
Comment
210
2.2
100
8.2
recommended for single-carrier-sound,
FM narrow
410
2.2
47
5.6
recommended for single-carrier-sound, FM wide
130
2.2
470
5.6
recommended for two-carrier-sound, FM narrow
210
2.2
47
8.2
used for test circuit
Table 57.
Input frequencies and carrier ratios (examples)
Symbol
Parameter
B/G standard M/N standard L standard L-accent standard Unit
fPC
picture carrier frequency
38.375
38.375
38.375
33.625
MHz
fSC1
sound carrier frequency 1
32.825
33.825
31.825
40.125
MHz
fSC2
sound carrier frequency 2
32.583
-
-
-
MHz
PC / SC1 picture to first sound carrier ratio
13
7
10
10
dB
PC / SC2 picture to second sound carrier ratio
20
-
-
-
dB
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
62 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
trap bypass mode
normal mode
2.72 V
2.6 V
3.41 V
3.20 V
zero carrier level
white level
1.83 V
1.80 V
black level
1.5 V
1.20 V
sync level
mhc115
Fig 8. Typical video signal levels on output pin CVBS (sound carrier off)
V = VP + Vripple
TDA9899
VP (V)
5.050
5.000
4.950
t (s)
001aad497
Fig 9. Ripple rejection condition
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
63 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aad353
5
Vmonitor(VIFAGC)
(V)
4
5
VTAGC
(V)
4
3
3
2
2
(1)
(2)
(3)
(4)
1
1
0
30
50
70
90
0
110
130
Vi(VIF) (dBµV)
(1) VIF AGC.
(2) TAGC; W10 = 00h.
(3) TAGC; W10 = 10h.
(4) TAGC; W10 = 1Fh.
Fig 10. Typical VIF monitor and TAGC characteristic
001aad493
100
G(1)
90
(dB)
80
70
60
50
40
30
20
10
0
1.0
1.5
2.0
2.5
3.0
3.5
VAGCVIN (V)
(1) CVBS output peak-to-peak level to input (IF1 or IF2) RMS level ratio.
Fig 11. Typical VAGC control characteristic (pin AGCVIN)
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
64 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aaf640
100
Vi(IF)
(dBµV)
90
80
70
50
0 0000
0 0001
0 0010
0 0011
0 0100
0 0101
0 0110
0 0111
0 1000
0 1001
0 1010
0 1011
0 1100
0 1101
0 1110
0 1111
1 0000
1 0001
1 0010
1 0011
1 0100
1 0101
1 0110
1 0111
1 1000
1 1001
1 1010
1 1011
1 1100
1 1101
1 1110
1 1111
60
bit pattern W9[4:0] or W10[4:0]
Integral TAGC (W9); step width: 1.3 dBµV.
IF based TAGC (W10).
Fig 12. Typical tuner takeover point as a function of I2C-bus register W9 or W10
008aaa034
100
Vi(IF)
(dBµV)
90
80
70
(1)
60
0
5
10
15
20
25
RTOP2 (kΩ)
(1) IF based TAGC (TOP2).
Fig 13. Typical tuner takeover point as a function of resistor RTOP2
TDA9899_3
Product data sheet
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65 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aad356
5
001aad357
5
VAGC(SIF)
(V)
VAGC(FM)
(V)
4
4
3
3
2
2
(1)
(2)
1
1
0
0
40
60
80
100
120
Vi(EXTFMI) (dBµV)
20
40
60
80
100
120
Vi(SIF) (dBµV)
(1) AM.
(2) FM.
Fig 14. Typical FM AGC characteristic measured at
pin MPP2
Fig 15. Typical SIF AGC characteristic measured at
pin MPP2
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
66 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
008aaa035
250
∆fAFC(VIF)(5)
(kHz)
IAFC(6)
(µA)
(1)
150
150
50
50
(2)
bit AFCWIN (R1[7]) = 1
0
0
(3)
−50
−50
−150
−250
36.375
250
−150
(4)
36.875
37.375
37.875
38.375
38.875
−250
39.875
40.375
fVIF (MHz)
39.375
(1) VIF AFC via I2C-bus; accuracy is ±1 digit.
(2) Bit AFCWIN via I2C-bus (VCO is in ±1.6 MHz window) for all standards except M/N standard.
(3) Bit AFCWIN via I2C-bus (VCO is in ±0.8 MHz window) for M/N standard.
(4) VIF AFC average current.
(5) Reading via I2C-bus.
(6) Average; RC network at pin MPP2.
Fig 16. Typical analog and digital AFC characteristic for VIF
001aad443
250
∆fAFC(RIF)(4)
(kHz)
250
IAFC(5)
(µA)
(1)
150
150
(2)
50
50
0
0
−50
−50
−150
−250
5.0
−150
(3)
AFC undefined
5.2
bit CARRDET (R1[5]) = 1
5.4
5.6
AFC undefined
5.8
−250
6.0
fRIF (MHz)
Characteristics of digital and analog radio AFC is mirrored with respect to center frequency when lower sideband is used
(W2[3] = 0).
(1) RIF AFC via I2C-bus.
(2) FM carrier detection via I2C-bus.
(3) RIF AFC average current.
(4) Reading via I2C-bus.
(5) Average; RC network at pin MPP2.
Fig 17. Typical analog and digital AFC characteristic for RIF
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
67 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
VP
R1
22
kΩ
R2
22
kΩ
IAFC
MPP2
TDA9899
100
nF
001aad440
Fig 18. RC network for measurement of analog AFC characteristic
001aad660
60
S/N
(dB)
(1)
50
(2)
40
30
50
60
70
80
90
100
Vi(VIF) (dBµV)
(1) B/G standard; weighted video S/N; using 50 % grey picture.
(2) M/N standard; unweighted video S/N; using 50 IRE grey picture.
Fig 19. Typical signal-to-noise ratio as a function of VIF input voltage
TDA9899_3
Product data sheet
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68 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aad487
5
(1)
αresp(f)
0
(dB)
(3)
(2)
−5
−10
−15
−20
−25
−30
−35
−40
−45
0
1
2
3
4
5
6
f (MHz)
(1) Minimum requirements upper limit.
(2) Minimum requirements lower limit.
(3) Typical trap amplitude frequency response.
Fig 20. Typical amplitude frequency response for sound trap at M/N standard (including
Korea)
001aad365
250
200
td(grp)
(ns) 150
100
(1)
50
0
(3)
−50
(2)
−100
−150
−200
−250
0
1
2
3
4
5
6
f (MHz)
(1) Minimum requirements upper limit.
(2) Minimum requirements lower limit.
(3) Typical trap group delay response.
Fig 21. Typical group delay response for sound trap at M/N standard
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
69 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aad488
5
(1)
αresp(f)
0
(dB)
(2)
−5
(3)
−10
−15
−20
−25
−30
−35
−40
−45
0
1
2
3
4
5
6
7
8
f (MHz)
(1) Minimum requirements upper limit.
(2) Minimum requirements lower limit.
(3) Typical trap amplitude frequency response.
Fig 22. Typical amplitude frequency response for sound trap at B/G standard
001aad361
250
200
td(grp)
(ns) 150
100
(1)
50
(3)
0
−50
(2)
−100
−150
−200
−250
0
1
2
3
4
5
6
7
8
f (MHz)
(1) Minimum requirements upper limit.
(2) Minimum requirements lower limit.
(3) Typical trap group delay response.
Fig 23. Typical group delay response for sound trap at B/G standard
TDA9899_3
Product data sheet
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70 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aad489
5
(1)
αresp(f)
0
(dB)
(2)
−5
(3)
−10
−15
−20
−25
−30
−35
−40
−45
0
1
2
3
4
5
6
7
8
f (MHz)
(1) Minimum requirements upper limit.
(2) Minimum requirements lower limit.
(3) Typical trap amplitude frequency response.
Fig 24. Typical amplitude frequency response for sound trap at I standard
001aad363
250
200
td(grp)
(ns) 150
100
(1)
50
(3)
0
−50
(2)
−100
−150
−200
−250
0
1
2
3
4
5
6
7
8
f (MHz)
(1) Minimum requirements upper limit.
(2) Minimum requirements lower limit.
(3) Typical trap group delay response.
Fig 25. Typical group delay response for sound trap at I standard
TDA9899_3
Product data sheet
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71 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aaf551
5
(1)
αresp(f)
0
(dB)
(2)
−5
−10
−15
(3)
−20
−25
−30
−35
−40
−45
0
1
2
3
4
5
6
7
8
f (MHz)
(1) Minimum requirements upper limit.
(2) Minimum requirements lower limit.
(3) Typical trap amplitude frequency response.
Fig 26. Typical amplitude frequency response for sound trap at D/K standard
001aaf552
250
200
td(grp)
(ns) 150
100
(1)
50
(3)
0
−50
(2)
−100
−150
−200
−250
0
1
2
3
4
5
6
7
8
f (MHz)
(1) Minimum requirements upper limit.
(2) Minimum requirements lower limit.
(3) Typical trap group delay response.
Fig 27. Typical group delay response for sound trap at D/K standard
TDA9899_3
Product data sheet
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72 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aad491
5
(1)
αresp(f)
0
(dB)
(2)
−5
(3)
−10
−15
−20
−25
−30
−35
−40
−45
0
1
2
3
4
5
6
7
8
f (MHz)
(1) Minimum requirements upper limit.
(2) Minimum requirements lower limit.
(3) Typical trap amplitude frequency response.
Fig 28. Typical amplitude frequency response for sound trap at L standard
001aad364
250
200
td(grp)
(ns) 150
100
(1)
50
(3)
0
−50
(2)
−100
−150
−200
−250
0
1
2
3
4
5
6
7
8
f (MHz)
(1) Minimum requirements upper limit.
(2) Minimum requirements lower limit.
(3) Typical trap group delay response.
Fig 29. Typical group delay response for sound trap at L standard
TDA9899_3
Product data sheet
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73 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aaf579
10
αresp(f)
(dB)
0
(1)
(5)
(4)
(3)
(2)
−10
(7)
−20
(6)
−30
−40
−50
−3.0
−2.0
−1.0
0
1.0
2.0
f − fc (MHz)
3.0
(1) Center frequency.
(2) Minimum upper cut-off frequency.
(3) Minimum lower cut-off frequency.
(4) Maximum upper cut-off frequency.
(5) Maximum lower cut-off frequency.
(6) Minimum upper stop-band attenuation.
(7) Minimum lower stop-band attenuation.
Fig 30. Typical sound BP amplitude frequency response at TV mode, normalized to BP
center frequency
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
74 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aaf578
10
αresp(f)
(dB)
0
(1)
(5)
(4)
(3) (2)
−10
(7)
(6)
−20
−30
−40
−50
−3.0
−2.0
−1.0
0
1.0
2.0
f − fc (MHz)
3.0
(1) Center frequency.
(2) Minimum upper cut-off frequency.
(3) Minimum lower cut-off frequency.
(4) Maximum upper cut-off frequency.
(5) Maximum lower cut-off frequency.
(6) Minimum upper stop-band attenuation.
(7) Minimum lower stop-band attenuation.
Fig 31. Typical sound BP amplitude frequency response at radio 10.7 mode, normalized to
BP center frequency
001aad359
2.0
THD
(%)
1.5
1.0
0.5
0
10−2
10−1
1
102
10
fAF (kHz)
Fig 32. Typical total harmonic distortion as a function of audio frequency at AM standard
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
75 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aah582
5
VMPP2
(V)
4
3
2
1
0
0
10
20
30
40
50
∆f (kHz)
W7[6] = 1
Fig 33. Typical WAFP (FM) control output voltage on pin MPP2 versus equivalent FM noise
signal using variable FM deviation at 90 kHz AF
001aaf466
106
0
(1)
f
(Hz)
G
(dB)
(2)
−10
104
(3)
−20
102
−30
1
0
10
20
30
40
50
∆f (kHz)
W7[6] = 1
(1) AF output level cut-off frequency.
(2) Upper AF cut-off frequency.
(3) Lower AF cut-off frequency.
Fig 34. Typical FM AF output characteristic versus equivalent FM noise signal using
variable FM deviation at 90 kHz AF
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
76 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aaf468
55
(S/N)w
(dB)
45
35
25
0
50
100
150
200
Vi(FREF)(RMS) (mV)
Reference frequency input signal taken from external quartz circuit.
Fig 35. Weighted FM audio S/N versus reference frequency input level using TSS mode
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
77 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aaf639
120
antenna
input
level
(dBµV)
(5)
1
IF signal
RMS
values
(V)
(2)
(4)
10−1
100
(6)
(3)
RF
gain
control
range
80
10−2
IF gain
control
range limited
by TOP
adjustment
60
IF gain
control
range
10−3
10−4
40
(1)
10−5
20
tuner
band-pass
TD1716
X3450L
VIF
amplifier
output
input
output
input
output
input
output
input
input
0
output
(7)
demodulator
10−6
video
amplifier
IF demodulator, TDA989x
Video signal related peak-to-peak levels are divided by factor 2√2 in order to conform with the
RMS value scale of the secondary y-axis, but disregarding the none sine wave signal content.
(1) Signal levels for −1 dB video output level using maximum RF gain and maximum IF gain.
(2) Signal levels for +1 dB video output level using minimum IF gain.
(3) Signal levels for TOP-adjusted tuner output level using maximum RF gain and
adjustment-related minimum IF gain.
(4) Signal levels for TOP-adjusted tuner output level using minimum RF gain and
adjustment-related minimum IF gain.
(5) TOP-adjusted tuner output level.
(6) TOP-adjusted VIF amplifier input level.
(7) Minimum antenna input level at −1 dB video level.
Fig 36. Front-end level diagram
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
78 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
12.2 Digital TV signal processing
Table 58. Characteristics
VP = 5 V[1]; Tamb = 25 °C; 8 MHz system; see Table 36 and Table 37; CW test input signal is used for specification;
Vi(IF) = 10 mV (RMS); fIF = 36 MHz for low IF output of 5 MHz; IF input from 50 Ω via broadband transformer 1 : 1;
gain controlled amplifier adjusted to typical specified output level; measurements taken in test circuit of Figure 49 with 4 MHz
crystal oscillator reference; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
IF amplifier; pins IF3A and IF3B or IF1A and IF1B or IF2A and IF2B
VI
input voltage
1.8
1.93
2.2
V
-
2
-
kΩ
Ri(dif)
differential input
resistance
[2]
Ci(dif)
differential input
capacitance
[2]
-
3
-
pF
GIF(cr)
control range IF gain
[2]
60
66
-
dB
DTV differential output; pins OUT1A, OUT1B, OUT2A and OUT2B
VO
output voltage
pin open-circuit
1.8
2.0
2.2
V
Ibias(int)
internal bias current
(DC)
for emitter-follower
2.0
2.5
-
mA
Isink(o)(max)
maximum output sink
current
DC and AC; see Figure 37
[3]
1.4
1.7
-
mA
Isource(o)(max)
maximum output
source current
DC and AC; see Figure 37
[3]
6.0
-
-
mA
RO
output resistance
differential; output active
[2]
-
-
50
Ω
output inactive; internal
resistance to GND
[2]
-
800
-
Ω
minimum input sine wave
level for nominal output level
-
70
100
µV
maximum input sine wave
level for nominal output level
130
170
-
mV
Vi(IF)(RMS)
RMS IF input voltage
permissible overload
[2]
-
-
320
mV
-
83
-
dB
-
1.0
1.1
V
-
0.50
0.55
V
115
124
-
dBc/Hz
90
104
-
dBc/Hz
W4[7] = 0
40
-
-
dB
W4[7] = 1
40
-
-
dB
Direct IF; pins OUT2A and OUT2B
GIF(max)
maximum IF gain
output peak-to-peak level to
input RMS level ratio
[2]
Vo(dif)(p-p)
peak-to-peak
differential output
voltage
between pin OUT2A and
pin OUT2B
[4]
W4[7] = 0
W4[7] = 1
C/N
carrier-to-noise ratio
at fo = 33.4 MHz;
see Figure 38
[2][5][6]
Vi(IF) = 10 mV (RMS)
Vi(IF) = 0.5 mV (RMS)
αIM
intermodulation
suppression
input signals: fi = 47.0 MHz
and 57.5 MHz; output
signals: fo = 36.5 MHz or
68.0 MHz; see Figure 39
TDA9899_3
Product data sheet
[2]
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
79 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 58. Characteristics …continued
VP = 5 V[1]; Tamb = 25 °C; 8 MHz system; see Table 36 and Table 37; CW test input signal is used for specification;
Vi(IF) = 10 mV (RMS); fIF = 36 MHz for low IF output of 5 MHz; IF input from 50 Ω via broadband transformer 1 : 1;
gain controlled amplifier adjusted to typical specified output level; measurements taken in test circuit of Figure 49 with 4 MHz
crystal oscillator reference; unless otherwise specified.
Symbol
Parameter
fIF(−1dB)l
lower −1 dB IF cut-off
frequency
f−3dB(IF)u
upper IF cut-off
frequency
power supply ripple
rejection
PSRR
Conditions
Min
Typ
Max
Unit
[2]
-
7
-
MHz
W4[7] = 0
[4]
60
-
-
MHz
W4[7] = 1
[7]
60
-
-
MHz
residual spurious at nominal
differential output voltage
dependent on power supply
ripple
[2]
fripple = 70 Hz
-
60
-
dB
fripple = 20 kHz
-
60
-
dB
Low or zero IF output signal; pins OUT1A and OUT1B or pins OUT2A and OUT2B; differential
GIF(max)
maximum IF gain
fsynth
synthesizer frequency see Table 37 and Table 38
Vo(dif)(p-p)
PSRR
output peak-to-peak level to
input RMS level ratio
[2]
-
89
-
dB
-
-
-
MHz
-
2
-
V
-
1
-
V
fripple = 70 Hz
-
50
-
dB
fripple = 20 kHz
-
30
-
dB
6 MHz bandwidth
-
-
2.7
dB
7 MHz bandwidth
-
-
2.7
dB
peak-to-peak
differential output
voltage
W4[7] = 0
[4]
W4[7] = 1
[4]
power supply ripple
rejection
residual spurious at nominal
differential output voltage
dependent on power supply
ripple
[2]
Low IF output signal; pins OUT1A and OUT1B
αripple(pb)LIF
low IF pass-band
ripple
8 MHz bandwidth
B−3dB
αstpb
−3 dB bandwidth
-
-
2.7
dB
BP off
[4]
11
15
-
MHz
6 MHz bandwidth
[4]
-
7.8
-
MHz
7 MHz bandwidth
[4]
-
8.8
-
MHz
8 MHz bandwidth
[4]
-
9.8
-
MHz
stop-band attenuation 6 MHz band; f = 11.75 MHz
30
40
-
dB
6 MHz band; f = 20 MHz
28
35
-
dB
7 MHz band; f = 13.75 MHz
30
40
-
dB
7 MHz band; f = 20 MHz
28
35
-
dB
8 MHz band; f = 15.75 MHz
30
40
-
dB
8 MHz band; f = 20 MHz
28
35
-
dB
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
80 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 58. Characteristics …continued
VP = 5 V[1]; Tamb = 25 °C; 8 MHz system; see Table 36 and Table 37; CW test input signal is used for specification;
Vi(IF) = 10 mV (RMS); fIF = 36 MHz for low IF output of 5 MHz; IF input from 50 Ω via broadband transformer 1 : 1;
gain controlled amplifier adjusted to typical specified output level; measurements taken in test circuit of Figure 49 with 4 MHz
crystal oscillator reference; unless otherwise specified.
Symbol
Parameter
Conditions
∆td(grp)
group delay time
variation
from 1 MHz to 2 MHz
[2]
from 2 MHz to end of band
with a bandwidth of
[2]
αimage
C/N
αH(ib)
image rejection
carrier-to-noise ratio
in-band harmonics
suppression
Min
Typ
Max
Unit
-
90
200
ns
6 MHz
-
90
160
ns
7 MHz
-
90
160
ns
8 MHz
-
90
160
ns
BP on
30
34
-
dB
BP off
24
28
-
dB
Vi(IF) = 10 mV (RMS)
112
118
-
dBc/Hz
Vi(IF) = 0.5 mV (RMS)
90
104
-
dBc/Hz
40
-
-
dB
40
-
-
dB
40
-
-
dB
−10 MHz to 0 MHz
at fo = 4.9 MHz;
see Figure 38
[2][5][6]
low IF = multiple of
1.31 MHz;
fi = fsynth + 1.31 MHz;
see Figure 42
[2]
W4[7] = 0
W4[7] = 1
αIM
intermodulation
suppression
input signals:
fi = fsynth + 4.7 MHz and
fsynth + 5.3 MHz; output
signals: fo = 4.1 MHz or
5.9 MHz; see Figure 41
[2]
W4[7] = 0
W4[7] = 1
αsp(ib)
in-band spurious
suppression
single-ended AC load;
RL = 1 kΩ; CL = 5 pF;
1 MHz to end of band;
BP on
[2]
αsp(ob)
out-band spurious
suppression
single-ended AC load;
RL = 1 kΩ; CL = 5 pF; BP on
[2]
40
-
-
dB
50
-
-
dB
50
-
-
dB
Zero IF output signal; pins OUT1A and OUT1B or pins OUT2A and OUT2B
αripple(pb)ZIF
zero IF pass-band
ripple
3.0 MHz bandwidth
-
-
1.8
dB
3.5 MHz bandwidth
-
-
1.8
dB
-
-
1.8
dB
−3 dB bandwidth
BP off
[4]
11
15
-
MHz
3.0 MHz bandwidth
[4]
-
3.7
-
MHz
3.5 MHz bandwidth
[4]
-
4.2
-
MHz
4.0 MHz bandwidth
[4]
-
4.7
-
MHz
4.0 MHz bandwidth
B−3dB
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
81 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 58. Characteristics …continued
VP = 5 V[1]; Tamb = 25 °C; 8 MHz system; see Table 36 and Table 37; CW test input signal is used for specification;
Vi(IF) = 10 mV (RMS); fIF = 36 MHz for low IF output of 5 MHz; IF input from 50 Ω via broadband transformer 1 : 1;
gain controlled amplifier adjusted to typical specified output level; measurements taken in test circuit of Figure 49 with 4 MHz
crystal oscillator reference; unless otherwise specified.
Symbol
Parameter
Min
Typ
Max
Unit
αstpb
stop-band attenuation 3.0 MHz band; f = 7.75 MHz
Conditions
30
40
-
dB
3.5 MHz band; f = 9.25 MHz
30
40
-
dB
4.0 MHz band;
f = 10.75 MHz
30
40
-
dB
28
35
-
dB
3.0 MHz
-
60
100
ns
3.5 MHz
-
50
100
ns
-
45
100
ns
Vi(IF) = 10 mV (RMS)
112
121
-
dBc/Hz
Vi(IF) = 0.5 mV (RMS)
87
101
-
dBc/Hz
40
-
-
dB
any band; f = 15 MHz
∆td(grp)
group delay time
variation
[2]
from 0 MHz to end of band
with a bandwidth of
4.0 MHz
C/N
carrier-to-noise ratio
at fo = 1.9 MHz;
see Figure 38
[2][5][6]
αIM
intermodulation
suppression
input signals:
fi = fsynth + 1.7 MHz and
fsynth + 2.3 MHz; output
signals: fo = 1.1 MHz or
2.9 MHz; see Figure 40
αsp(ib)
in-band spurious
suppression
0.437 MHz to end of band;
BP on
[2][4]
40
-
-
dB
αsp(ob)
out-band spurious
suppression
BP on
[2][4]
50
-
-
dB
∆ϕ
phase difference
mismatch between I and Q
channel
-
-
6
deg
∆G
gain mismatch
mismatch between I and Q
channel
-
-
2
dB
[2]
IF AGC control; pin AGCDIN
Isink(i)(max)
maximum input sink
current
[2]
-
-
2
µA
Vi(max)
maximum input
voltage
[2]
-
-
VP
V
VAGCDIN
voltage on pin
AGCDIN
[2]
0
-
3
V
∆GIF/∆VAGCDIN
change of IF gain with VAGCDIN = 0.8 V to 2.2 V
voltage on
pin AGCDIN
-
−45
-
dB/V
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
82 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 58. Characteristics …continued
VP = 5 V[1]; Tamb = 25 °C; 8 MHz system; see Table 36 and Table 37; CW test input signal is used for specification;
Vi(IF) = 10 mV (RMS); fIF = 36 MHz for low IF output of 5 MHz; IF input from 50 Ω via broadband transformer 1 : 1;
gain controlled amplifier adjusted to typical specified output level; measurements taken in test circuit of Figure 49 with 4 MHz
crystal oscillator reference; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tuner AGC; pin TAGC
Integral TAGC loop mode (W6[7:6] = 10); TAGC is current output; unmodulated IF
Vi(IF)(RMS)
RMS IF input voltage
at starting point of tuner
AGC takeover;
Isink(TAGC) = 100 µA
W9[4:0] = 0 0000
-
57.9
-
dBµV
W9[4:0] = 1 0000
-
78.7
-
dBµV
W9[4:0] = 1 1111
-
98.2
-
dBµV
−2
-
+2
dB
normal mode
0.20
0.27
0.34
µA
fast mode activated by
internal level detector
7
10
13
µA
400
500
600
µA
[2]
-
-
0.02
dB/K
load resistance
[2]
50
-
-
MΩ
Vsat(u)
upper saturation
voltage
pin operating as current
output
[2]
VP − 0.3
-
-
V
Vsat(l)
lower saturation
voltage
pin operating as current
output
[2]
-
-
0.3
V
αth(fast)AGC
AGC fast mode
threshold
activated by internal fast
AGC detector; I2C-bus
setting corresponds to
W9[4:0] = 1 0000
[2]
6
8
10
dB
td
delay time
before activating; Vi(IF)
below αth(fast)AGC
[2]
40
60
80
ms
1.0
-
3.5
V
αacc(set)TOP
TOP setting accuracy
Isource
source current
Isink
sink current
∆αacc(set)TOP/∆T TOP setting accuracy
variation with
temperature
RL
TAGC charge current
TAGC discharge current;
VTAGC = 1 V
Isink(TAGC) = 100 µA;
W9[4:0] = 1 0000
Filter synthesizer PLL; pin LFSYN1
VLFSYN1
voltage on pin
LFSYN1
KO
VCO steepness
∆fVCO / ∆VLFSYN1
-
3.75
-
MHz/V
KD
phase detector
steepness
∆ILFSYN1 / ∆ϕVCO
-
9
-
µA/rad
Isink(o)PD(max)
maximum phase
detector output sink
current
-
-
65
µA
Isource(o)PD(max)
maximum phase
detector output
source current
-
-
65
µA
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
83 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 58. Characteristics …continued
VP = 5 V[1]; Tamb = 25 °C; 8 MHz system; see Table 36 and Table 37; CW test input signal is used for specification;
Vi(IF) = 10 mV (RMS); fIF = 36 MHz for low IF output of 5 MHz; IF input from 50 Ω via broadband transformer 1 : 1;
gain controlled amplifier adjusted to typical specified output level; measurements taken in test circuit of Figure 49 with 4 MHz
crystal oscillator reference; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
1
-
3
V
-
31
-
MHz/V
22 MHz to 29.5 MHz
-
32
-
µA/rad
30 MHz to 37.5 MHz
-
38
-
µA/rad
38 MHz to 45.5 MHz
-
47
-
µA/rad
46 MHz to 53.5 MHz
-
61
-
µA/rad
57 MHz
-
61
-
µA/rad
22 MHz to 29.5 MHz
-
200
-
µA
30 MHz to 37.5 MHz
-
238
-
µA
38 MHz to 45.5 MHz
-
294
-
µA
46 MHz to 53.5 MHz
-
384
-
µA
57 MHz
-
384
-
µA
Conversion synthesizer PLL; pin LFSYN2
VLFSYN2
voltage on pin
LFSYN2
KO
VCO steepness
∆fVCO / ∆VLFSYN2
KD
phase detector
steepness
∆ILFSYN2 / ∆ϕVCO;
see Table 59;
fVCO selection:
Io(PD)
ϕn(synth)
phase detector output sink or source;
current
fVCO selection:
synthesizer phase
noise
fsynth = 31 MHz;
fIF = 36 MHz
at 1 kHz
[2]
89
99
-
dBc/Hz
at 10 kHz
[2]
89
99
-
dBc/Hz
at 100 kHz
[2]
98
102
-
dBc/Hz
at 1.4 MHz
[2]
115
119
-
dBc/Hz
at 1 kHz
[2]
89
96
-
dBc/Hz
at 10 kHz
[2]
89
100
-
dBc/Hz
at 100 kHz
[2]
96
100
-
dBc/Hz
at 1.4 MHz
[2]
115
118
-
dBc/Hz
fsynth = 40 MHz;
fIF = 44 MHz; external
4 MHz reference signal of
265 mV (RMS) and phase
noise better than
120 dBc/Hz; see Figure 47
αsp
spurious suppression
multiple of ∆f = 500 kHz
[2]
50
-
-
dBc
IL
leakage current
synthesizer spurious
performance > 50 dBc
[2]
-
-
10
nA
[8]
-
4
-
MHz
Reference frequency
General
fref
reference frequency
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
84 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 58. Characteristics …continued
VP = 5 V[1]; Tamb = 25 °C; 8 MHz system; see Table 36 and Table 37; CW test input signal is used for specification;
Vi(IF) = 10 mV (RMS); fIF = 36 MHz for low IF output of 5 MHz; IF input from 50 Ω via broadband transformer 1 : 1;
gain controlled amplifier adjusted to typical specified output level; measurements taken in test circuit of Figure 49 with 4 MHz
crystal oscillator reference; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
2.3
2.6
2.9
V
Reference frequency generation with crystal; pin OPTXTAL
VOPTXTAL
voltage on pin
OPTXTAL (DC)
Ri
input resistance
Rrsn(xtal)
crystal resonance
resistance
Cpull
pull capacitance
Rswoff(OPTXTAL)
switch-off resistance
on pin OPTXTAL
Iswoff
switch-off current
pin open-circuit
[2]
-
2
-
kΩ
-
-
200
Ω
-
-
-
pF
to switch off crystal input by
external resistor wired
between pin OPTXTAL and
GND
0.22
-
4.7
kΩ
Rswoff(OPTXTAL) = 0.22 kΩ
-
-
1600
µA
Rswoff(OPTXTAL) = 3.3 kΩ
-
500
-
µA
2.3
2.6
2.9
V
-
2
-
kΩ
80
-
400
mV
[9]
Reference frequency input from external source; pin OPTXTAL
VOPTXTAL
voltage on pin
OPTXTAL (DC)
pin open-circuit
Ri
input resistance
Vref(RMS)
RMS reference
voltage
RO
output resistance
of external reference signal
source
[2]
-
2
4.7
kΩ
Cdec
decoupling
capacitance
to external reference signal
source
[2]
22
100
-
pF
2.2
2.5
2.8
V
50
-
-
kΩ
[2]
Reference frequency input from external source; W7[7] = 0; pin FREF
VFREF
voltage on pin FREF
(DC)
pin open-circuit
Ri
input resistance
[2]
[8]
fref
reference frequency
-
4
-
MHz
Vref(RMS)
RMS reference
voltage
see Figure 47
15
150
500
mV
RO
output resistance
of external reference signal
source; AC-coupled
-
-
4.7
kΩ
Cdec
decoupling
capacitance
to external reference signal
source
22
100
-
pF
Rswoff(FREF)
switch-off resistance
on pin FREF
to switch off reference signal
input by external resistor
wired between pin FREF
and GND
3.9
-
27
kΩ
Iswoff
switch-off current
Rswoff(FREF) = 3.9 kΩ
-
-
100
µA
Rswoff(FREF) = 22 kΩ
-
75
-
µA
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
85 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 58. Characteristics …continued
VP = 5 V[1]; Tamb = 25 °C; 8 MHz system; see Table 36 and Table 37; CW test input signal is used for specification;
Vi(IF) = 10 mV (RMS); fIF = 36 MHz for low IF output of 5 MHz; IF input from 50 Ω via broadband transformer 1 : 1;
gain controlled amplifier adjusted to typical specified output level; measurements taken in test circuit of Figure 49 with 4 MHz
crystal oscillator reference; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
2.3
2.6
2.9
V
[2]
200
350
500
Ω
[2]
200
300
360
mV
[2]
4
8
12
MHz
Reference frequency output; W7[7] = 1; pin FREF
VFREF
voltage on pin FREF
(DC)
pin open-circuit
RO
output resistance
Vo(fref)(p-p)
peak-to-peak
reference frequency
output voltage
f−3dB(u)
upper cut-off
frequency
Ibias(int)
internal bias current
(DC)
of emitter follower
[2]
150
200
-
µA
Isink(o)(max)
maximum output sink
current
AC and DC
[2]
100
-
-
µA
Isource(o)(max)
maximum output
source current
AC and DC; with resistor to
GND
[2][10]
430
-
-
µA
pin open-circuit
[1]
Some parameters can be decreased at VP = 4.5 V.
[2]
This parameter is not tested during production and is only given as application information.
[3]
Output current can be increased by application of single-ended resistor from each output pin to GND. Recommended resistor value is
minimum 1 kΩ.
[4]
With single-ended load for fIF < 45 MHz RL ≥ 1 kΩ and CL ≤ 5 pF to ground and for fIF = 45 MHz to 60 MHz RL = 1 kΩ and CL ≤ 3 pF to
ground.
[5]
Noise level is measured without input signal but AGC adjusted corresponding to the given input level.
[6]
Set with AGC nominal output voltage as reference. For C/N measurement switch input signal off.
[7]
With single-ended load RL ≥ 1 kΩ and CL ≤ 5 pF to ground.
[8]
The tolerance of the reference frequency determines the accuracy of VIF AFC, RIF AFC, FM demodulator center frequency, maximum
FM deviation, sound trap frequency, LIF band-pass cut-off frequency and ZIF low-pass cut-off frequency as well as the accuracy of the
synthesizer.
[9]
The value of Cpull determines the accuracy of the resonance frequency of the crystal. It depends on the used type of crystal.
[10] For driving three reference frequency inputs via decoupling capacitors in parallel (three times TDA9899, pin FREF, W7[7] = 0) and a
single-ended capacitive load up to 6.5 pF the recommended value of the resistor to GND is 10 kΩ.
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
86 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Conversion synthesizer PLL; loop filter dimensions[1]
Table 59.
fVCO (MHz)
RLFSYN2 (kΩ)[2]
CLFSYN2 (nF)
22 to 29.5
1.5
4.7
30 to 37.5
1.8
4.7
38 to 45.5
2.2
4.7
46 to 53.5
2.7
4.7
57
3.3
4.7
[1]
Calculation of the PLL loop filter by using the following formulae, valid under the condition for the damping
KO
KO
1
factor d ≥ 1.2. B LF ( – 3dB ) = -------K D R LFSYN2 and d = --- R LFSYN2 2π -------K D C LFSYN2 with the following
2
N
N
parameters
KO = VCO steepness (MHz/V),
f VCO
0.5 MHz
N = divider ratio: N = -------------------- ,
KD = phase frequency detector steepness (µA/rad),
RLFSYN2 = synthesizer loop filter serial resistor (Ω),
CLFSYN2 = synthesizer loop filter serial capacitor (F),
BLF(−3dB) = −3 dB LF bandwidth (Hz),
d = damping factor.
[2]
If more than one frequency range is used in the application, then the smallest resistor value should be
applied.
001aah343
30
(3)
CL(dif)
(pF)
20
(2)
10
(1)
0
0
1
2
3
RL(dif) (kΩ)
W4[7] = 0; nominal output level
(1) Direct IF, fmax = 40 MHz, with single-ended resistors of 1 kΩ to GND.
(2) Low IF, fmax = 9 MHz.
(3) Zero IF, fmax = 4 MHz.
Fig 37. Maximum differential load figures at OUT1/OUT2
TDA9899_3
Product data sheet
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87 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aaf467
130
C/N
(dBc/Hz)
120
(1)
110
(2)
(3)
100
90
80
30
50
70
90
110
Vi(IF)(RMS) (dBµV)
(1) Direct IF.
(2) Low IF.
(3) Zero IF.
Fig 38. Typical C/N ratio as a function of IF input voltage
Vi(IF)(RMS)
(dBµV)
Vo(dif)(p-p)
(V)
74
0.5
(1)
0
0
47
57.5
input signal
0
fi
(MHz)
αIM
0
36.5
47
57.5
68
output signal
fo
(MHz)
008aaa051
(1) 0.25 V for W4[7] = 1.
Fig 39. Direct IF signal conditions for measurement of intermodulation at OUT2
Vi(IF)(RMS)
(dBµV)
Vo(dif)(p-p)
(V)
74
1.0
(1)
0
36
fsynth
37.7
38.3
input signal
0
fi
(MHz)
αIM
0
1.1
1.7
2.3
output signal
2.9
fo
(MHz)
008aaa052
(1) 0.5 V for W4[7] = 1.
Fig 40. Zero IF signal conditions for measurement of intermodulation at OUT1 and OUT2
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
88 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Vi(IF)(RMS)
(dBµV)
Vo(dif)(p-p)
(V)
74
0.5
(1)
0
36
fsynth
40.7
41.3
input signal
0
fi
(MHz)
αIM
0
4.1
4.7
5.3
5.9
output signal
fo
(MHz)
008aaa053
(1) 0.25 V for W4[7] = 1.
Fig 41. Low IF signal conditions for measurement of intermodulation at OUT1
Vi(IF)(RMS)
(dBµV)
Vo(dif)(p-p)
(V)
80
2.0
(1)
0
36
fsynth
0
37.31
input signal
fi
(MHz)
αH(ib)
0
1.31
3.93
2.62
5.24
7.86
6.55
output signal
fo
(MHz)
008aaa054
(1) 1.0 V for W4[7] = 1.
Fig 42. Low IF signal conditions for measurement of harmonics at OUT1
001aad494
2
αresp(f)
(dB) 1
td(grp)LIF
(ns)
0
−1
−2
(1)
(2) (3)
−3
−4
−5
100
−6
0
(3)
−7
−100
−8
−200
−9
−10
0
2
4
6
8
10
12
f (MHz)
tolerance scheme:
(1)
(2)
(3)
(1) Channel bandwidth = 6 MHz.
(2) Channel bandwidth = 7 MHz.
(3) Channel bandwidth = 8 MHz.
Fig 43. Detailed low IF amplitude and group delay pass-band tolerance scheme
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
89 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aad495
10
αresp(f)
(dB) 0
−10
−20
−30
−40
(3)
−50
(2)
(1)
−60
−70
−30
−25
−20
−15
−10
−5
0
f (MHz)
tolerance scheme:
(1)
(2)
(3)
(1) Channel bandwidth = 6 MHz.
(2) Channel bandwidth = 7 MHz.
(3) Channel bandwidth = 8 MHz.
Fig 44. Low IF amplitude stop-band tolerance scheme
001aad496
10
αresp(f)
(dB) 0
−10
−20
(1)
(2)
(3)
−30
−40
−50
−60
−70
0
5
10
15
20
25
30
f (MHz)
tolerance scheme:
(1)
(2)
(3)
(1) Channel bandwidth = 6 MHz.
(2) Channel bandwidth = 7 MHz.
(3) Channel bandwidth = 8 MHz.
Fig 45. Low IF amplitude pass-band tolerance scheme
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
90 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
008aaa089
100
G(7)
(dB)
80
60
(1)
(4)
(2)
(5)
(3)
(6)
40
20
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VAGCDIN (V)
(1) 2.0 V (p-p) differential output voltage (LIF or ZIF, W9[7] = 0, W4[7] = 0).
(2) 1.0 V (p-p) differential output voltage (LIF or ZIF, W9[7] = 0, W4[7] = 1; DIF, W9[7] = 0,
W4[7] = 0).
(3) 0.5 V (p-p) differential output voltage (DIF, W9[7] = 0, W4[7] = 1).
(4) 2.0 V (p-p) differential output voltage (LIF or ZIF, W9[7] = 1, W4[7] = 0).
(5) 1.0 V (p-p) differential output voltage (LIF or ZIF, W9[7] = 1, W4[7] = 1; DIF, W9[7] = 1,
W4[7] = 0).
(6) 0.5 V (p-p) differential output voltage (DIF, W9[7] = 1, W4[7] = 1).
(7) Ratio of output peak-to-peak level to input RMS level.
Fig 46. Typical gain characteristic for AGCDIN control voltage
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
91 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
001aag285
105
ϕn(synth)
(dBc/Hz)
(1)
(2)
95
(3)
85
75
0
100
200
300
400
500
Vi(FREF)(RMS) (mV)
fsynth = 40 MHz; fIF = 44 MHz
(1) ∆f = 100 kHz.
(2) ∆f = 10 kHz.
(3) ∆f = 1 kHz.
Fig 47. Typical synthesizer phase noise at carrier frequency plus ∆f on LIF output versus
input voltage on pin FREF
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
92 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
13. Application information
tuner
AGC
output
4 MHz
reference
input
synthesizer
trap control
loop filter
3.3 kΩ(2)
CTAGC
220 nF
CFREF
100 pF
22 kΩ(1)
synthesizer
downconverter
loop filter(4)
diversity
output
47
45
44
43
42
41
100
nF
22 pF
40
39
AGC or diversity
sample-and-hold
control switch
37
36
2
35
48
46
analog
ground
1
22 pF
RLFSYN2 CLFSYN2
470 Ω
4 MHz(3)
VP = 5 V
VIF AGC
input 1
38
AGC input 2 for DIF
(from channel decoder)
CLC
n.c.
RLC
4.7 nF 82 kΩ
CHC
3
34
1.5 nF
4
33
2 V CVBS
output
5
32
BVS
31
AUD
CIFAGC
X3450L
470 nF
6
SAW
VIF/SIF/DIF
7 MHz WINDOW
(5)
TDA9899
(b)
30
7
IF
ZIF Q or
1st DIF
(5)
CCTAGC
8
29
9
28
(a)
390 nF
CAF
SAW
VIF/SIF/DIF
6 MHz WINDOW
470 nF
10
(b)
27
(5)
11
(a)
26
digital LIF
ZIF I or
analog 2n
sound IF
(5)
MPP1
12
25
13
14
15
16
17
18
19
20
21
MPP2
220 nF
560 Ω
BP
330 Ω
Cpar
Cs
FM PLL
(6)
560 loop filter
Rs
(5)
Cde-em
4.7 nF
22
23
24
digital
ground
ADRSEL
100 Ω
100 Ω
Ω
VIF
loop filter
external
FM input
SDA
SCL
008aaa036
(1) Connect resistor if external reference signal is not used.
(2) Connect resistor if crystal is not used.
(3) Use of crystal is optional.
(4) Application depends on synthesizer frequency; see Table 59.
(5) Optional.
(6) See Table 56.
Fig 48. Application diagram of TDA9899
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
93 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
14. Test information
tuner
AGC
output
4 MHz
reference
input
synthesizer
trap control
loop filter
3.3 kΩ(2)
CTAGC
100 nF
22 kΩ(1)
VP = 5 V
VIF AGC
input 1
synthesizer
downconverter
loop filter(4)
RLFSYN2
CFREF
100 pF
47
44
43
42
41
40
39
AGC or diversity
sample-and-hold
control switch
37
36
2
35
48
45
100
nF
22 pF
1
22 pF
46
470 Ω
4 MHz(3)
analog
diversity ground
output
38
AGC input 2 for DIF
(from channel decoder)
CLFSYN2
CLC
n.c.
RLC
82 kΩ
SIF/DIF
1
1:1
5
4.7 nF
CHC
3
34
1.5 nF
51 Ω
2
4
3
4
33
2 V CVBS
output
5
32
BVS
31
AUD
CIFAGC
470 nF
VIF/SIF/DIF
1
1:1
5
6
TDA9899
51 Ω
2
4
3
7
30
(b)
8
29
(a)
9
28
ZIF Q or 1st DIF
CCTAGC
100 nF
VIF/SIF/DIF
1
1:1
5
CAF
470 nF
51 Ω
2
4
10
27
(b)
11
26
(a)
digital LIF or ZIF I or
analog 2nd sound IF
3
TOP potentiometer for
RSSI and positive modulation
22 kΩ
MPP1
12
25
13
+5 V
2.7 kΩ
14
15
16
only for port
function
17
18
19
20
21
MPP2
Cpar
Cs
FM PLL
loop filter(5)
Rs
220 nF
330 Ω
VIF
loop filter
output to
sound BPF
FM input
from sound BPF
22
23
24
digital
ground
Cde-em
4.7 nF
ADRSEL
100 Ω
external
FM input
SDA
100 Ω
SCL
008aaa037
(1) Connect resistor if external reference signal is not used.
(2) Connect resistor if crystal is not used.
(3) Use of crystal is optional.
(4) Application depends on synthesizer frequency; see Table 59.
(5) See Table 56.
Fig 49. Test circuit
TDA9899_3
Product data sheet
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94 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
15. Package outline
LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
SOT313-2
c
y
X
36
25
A
37
24
ZE
e
E HE
A A2
(A 3)
A1
w M
θ
bp
pin 1 index
Lp
L
13
48
1
detail X
12
ZD
e
v M A
w M
bp
D
B
HD
v M B
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HD
HE
L
Lp
v
w
y
mm
1.6
0.20
0.05
1.45
1.35
0.25
0.27
0.17
0.18
0.12
7.1
6.9
7.1
6.9
0.5
9.15
8.85
9.15
8.85
1
0.75
0.45
0.2
0.12
0.1
Z D (1) Z E (1)
θ
0.95
0.55
7
o
0
0.95
0.55
o
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT313-2
136E05
MS-026
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
00-01-19
03-02-25
Fig 50. Package outline SOT313-2 (LQFP48)
TDA9899_3
Product data sheet
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95 of 103
TDA9899
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Multistandard hybrid IF processing including car mobile
HVQFN48: plastic thermal enhanced very thin quad flat package; no leads;
48 terminals; body 7 x 7 x 0.85 mm
A
B
D
SOT619-1
terminal 1
index area
A
E
A1
c
detail X
C
e1
1/2 e
e
24
y
y1 C
v M C A B
w M C
b
13
L
25
12
e
e2
Eh
1/2 e
1
36
terminal 1
index area
48
37
Dh
X
0
2.5
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A(1)
max.
A1
b
1
0.05
0.00
0.30
0.18
5 mm
c
D (1)
Dh
E (1)
Eh
0.2
7.1
6.9
5.25
4.95
7.1
6.9
5.25
4.95
e
e1
5.5
0.5
e2
L
v
5.5
0.5
0.3
0.1
w
0.05
y
y1
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT619-1
---
MO-220
---
EUROPEAN
PROJECTION
ISSUE DATE
01-08-08
02-10-18
Fig 51. Package outline SOT619-1 (HVQFN48)
TDA9899_3
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TDA9899
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Multistandard hybrid IF processing including car mobile
16. Soldering
16.1 Introduction
There is no soldering method that is ideal for all surface mount IC packages. Wave
soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is recommended.
16.2 Through-hole mount packages
16.2.1 Soldering by dipping or by solder wave
Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C
or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.
The total contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the plastic
body must not exceed the specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling may be necessary immediately
after soldering to keep the temperature within the permissible limit.
16.2.2 Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the
seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is
less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is
between 300 °C and 400 °C, contact may be up to 5 seconds.
16.3 Surface mount packages
16.3.1 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 52) than a PbSn process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 60 and 61
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
97 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 60.
SnPb eutectic process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (°C)
Volume (mm3)
< 350
≥ 350
< 2.5
235
220
≥ 2.5
220
220
Table 61.
Lead-free process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (°C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 52.
temperature
maximum peak temperature
= MSL limit, damage level
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 52. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
16.3.2 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices
(SMDs) or printed-circuit boards with a high component density, as solder bridging and
non-wetting can present major problems.
TDA9899_3
Product data sheet
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Rev. 03 — 15 January 2008
98 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
To overcome these problems the double-wave soldering method was specifically
developed.
If wave soldering is used the following conditions must be observed for optimal results:
• Use a double-wave soldering method comprising a turbulent wave with high upward
pressure followed by a smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be
parallel to the transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the
transport direction of the printed-circuit board.
The footprint must incorporate solder thieves at the downstream end.
• For packages with leads on four sides, the footprint must be placed at a 45° angle to
the transport direction of the printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must be fixed with a droplet of
adhesive. The adhesive can be applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C
or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most
applications.
16.3.3 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage
(24 V or less) soldering iron applied to the flat part of the lead. Contact time must be
limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be soldered in one operation within
2 seconds to 5 seconds between 270 °C and 320 °C.
16.4 Package related soldering information
Table 62.
Suitability of IC packages for wave, reflow and dipping soldering methods
Mounting
Through-hole mount
Through-hole-surface
mount
Package[1]
Soldering method
Wave
Reflow[2]
Dipping
CPGA, HCPGA
suitable
−
−
DBS, DIP, HDIP, RDBS, SDIP, SIL
suitable[3]
−
suitable
PMFP[4]
not suitable
not suitable
−
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
99 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 62.
Suitability of IC packages for wave, reflow and dipping soldering methods …continued
Package[1]
Mounting
Soldering method
Wave
Surface mount
HTSSON..T[5],
not suitable
BGA,
LBGA,
LFBGA, SQFP, SSOP..T[5], TFBGA,
VFBGA, XSON
Reflow[2]
Dipping
suitable
−
DHVQFN, HBCC, HBGA, HLQFP,
HSO, HSOP, HSQFP, HSSON,
HTQFP, HTSSOP, HVQFN,
HVSON, SMS
not suitable[6]
suitable
−
PLCC[7], SO, SOJ
suitable
suitable
−
not
recommended[7][8]
suitable
−
SSOP, TSSOP, VSO, VSSOP
not
recommended[9]
suitable
−
CWQCCN..L[10],
not suitable
not suitable
−
LQFP, QFP, TQFP
WQCCN..L[10]
[1]
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your NXP
Semiconductors sales office.
[2]
All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with
respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of
the moisture in them (the so called popcorn effect).
[3]
For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
[4]
Hot bar soldering or manual soldering is suitable for PMFP packages.
[5]
These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed
through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 °C ± 10 °C
measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible.
[6]
These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate
between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the
heatsink surface.
[7]
If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint
must incorporate solder thieves downstream and at the side corners.
[8]
Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for
packages with a pitch (e) equal to or smaller than 0.65 mm.
[9]
Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely
not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
[10] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted on flex foil.
However, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. The appropriate
soldering profile can be provided on request.
17. Abbreviations
Table 63.
Abbreviations
Acronym
Description
ADC
Analog-to-Digital Converter
AFC
Automatic Frequency Control
AGC
Automatic Gain Control
ATV
Analog TV
BP
Band-Pass
CW
Continuous Wave
DAC
Digital-to-Analog Converter
DC
Direct Current
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
100 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
Table 63.
Abbreviations …continued
Acronym
Description
DIF
Digital Intermediate Frequency
DSP
Digital Signal Processor
DTV
Digital TV
DVB
Digital Video Broadcast
ESD
ElectroStatic Discharge
FPLL
Frequency Phase-Locked Loop
IC
Integrated Circuit
IF
Intermediate Frequency
LCD
Liquid Crystal Display
LIF
Low Intermediate Frequency
MAD
Module Address
NICAM
Near Instantaneous Companded Audio Multiplex
PLL
Phase-Locked Loop
QSS
Quasi Split Sound
RIF
Radio Intermediate Frequency
RSSI
Received Signal Strength Indication
SAW
Surface Acoustic Wave
SC
Sound Carrier
SIF
Sound Intermediate Frequency
TAGC
Tuner Automatic Gain Control
TOP
TakeOver Point
TSS
True Split Sound
VCO
Voltage-Controlled Oscillator
VIF
Vision Intermediate Frequency
VITS
Vertical Interval Test Signal
WAFP
Weak Audio Frequency Processing
ZIF
Zero Intermediate Frequency
18. Revision history
Table 64.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TDA9899_3
20080115
Product data sheet
-
TDA9899_2
Modifications:
•
Additional specification of features for V2 version
TDA9899_2
20070208
Product data sheet
-
TDA9899HL_
TDA9899HN_1
TDA9899HL_
TDA9899HN_1
20060925
Product data sheet
-
-
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
101 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
19. Legal information
19.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
19.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I2C-bus — logo is a trademark of NXP B.V.
20. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
TDA9899_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 15 January 2008
102 of 103
TDA9899
NXP Semiconductors
Multistandard hybrid IF processing including car mobile
21. Contents
1
2
2.1
2.2
2.3
2.4
2.5
3
4
5
6
7
7.1
7.2
8
8.1
8.2
8.3
8.3.1
8.3.2
8.3.3
8.3.4
8.4
8.5
8.6
8.7
8.7.1
8.7.2
8.8
8.9
8.10
9
9.1
9.2
9.2.1
9.2.2
10
11
12
12.1
12.2
13
14
15
16
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Analog TV processing. . . . . . . . . . . . . . . . . . . . 1
Digital TV processing . . . . . . . . . . . . . . . . . . . . 2
Dual mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
FM radio mode . . . . . . . . . . . . . . . . . . . . . . . . . 3
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Quick reference data . . . . . . . . . . . . . . . . . . . . . 3
Ordering information . . . . . . . . . . . . . . . . . . . . . 7
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pinning information . . . . . . . . . . . . . . . . . . . . . 10
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 11
Functional description . . . . . . . . . . . . . . . . . . 12
IF input switch. . . . . . . . . . . . . . . . . . . . . . . . . 12
VIF demodulator . . . . . . . . . . . . . . . . . . . . . . . 13
VIF AGC and tuner AGC. . . . . . . . . . . . . . . . . 13
Mode selection of VIF AGC . . . . . . . . . . . . . . 13
External VIF AGC control . . . . . . . . . . . . . . . . 13
VIF AGC monitor . . . . . . . . . . . . . . . . . . . . . . 13
Tuner AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DIF/SIF FM and AM sound AGC . . . . . . . . . . 14
Frequency phase-locked loop for VIF . . . . . . . 14
DIF/SIF converter stage . . . . . . . . . . . . . . . . . 15
Mono sound demodulator . . . . . . . . . . . . . . . . 15
Narrow-band FM PLL demodulation. . . . . . . . 15
AM sound demodulation . . . . . . . . . . . . . . . . . 15
Audio amplifier . . . . . . . . . . . . . . . . . . . . . . . . 15
Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
I2C-bus transceiver and slave address . . . . . . 16
2
I C-bus control . . . . . . . . . . . . . . . . . . . . . . . . . 16
Read format . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Write format . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Subaddress. . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Description of data bytes . . . . . . . . . . . . . . . . 22
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 36
Thermal characteristics. . . . . . . . . . . . . . . . . . 36
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 36
Analog TV signal processing . . . . . . . . . . . . . 36
Digital TV signal processing . . . . . . . . . . . . . . 79
Application information. . . . . . . . . . . . . . . . . . 93
Test information . . . . . . . . . . . . . . . . . . . . . . . . 94
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 95
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
16.1
16.2
16.2.1
16.2.2
16.3
16.3.1
16.3.2
16.3.3
16.4
17
18
19
19.1
19.2
19.3
19.4
20
21
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Through-hole mount packages . . . . . . . . . . . 97
Soldering by dipping or by solder wave . . . . . 97
Manual soldering . . . . . . . . . . . . . . . . . . . . . . 97
Surface mount packages . . . . . . . . . . . . . . . . 97
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 97
Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 98
Manual soldering . . . . . . . . . . . . . . . . . . . . . . 99
Package related soldering information . . . . . . 99
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . 100
Revision history . . . . . . . . . . . . . . . . . . . . . . 101
Legal information . . . . . . . . . . . . . . . . . . . . . 102
Data sheet status . . . . . . . . . . . . . . . . . . . . . 102
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . 102
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . 102
Contact information . . . . . . . . . . . . . . . . . . . 102
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 15 January 2008
Document identifier: TDA9899_3
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