Asset - Application Note - AVR435: BLDC/BLAC Motor Control Using a Sinus Modulated PWM Algorithm on AT90PWM3B - Application Example and Algorithms

AVR435: BLDC/BLAC Motor Control Using a
Sinus Modulated PWM Algorithm
8-bit
Microcontrollers
1. Features
• Cost-effective and energy efficient BLDC/BLAC motor drive
• Implemented on an AT90PWM3 AVR® low cost microcontroller
• Low memory and computing requirements
Application Note
2. Introduction
Equipped with Hall effect sensors, permanent magnet motors are generally powered
by currents of 'trapezoidal' shape (Figure 2-1a). In order to improve the system's performance (less noise, less torque ripple) it can be an advantage to power these
motors using currents that have a 'sinusoidal' form (Figure 2-1b). BLDC motors are
designed to be supplied with a trapezoidal shape current, respectively BLAC motors
are designed to be supplied with a sinusoidal shape current, This application note proposes an implementation using the latter with an ATAVRMC100 board mounted with
an AT90PWM3B.
Figure 2-1.
3 Phases Output Voltages vs Hall Sensor Inputs
Hall Sensors
3 Phase Voltage
a : 3 PHASE TRAPEZOIDAL VOLTAGE
b : 3 PHASE SINUSOIDAL VOLTAGE
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3. AT90PWM3B Key Features
The control algorithms have been implemented on the AT90PWM3B, a low-cost low-power single-chip microcontroller, achieving up to 16 MIPS and suitable for the control of DC-DC buckboost converters, permanent magnet synchronous machines, three-phase induction motors and
brushless DC motors. This device integrates:
•
•
•
•
•
•
•
•
•
2
8-bit AVR advanced RISC architecture microcontroller (core similar to the ATmega 88)
8K Bytes of In-System-Programmable Flash memory
512 Bytes of static RAM to store variables and lookup tables dedicated to the application program
512 bytes of EEPROM to store configuration data and look-up tables
one 8-bit timer and one 16-bit timer
6 PWM channels optimized for Half-Bridge Power Control with 64MHz PLL Clock
an 11-channel 10-bit ADC and a 10-bit DAC
3 on-chip comparators
a programmable watchdog timer with an internal oscillator
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4. Theory of Operation
4.1
Introduction
This implementation is based on the use of the Space-Vector Modutation (SVPWM) technique.
The different sectors are determined and synchronized with the Hall sensors.
4.2
Principle of the Space-Vector Modulation
Figure 4-1.
Typical structure of the application.
Sa+
Sb+
BLDC Motor
Sc+
Va
Neutral
Vb
E
Vn
Vc
Hall Sensors
Sa-
Sb-
Sc-
Rotor
Position
Figure 4-1 shows the typical structure of a BLDC/BLAC motor connected to a Voltage Source
Inverter. Since the motor is considered as a balanced load with an unconnected neutral,
V n = 〈 V a + V b + V c〉 ⁄ 3 ,
Van = Va −Vn = (Vab −Vca) / 3 ,
Vbn = Vb −Vn = (Vbc −Vab) / 3
Vcn = Vc −Vn = (Vca −Vbc ) / 3 .
and
Since the upper power switches can only be On or Off, and since the lower ones are supposed
to always be in the opposed state (the dead-times of the inverter legs are neglected), there are
only eight possible switching states, as shown on Table 4-2. Six of them lead to non-zero phase
voltages, and two interchangeable states lead to zero phase voltages. When mapped in a 2Dframe fixed to the stator using a Concordia transformation [1,2], the six non-zero phase voltages
form the vertices of a hexagon. (See Figure 4-3)
Vα
Vβ
V an
× V bn
3
3
0 ------- – ------V cn
2
2
1
=
1
2
– --
1
2
– --
3
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Figure 4-2.
Possible switching configurations of a 3-phase inverter
S0=000
S1=001
S2=010
S3=011
S4=100
S5=101
S6=110
S7=111
As shown on Figure 4-3, the angle between two successive non-zero voltages is always 60
degrees.
j (k
π
−1)
3
In complex form, these non-zero phase voltages can be written as V = E e
, with k = 1..6 and
V0 = V7 = 0 V.
Table 4-1 shows the line-to-line and line-to-neutral voltages in each of the 8 possible configurations of the inverter.
k
Figure 4-3.
Representation of the eight possible switching configurations in the Concordia
reference frame
β
V3
V2
2
1
d2V2
Vβ
3
VS
V1
V4
d1V1
α
Vα
6
4
5
V5
Table 4-1.
Sa+
0
0
0
4
Sb+
0
0
1
V6
Switching configurations and output voltages of a 3-phase inverter
Sc+
0
1
0
Si
Vab
S0
0
S1
0
S2
-E
Vbc
0
-E
E
Vca
0
E
0
Van
0
-E/3
-E/3
Vbn
0
-E/3
+2E/3
Vcn
0
+2E/3
-E/3
Vα
Vβ
0
0
-E/2
–E 3 ⁄ 2
-E/2
E 3⁄2
Vi
V0
V5
V3
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Table 4-1.
Sa+
Sb+
0
1
1
0
1
0
1
1
1
1
Table 4-2.
Switching configurations and output voltages of a 3-phase inverter
Sc+
1
0
1
0
1
Si
Vab
S3
-E
S4
E
S5
E
S6
0
S7
0
Vbc
0
0
-E
E
0
Vca
Van
E
-2E/3
-E
+2E/3
0
E/3
-E
E/3
0
0
Vbn
Vcn
-E/3
-E/3
-E/3
-E/3
-2E/3
E/3
E/3
-2E/3
0
0
Vα
Vβ
-E
0
Vi
E
0
E/2
–E 3 ⁄ 2
E/2
E 3⁄2
0
0
V4
V1
V6
V2
V7
Expressions of the duty cycles in each sector
Sector
Number
θ
dk
π
3
[0,--- ]
1
π 2π
3 3
dk+1
2
3
V
E
π
3
2
3
V
E
π
3
------- × -----S- × sin 〈 --- + θ〉
2
[--- ,------ ]
3
[------ ,π]
4
[π,------ ]
------- × -----S- × sin 〈 ------ + θ〉
5
[------ ,------ ]
4π 5π
3 3
------- × -----S- × sin 〈 ------ + θ〉
6
[ ------,2π]
5π
3
------- × -----S- × sin 〈 2π – θ〉
2π
3
4π
3
2
3
------- × -----S- × sin 〈 --- – θ〉
V
E
2
3
------- × -----S- × sin 〈 θ〉
V
E
------- × -----S- × sin 〈 θ〉
2
3
V
E
5π
3
2
3
V
E
4π
3
2
3
V
E
2
3
V
E
π
3
2
3
V
E
π
3
------- × -----S- × sin 〈 ------ + θ〉
------- × -----S- × sin 〈 ------ + θ〉
2
3
V
E
5π
3
------- × -----S- × sin 〈 2π – θ〉
2
3
V
E
4π
3
------- × -----S- × sin 〈 --- – θ〉
2
3
V
E
------- × -----S- × sin 〈 --- + θ〉
In the Concordia frame, any stator voltage Vs = Vα + j Vβ = Vsm cos(θ ) + j Vsm sin(θ ) located inside
this hexagon belongs to one of the six sectors, and can be expressed as a linear combination of
the two non-zero phase voltages which delimit this sector:
Vs = dk Vk + dk+1 Vk +1 . Equating
dk Vk + dk+1 Vk +1 to Vsm cos(θ ) + j Vsm sin(θ ) in each sector leads to the expressions of the duty
cycles shown in Table 4-2 Since the inverter cannot instantaneously generate Vs , the spacevector PWM principle consists in producing a Ts -periodic voltage whose average value equals
Vs ,by generating Vk during Tk = d k Ts and Vk +1 during Tk +1 = d k +1Ts . Since d k + d k +1 ≤ 1 , these
voltages must be completed over the switching period Ts by V0 and/or V7 . Several solutions are
possible, and the one which minimizes the total harmonic distorsion of the stator current
1 − d k − d k +1
T = T7 =
Ts V
consists in applying V0 and V7 during the same duration 0
. 0 is equally
2
applied at the beginning and at the end of the switching period, whereas V7 is applied at the
middle. As an illustration, the upper side of Figure 4-4 shows the waveforms obtained in sector
1.
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4.3
Efficient Implementation of the SV-PWM
Table 4-2 seems to show that the duty cycles have different expressions in each sector. A thorough study of these expressions show that since sin( x ) = sin(π − x ) , all these duty cycles can be
written in a unified way as d k =
θ ′ = θ − (k − 1)
V sm
sin(θ ′′)
E 3
2
and
d k +1 =
V sm
π
−θ ′
sin(θ ′) , with θ ′′ =
3
E 3
2
and
π
3 . Since these expressions no longer depend on the sector number, they can be
π
denoted as d a and db . Since θ ′ is always between 0 and 3 , computing d a and db requires a
sine table for angles inside this interval only. This greatly reduces the amount of memory
required to store this sine table.
The AT90PWM3 provides the 3 power stage controllers (PSC) needed to generate the switching
waveforms computed from the Space Vector algorythms.
The counters will count from zero to a value corresponding to one half of the switching period
(as shown on the lower side of Fig. 4), and then count down to zero. The values that must be
stored in the three compare registers are given in Table 4-3
Figure 4-4.
Inverter switch waveforms and corresponding compare register values
TS
T0/2
T1/2
V0
V1
T2/2 T7/2 T7/2 T2/2 T1/2
V2
V7
V2
V1
T0/2
V0
Sa+
Sb+
Sc+
TS/2
Cc
Cb
Ca
t
TS
6
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Table 4-3.
4.4
Compare Register Values vs Sector Number
Sector Determination Algorithm
The Sector Determination is based on the reading of the three Hall sensors. All along one electrical revolution, the three Hall sensors generates 6 steps. These 6 steps divide the circle in 6
sectors which will be used in the SVPWM (see Figure 4-5)
Figure 4-5.
Sector Determination
HALL EVENT
HALL VALUE
a
b
m
c
n
d
p
e
q
f
r
s
COUNTER CU
0
0
0
m
n
p
0
0
q
0
r
s
COUNTER CD
Sector 6
Sector 1
Sector 2
Sector 3
Sector 4
Sector 5
Sector 6
Inside one sector a counter, CU is incremented at a rate given by a high frequency reference
clock. At the end of the sector the counter CU is copied into the counter CD. Then this counter
CD is decremented by the same reference rate. This counter CD reflects the value of the angle
ϑ of VS vector inside a sector (see Figure 4-6) For example during sector 1, counter CU is incremented from 0 to n. At Hall Event, counter CU is copied in counter CD. Then during sector 2
counter CU is incremented and counter CD is decremented. Counter CD will drive the rotation of
the vector Vs (see Figure 4-6)
7
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Figure 4-6.
Rotation of Vs Vector
DC
n
UC
p
p
0
V3
0
2
n
V2
CU
CU
CD
CD
Vs
3
1
ϑ
m
q
0
V4
V1
0
m
q
6
CD
CD
CU
CU
4
r
V5
0
5
CU
V6
s 0
s
r
CD
Figure 4-7 shows the data flow of the implementation of this SVPWM core. The Hall Sensors
gives the sector number and the two angles ϑ‘ and ϑ‘’. These angles point in a sine table. The
sine value is multiplied by the voltage to calculate da and db. Then da and db are used to determine the compare values sent to the PSC (see Figure 4-4 on page 6).
Figure 4-7.
Space Vector PWM data flow diagram
2V sm
Voltage
Hall
Sensors
Demux
E 3
Sector &
angle
determ.
θ'
θ''
Sine
Table
da
Ca
d b Compare
register
values
determination
Cb
Cc
Direction
The resulting dataflow diagram, shown on Figure 4-7, can be used to build a speed control loop
(Figure 4-8), in which the difference between the desired speed and the measured speed feeds
a PI controller that determines the stator voltage frequency.
8
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Figure 4-8.
Block diagram of the complete control system.
Reference
Voltage
PI
SVPWM
PSC
Inverter
Sector
Determination
Motor
Hall Sensors
Speed
5. Hardware Description (ATAVRMC100)
This application is available on the ATAVRMC100 evaluation board equipped with an
AT90PWM3B. This board provides a way to start and experiment BLDC and BLAC motor
control.
ATAVRMC100 main features:
• AT90PWM3 microcontroller
• 12VDC motor drive
• ISP & Emulator interface
6. Software Description
All algorithms have been written in the C language using IAR Embedded Workbench® and AVR
Studio® as development tools. For the space vector PWM algorithm, a table of the rounded
2πk
) for
values of 127 sin(
k between 0 and 80 is used. The length of this table (81 bytes) is a
480
better trade-off between the size of the available internal memory and the quantification of the
rotor shaft speed. For bi-directional speed control, the values stored in two of the comparators
are interchanged when the output of the PI regulator is a negative number (see Figure 4-8).
6.1
Project Description
The software is available in the attached project on the Atmel web Site.
An html documentation is included in the package. Use the index.html file in the doc directory to
start viewing this documentation.
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6.2
Resources
This values include all the application ressources (main, serial communication...)
Code Size : 4 408bytes
RAM Size : 291 bytes
CPU Load : 33% @ 16MHz
Timer 0 is used for speed measurement/main tick/svpwm
Timer 1 is not used
PSC0,1,2 are used to generate PWM
ADC is used for current measurement. It is synchronized by PSC on the PWM waveform.
6.3
Experimentation
Figure 6-1 shows the voltage between one phase and neutral point obtained with the microcontroller for speed reference 7000 rpm. Figure 6-2 shows the voltage between two phases
obtained with the microcontroller for speed reference 7000 rpm.These experimental results were
obtained with the BLDC motor included in the kit.
Figure 6-1.
10
Voltage between one phase and neutral point @7000rpm
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Figure 6-2.
Voltage between two phases @7000rpm
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