Application Notes

AN11220
BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
Rev. 2 — 8 January 2013
Application note
Document information
Info
Content
Keywords
BGA3012, Evaluation board, CATV, Drop amplifier
Abstract
This application note describes the schematic and layout requirements
for using the BGA3012 as a CATV drop amplifier.
AN11220
NXP Semiconductors
BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
Revision history
Rev
Date
Description
1
20121012
First publication
2
20130108
Updated with improved application circuit and test data
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
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1. Introduction
The BGA3012 customer evaluation board enables the user to evaluate the performance
of the wideband CATV MMIC amplifier BGA3012.
The BGA3012 performance information is available in the BGA3012 datasheet.
This application note describes the evaluation board schematic and layout requirements
for using the BGA3012 as a CATV drop amplifier between 40 MHz and 1003 MHz. The
BGA3012 is fabricated in the BiCMOS process and packaged in a lead-free 3-pin SOT89
package. The BGA3012 is surface-mounted on an evaluation board with element
matching and DC decoupling circuitry. The amplifier MMIC comprises a two stage
amplifier with internal bias network and operates over a frequency range of 5 MHz to
1003 MHz with a supply voltage between 5 V and 8 V.
2. System features
•
•
•
•
•
•
•
•
12 dB gain
Internally biased
Flat gain between 40 MHz and 1003 MHz
Noise figure of 3.2 dB
High linearity with an IP3O of 40 dBm and IP2O of 60 dBm
75 Ω input and output impedance
Unconditionally stable
Excellent input and output return loss
3. Customer evaluation kit contents
The evaluation kit contains the following items:
• ESD safe casing
• BGA3012 evaluation board
• BGA3012 SOT89 samples
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4. Application Information
For evaluation purposes an evaluation board is available. The evaluation circuit can be
seen in figure 1 and the corresponding PCB is shown in figure 2. Table 1 shows the bill
of materials.
4.1 Evaluation board circuit
Fig 1.
BGA3012 evaluation circuit
The power supply is applied on the center pin of connector J3 and is applied to the MMIC
via chokes L4 and L2 which provides RF blocking to the supply line. Choke L4 is put in
series with choke L2 to improve the performance at frequencies below 100 MHz.
Capacitors C4 and C5 are supply decoupling capacitors.
At the F-connector J1 the RF input signal is applied where capacitor C1 provides DCblocking, followed by L1 for input matching (Z = 75 Ω). Resistors R1 and R2 are used as
feedback resistors to set the gain and slope. Two resistors are used to lower the
influence of the parasitic capacitance from the circuit board. Capacitor C2 provides DCblocking between the input and output of the MMIC. Inductor L3 provides the output
matching (Z = 75 Ω) at the MMICs output followed by C3 for DC-blocking before the RF
signal is available at F-connector J2.
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4.2 Evaluation board layout
PCB material
PCB thickness
PCB size
εr
Copper thickness
Fig 2.
= FR4
= 1.5 mm
= 40 mm x 40 mm
= 4.6
= 35 µm
BGA3012 evaluation board layout
For optimum distortion performance it is important to have enough ground vias
underneath and around the MMICs ground pins. This lowers the inductance to the
ground plane. The evaluation board is made with two layer FR4 material.
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4.3 Bill of materials
Table 1.
Evaluation board BOM
Circuit
Description Qty Mfr
Reference
Manufacturer number Supplier Supplier part
number
U1
BGA3012
1
NXP
BGA3012
NXP
BGA3012
C1, C2,
10 nF
4
Murata
GRM155R71E103KA01D
Digikey
490-1312-1-ND
C5
100 pF
1
Murata
GRM1555C1H101JZ01D
Digikey
490-3458-1-ND
L1, L3
3.9 nH
2
Murata
LQG15HS3N9S02D
Digikey
490-2617-1-ND
L2
Choke
1
Murata
BLM15HD182SN1D
Digikey
490-5196-1-ND
L4
880nH
1
Murata
LQH31HNR88K03L
Digikey
LQH31HNR88K03LND
R1
300 Ω
1
Yageo
RC0402FR-07300RL
Digikey
311-300LRCT-ND
R2
100 Ω
1
Yageo
RC0402FR-07100RL
Digikey
311-100LRCT-ND
J1, J2
75 Ω Fconnector
2
Bomar
861V509ER6
Mouser
678-861V509ER6
J3
Header 3
1
Molex
90121-0763
Digikey
WM8109-ND
C3, C4
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BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
5. Measurement results at Vcc = 8 V
5.1 S-Parameters
-10
-12
-14
S11[dB]
-16
-18
-20
(1) (2) (3)
-22
-24
-26
-28
-30
40
240
440
640
840
1040
840
1040
Frequency[MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 3.
Input matching (S11); Vcc = 8 V
-10
-12
-14
S22[dB]
-16
-18
-20
-22
-24
-26
(1) (2) (3)
-28
-30
40
240
440
640
Frequency[MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 4.
AN11220
Application note
Output matching (S22); Vcc = 8 V
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BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
15
(1) (2) (3)
14
S21[dB]
13
12
11
10
9
40
240
440
640
840
1040
840
1040
Frequency[MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 5.
Gain (S21); Vcc = 8 V
1.3
1.2
K-Factor
1.1
(1) (2) (3)
1
0.9
0.8
0.7
40
240
440
640
Frequency[MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 6.
AN11220
Application note
K-factor; Vcc = 8 V
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BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
5.2 Distortion
-65
CTB [dBc]
-70
(1)
-75
-80
-85
-90
0
200
400
600
800
1000
800
1000
Frequency [MHz]
(1) Tamb = +25 °C
132 channels NTSC , Vo = 30 dBmV
Fig 7.
Composite triple beat (CTB); Vcc = 8 V
-55
-56
-57
CSO [dBc]
-58
-59
(1)
-60
-61
-62
-63
-64
-65
0
200
400
600
Frequency [MHz]
(1) Tamb = +25 °C
132 channels NTSC , Vo = 30 dBmV
Fig 8.
AN11220
Application note
Composite second order (CSO); Vcc = 8 V
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XMOD [dBc]
BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
-60
-61
-62
-63
-64
-65
-66
-67
-68
-69
-70
-71
-72
-73
-74
-75
(1)
0
200
400
600
800
1000
840
1040
Frequency [MHz]
(1) Tamb = +25 °C
132 channels NTSC , Vo = 30 dBmV
Fig 9.
Cross modulation (XMOD); Vcc = 8 V
5.3 Noise figure
5.0
Noise Figure [dB]
4.5
(1) (2) (3)
4.0
3.5
3.0
2.5
2.0
40
240
440
640
Frequency [MHz]
(1) Tamb = -30 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 10. Noise figure (NF); Vcc = 8 V
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BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
5.4 Output P1dB
28
27
26
P1dB(out)
25
24
(1) (2) (3)
23
22
21
20
19
18
0
200
400
600
800
1000
1200
Frequency [MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 11. Output P1dB; Vcc = 8 V
5.5 Output IP2
80
Output IP2 [dBm]
75
(1) (2) (3)
70
65
60
55
50
45
40
0
200
400
600
800
1000
1200
Frequency [MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
f2 = f1 ± 6 MHz , input power = -20 dBm
Fig 12. Output IP2; Vcc = 8 V
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BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
5.6 Output IP3
60
Output IP3 [dBm]
55
(1) (2) (3)
50
45
40
35
30
0
200
400
600
800
1000
1200
Frequency [MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
f2 = f1 ± 6 MHz , input power = -20 dBm
Fig 13. Output IP3; Vcc = 8 V
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BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
6. Measurement results at Vcc = 5 V
6.1 S-Parameters
-10
-12
-14
S11[dB]
-16
-18
(1) (2) (3)
-20
-22
-24
-26
-28
-30
40
240
440
640
840
1040
840
1040
Frequency[MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 14. Input matching (S11); Vcc = 5 V
-10
-12
-14
S22[dB]
-16
-18
-20
-22
-24
(1) (2) (3)
-26
-28
-30
40
240
440
640
Frequency[MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 15. Output matching (S22); Vcc = 5 V
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BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
15
(1) (2) (3)
14
S21[dB]
13
12
11
10
9
40
240
440
640
840
1040
840
1040
Frequency[MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 16. Gain (S21); Vcc = 5 V
1.3
1.2
K-Factor
1.1
(1) (2) (3)
1
0.9
0.8
0.7
40
240
440
640
Frequency[MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 17. K-factor; Vcc = 5 V
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BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
6.2 Distortion
-60
CTB [dBc]
-65
(1)
-70
-75
-80
-85
0
200
400
600
800
1000
800
1000
Frequency [MHz]
(1) Tamb = +25 °C
132 channels NTSC , Vo = 30 dBmV
Fig 18. Composite triple beat (CTB); Vcc = 5 V
-50
-51
-52
CSO [dBc]
-53
-54
(1)
-55
-56
-57
-58
-59
-60
0
200
400
600
Frequency [MHz]
(1) Tamb = +25 °C
132 channels NTSC , Vo = 30 dBmV
Fig 19. Composite second order (CSO); Vcc = 5 V
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XMOD [dBc]
BGA3012 - 1 GHz 12 dB gain wideband amplifier MMIC
-60
-61
-62
-63
-64
-65
-66
-67
-68
-69
-70
-71
-72
-73
-74
-75
(1)
0
200
400
600
800
1000
840
1040
Frequency [MHz]
(1) Tamb = +25 °C
132 channels NTSC , Vo = 30 dBmV
Fig 20. Cross modulation (XMOD); Vcc = 5 V
6.3 Noise Figure
5.0
Noise Figure [dB]
4.5
(1) (2) (3)
4.0
3.5
3.0
2.5
2.0
40
240
440
640
Frequency [MHz]
(1) Tamb = -30 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 21. Noise figure (NF); Vcc = 5 V
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6.4 Output P1dB
20
19
P1dB(out)
(1) (2) (3)
18
17
16
15
0
200
400
600
800
1000
1200
Frequency [MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
Fig 22. Output P1dB; Vcc = 5 V
6.5 Output IP2
60
Output IP2 [dBm]
55
(1) (2) (3)
50
45
40
35
30
0
200
400
600
800
1000
1200
Frequency [MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
f2 = f1 ± 6 MHz , input power = -20 dBm
Fig 23. Output IP2; Vcc = 5 V
6.6 Output IP3
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55
Output IP3 [dBm]
50
(1) (2) (3)
45
40
35
30
25
0
200
400
600
800
1000
1200
Frequency [MHz]
(1) Tamb = -40 °C
(2) Tamb = +25 °C
(3) Tamb = +85 °C
f2 = f1 ± 6 MHz , input power = -20 dBm
Fig 24. Output IP3; Vcc = 5 V
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7. Abbreviations
Table 2.
Abbreviations
Acronym
Description
AN11220
Application note
AC
Alternating Current
CATV
Community Antenna TeleVision
DC
Direct Current
ESD
Electro Static Discharge
MMIC
Monolithic Microwave Integrated Circuit
NTSC
National Television Standards Committee
PCB
Printed Circuit Board
RF
Radio Frequency
SMD
Surface Mounted Device
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8. Legal information
8.1 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
8.2 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability
towards customer for the products described herein shall be limited in
accordance with the Terms and conditions of commercial sale of NXP
Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s
own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Evaluation products — This product is provided on an “as is” and “with all
faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates
and their suppliers expressly disclaim all warranties, whether express,
implied or statutory, including but not limited to the implied warranties of noninfringement, merchantability and fitness for a particular purpose. The entire
risk as to the quality, or arising out of the use or performance, of this product
remains with customer.
In no event shall NXP Semiconductors, its affiliates or their suppliers be
liable to customer for any special, indirect, consequential, punitive or
incidental damages (including without limitation damages for loss of
business, business interruption, loss of use, loss of data or information, and
the like) arising out the use of or inability to use the product, whether or not
based on tort (including negligence), strict liability, breach of contract, breach
of warranty or any other theory, even if advised of the possibility of such
damages.
Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
all direct or general damages), the entire liability of NXP Semiconductors, its
affiliates and their suppliers and customer’s exclusive remedy for all of the
foregoing shall be limited to actual damages incurred by customer based on
reasonable reliance up to the greater of the amount actually paid by
customer for the product or five dollars (US$5.00). The foregoing limitations,
exclusions and disclaimers shall apply to the maximum extent permitted by
applicable law, even if any remedy fails of its essential purpose.
8.3 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are property of their respective owners.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP
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9. List of figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10.
Fig 11.
Fig 12.
Fig 13.
Fig 14.
Fig 15.
Fig 16.
Fig 17.
Fig 18.
Fig 19.
Fig 20.
Fig 21.
Fig 22.
Fig 23.
Fig 24.
BGA3012 evaluation circuit ............................... 4
BGA3012 evaluation board layout .................... 5
Input matching (S11); Vcc = 8 V ....................... 7
Output matching (S22); Vcc = 8 V .................... 7
Gain (S21); Vcc = 8 V ....................................... 8
K-factor; Vcc = 8 V ............................................ 8
Composite triple beat (CTB); Vcc = 8 V ............ 9
Composite second order (CSO); Vcc = 8 V ...... 9
Cross modulation (XMOD); Vcc = 8 V............. 10
Noise figure (NF); Vcc = 8 V ........................... 10
Output P1dB; Vcc = 8 V .................................. 11
Output IP2; Vcc = 8 V ..................................... 11
Output IP3; Vcc = 8 V ..................................... 12
Input matching (S11); Vcc = 5 V ..................... 13
Output matching (S22); Vcc = 5 V .................. 13
Gain (S21); Vcc = 5 V ..................................... 14
K-factor; Vcc = 5 V .......................................... 14
Composite triple beat (CTB); Vcc = 5 V .......... 15
Composite second order (CSO); Vcc = 5 V .... 15
Cross modulation (XMOD); Vcc = 5 V............. 16
Noise figure (NF); Vcc = 5 V ........................... 16
Output P1dB; Vcc = 5 V .................................. 17
Output IP2; Vcc = 5 V ..................................... 17
Output IP3; Vcc = 5 V ..................................... 18
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10. List of tables
Table 1.
Table 2.
Evaluation board BOM ...................................... 6
Abbreviations .................................................. 19
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11. Contents
1.
2.
3.
4.
4.1
4.2
4.3
5.
5.1
5.2
5.3
5.4
5.5
5.6
6.
6.1
6.2
6.3
6.4
6.5
6.6
7.
8.
8.1
8.2
8.3
9.
10.
11.
Introduction ......................................................... 3
System features................................................... 3
Customer evaluation kit contents ...................... 3
Application Information ...................................... 4
Evaluation board circuit ...................................... 4
Evaluation board layout...................................... 5
Bill of materials ................................................... 6
Measurement results at Vcc = 8 V...................... 7
S-Parameters ..................................................... 7
Distortion ............................................................ 9
Noise figure ...................................................... 10
Output P1dB..................................................... 11
Output IP2 ........................................................ 11
Output IP3 ........................................................ 12
Measurement results at Vcc = 5 V.................... 13
S-Parameters ................................................... 13
Distortion .......................................................... 15
Noise Figure ..................................................... 16
Output P1dB..................................................... 17
Output IP2 ........................................................ 17
Output IP3 ........................................................ 17
Abbreviations .................................................... 19
Legal information .............................................. 20
Definitions ........................................................ 20
Disclaimers....................................................... 20
Trademarks ...................................................... 20
List of figures..................................................... 21
List of tables ...................................................... 22
Contents ............................................................. 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in the section 'Legal information'.
© NXP B.V. 2013.
All rights reserved.
For more information, visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 8 January 2013
Document identifier: AN11220
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