AND8494/D Thermal Sensing Methods used in ON Semiconductor Devices http://onsemi.com APPLICATION NOTE Introduction This application note will describe the standard methods used by ON Semiconductor devices for temperature measurement. It will also discuss the various sources of error that arise and the techniques used to minimize them. 2−Current Sensing Method The method used to eliminate dependence on Is is to switch 2 currents through the transistor and measure Vbe for each one. The difference in Vbe measurements can then be used to determine the transistor temperature. Re−arranging Equation 1 to get Vbe gives: Transistor Basics For a given collector current, Ic, the basic equation that relates the temperature of a transistor to the base−emitter voltage Vbe is: T :+ q @ Vbe ǒǓ @ T @ Ln Ic Vbe :+ K q Is The difference in Vbe for 2 currents, where Ic1 is the high level current and Ic2 is the low level current, is: (eq. 1) ǒǓ K @ Ln Ic Is (eq. 2) ǒ ǒ Ǔ ǒ ǓǓ @ T @ Ln Ic1 * Ln Ic2 Vbe1 * Vbe2 :+ K q Is Is where: T is the absolute temperature in degrees Kelvin K is Boltzmann’s constant (1.38 x 10−23 JK−1 ) q is the charge on the electron (1.6 x 10–19 coulombs) Ic is the collector current Is is the reverse saturation current Theoretically this equation can be used to determine the transistor temperature by setting Ic and measuring the base−emitter voltage. In practice this leads to large errors due to the dependence of the equation on Is, which can vary widely between transistors. In order to cancel out the dependency on Is and get a more accurate temperature measurement, a different technique is required. (eq. 3) which gives: ǒ Ǔ @ T @ Ln Ic1 Vbe1 * Vbe2 :+ K q Ic2 (eq. 4) Setting Ic1 as a fixed multiple, N, of Ic2 gives: @ T @ Ln(N) DVbe :+ K q (eq. 5) This is the equation used internally in 2−current ON Semiconductor devices to calculate temperature based on the difference in Vbe measurements. The typical value used for N is 17. The internal circuitry used in 2−current devices is shown in Figure 1. VDD * Capacitor C1 is optional. It is only necessary in noisy environments. C1 = 2.2 nF Typ, 3 nF Max. REMOTE SENSING TRANSISTOR I Nx1 IBIAS D+ VOUT+ C1* TO ADC D− BIAS DIODE LOW−PASS FILTER fC = 65 kHz VOUT− Figure 1. Internal Circuit for 2−current Device © Semiconductor Components Industries, LLC, 2011 October, 2011 − Rev. 0 1 Publication Order Number: AND8494/D AND8494/D As can be seen in Figure 1, there is an internal low pass filter to help with noise immunity. Typically the D− pin is biased above ground, which also helps to protect against noise interference. Figure 1 shows a diode connected transistor as the biasing element. Some devices use a resistor as the biasing element to reduce the biasing voltage. The connection of the remote sensor as shown in Figure 1 is for an internal sensor on a processor. If using a discrete transistor it must be connected as a diode−connected transistor. Connections for NPN or PNP transistors are shown in Figure 2. Figure 2. Connections for Discrete NPN and PNP Transistors The typical D+ and D− waveforms for a 2−current device are shown in Figure 3. Figure 3. D+/D− Waveforms for a 2−current Device In Figure 3 the yellow trace is D+, the blue trace is D− and the red trace is the differential voltage. The differential voltage here is ~74 mV which is typical for room temperature. • High frequency noise • Capacitance across D+/D− • Series Resistance Sources of Error in Temperature Measurement Errors due to non−ideality factor nf: Equation 5 assumes an ideal transistor. Most transistors deviate from the ideal model, and this deviation is taken into account by adding a correction factor, nf, to the equation. In order for a stable reading to be made it is usual for the device to take multiple measurements and average the results. This digital filtering reduces variations from reading to reading, but there are other factors that can introduce errors that must be taken into account. These are: • nf, the transistor non−ideality factor K @ T @ Ln(N) DVbe :+ nf @ q http://onsemi.com 2 (eq. 6) AND8494/D On Semiconductor devices use a value of 1.008 as the nf value when calculating temperature. The difference between a transistors actual nf value and the assumed 1.008 nf value will give rise to a temperature error. This error can be seen in Figure 4. Figure 4. Temperature Error due to nf Variations at 255C and 655C In Figure 4 the red plot is the error over a range of nf values at 25°C and the blue plot is the error for a range of nf values at 65°C. Errors due to high frequency noise: In a noisy environment like a motherboard the D+/D− lines can pick up interference which can introduce errors into the temperature measurement. This interference can be reduced by taking care with the layout of the D+/D− lines. The lines should be routed together to reduce differential noise and especially noisy sections of the motherboard should be avoided if possible. Ground plane shielding should also be used to reduce interference. Typical error curves for common mode and differential mode noise are shown in Figure 5. 70 25 TEMPERATURE ERROR (°C) TEMPERATURE ERROR (°C) 30 100 mV 20 15 60 mV 10 5 0 −5 40 mV 0 100 M 200 M 300 M 400 M 60 50 40 30 40 mV 0 0 DIFFERENTIAL MODE NOISE FREQUENCY (Hz) 100 M 200 M 300 M 400 M 500 M 600 M DIFFERENTIAL MODE NOISE FREQUENCY (Hz) Figure 5. Temperature Error due to Common Mode and Differential Mode Noise http://onsemi.com 3 60 mV 10 −10 500 M 600 M 100 mV 20 AND8494/D Errors due to capacitance across D+/D−: In order to help reduce noise interference it is common to put a capacitor across the D+ and D− lines close to the device. Care must be taken with the chosen capacitor value as the devices are sensitive to this capacitance, and large errors can be introduced if an inappropriate value is used. A typical plot of temperature error due to D+/D− capacitance is shown in Figure 6. 0 TEMPERATURE ERROR (°C) –10 –20 –30 –40 –50 –60 0 2 4 6 8 10 12 14 16 18 20 22 CAPACITANCE (nF) Figure 6. Temperature Error due to D+/D− Capacitance 3−Current Sensing Method Errors due to series resistance: Any resistance that is in series with the sensing diode will introduce an error in the temperature measurement with a 2−current device. The switched current sources will cause a voltage drop across the series resistance which will be seen as an offset. Because of this the magnitude of the temperature error will depend on both the series resistance and the values of the high and low currents being switched through the transistor. The temperature error can be calculated using: Temperature Error :+ (I1 * I2) @ R @ q k @ nf @ ln(N) The method used to eliminate the offset due to series resistance is to add a 3rd current source to the switching cycle. Figure 7 shows the internal structure of a 3−current device. By adding a 3rd current to the sequence it can be shown that, with a carefully chosen measurement sequence, the measurement is independent of resistance in the sensor path, typically up to 3 kW. As well as removing errors due to parasitic resistance it also allows relatively large value resistors to be added to D+ and D− to form a low pass filter to reduce the effects of noise. (eq. 7) Definitions: where: I1 is the high level current I2 is the low level current R is the series resistance q, K, nf and N are as previously defined Example: The ADT7481 is a 2−current device with a high level current of 233 mA and a low level current of 13 mA. For a series resistance of 4 W the expected voltage error will be (233 mA – 13 mA)*4 = 0.88 mV which will translate into a temperature error of 3.5°C. The effect of series resistance on 2−current devices prevents the use of a low pass filter on D+/D− to help with noise issues. Although internal offset registers can be used to correct small offset errors, for useful filters the resistor must be as large as possible due to the limitation on the allowable capacitor values across D+/D−, so the error due to the resistance will be large. To address this, another method of temperature sensing must be used K = Boltzmann’s Constant q = electron charge n = non−ideality factor I1 = Low level current I2 = Mid level current I3 = High Level Current N21 = Ratio of I2 to I1 N31 = Ratio of I3 to I1 Vbe1 = Vbe with Ie = I1 Vbe2 = Vbe with Ie = I2 Vbe3 = Vbe with Ie = I3 DVbe21 = Vbe2 – Vbe1 DVbe32 = Vbe3 – Vbe2 Re = Resistance in emitter path Rb = Resistance in base path http://onsemi.com 4 AND8494/D The differential base emitter voltage for low and mid currents is given by: ǒ Ǔ @ T @ Ln(N21) ) I1 @ (N21 * 1) @ Re ) Rb DVbe21(T) :+ n @ K q b)1 The differential base emitter voltage for mid and high currents is given by: ǒ ǒ Ǔ Ǔ @ T @ Ln N31 ) I1 @ (N31 * N21) @ Re ) Rb DVbe32(T) :+ n @ K q b)1 N21 Apply a gain of A to DVbe21 and B to DVbe32 then calculate the difference: ǒ ǒ Ǔ Ǔ @ T @ Ln N21 A)B ) I1 @ Re ) Rb @ [A @ (N21 * 1) * B(N31 * N21)] A @ DVbe21(T) * B @ DVbe32(T) :+ n @ K q b)1 N31 B Therefore, if the following condition is met, the above expression is independent of path resistance: A @ (N21 * 1) :+ B @ (N31 * N21) Selecting B to be 1, A is given by: A :+ N31 * N21 N21 * 1 Using this value for A, the temperature (in Celsius) of the transistor can be calculated from: T :+ (A @ DVbe21 * DVbe32) @ q ǒ A)1 n @ K @ ln N21 N31 Ǔ * 273 Figure 8 shows the typical D+ and D− waveforms for a 3−current device. Figure 9 shows the connection for a low pass filter on D+ and D−. VDD * Capacitor C1 is optional. It is only necessary in noisy environments. C1 = 1000 pF Max. I N1 x I N2 x I IBIAS VOUT+ D+ REMOTE SENSING TRANSISTOR C1* TO ADC LPF fC = 65 kHz D− VOUT− BIAS DIODE Figure 7. Internal Circuit for 3−current Device Table 1. 2−CURRENT AND 3−CURRENT TEMPERATURE SENSING DEVICES Device # Remote Channels # Currents Accuracy Supply Voltage ADM1032 1 2 ±1°C 3 − 5.5 V ADT7461 1 3 ±1°C 3 − 5.5 V ADT7461A 1 3 ±1°C 3 − 3.6 V ADT7481 2 2 ±1°C 3 − 3.6 V ADT7482 2 3 ±1°C 3 − 3.6 V ADT7483A 2 2 ±1°C 3 − 3.6 V ADT7484A 1 3 ±1°C 3 − 3.6 V ADT7485A 1 3 ±1°C 3 − 3.6 V ADT7486A 2 3 ±1°C 3 − 3.6 V ADT7488A 2 3 ±1°C 3 − 3.6 V NCT1008 1 3 ±1°C 2.8 − 3.6 V http://onsemi.com 5 AND8494/D Figure 8. Typical D+/D− Waveforms for 3−current Device In Figure 8 the yellow trace is D+, the blue trace is D− and the red trace is the differential voltage. 100 W REMOTE TEMPERATURE SENSOR D+ 1 nF 100 W D− Figure 9. Low Pass Filter Added for Noise Immunity ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative AND8494/D