AN-642 ᆌᆩԴऻ One Technology Way t P.O. Box 9106 t Norwood, MA 02062-9106, U.S.A. t Tel: 781.329.4700 t Fax: 781.461.3113 t www.analog.com ॽ้܋ڇዓᇸ᳘ࢇڼෙپTxDAC®ࢅTxDAC+® ׂ้ݴֶڦዓ܋ ፕኁǖDoug Mercer Steve Reine David Carr ० ڼෙپTxDACࢅTxDAC+ဣଚ + ದᆶᅃ߲ଳऄ้ݴֶڦ ዓăCLK+ࢅCLK–ଇֶ้߲ݴዓ܋ᅜ֑ᆩ ܠዖ้ݴֶࢅ܋ڇዓᇸઠൻۯăሞႹ܋ڇܠገֶݴᆌ ᆩዐLjՎუഗ᳘ࢇᅃዖๆݴᆶᆩݛڦ๕ăܸLjሞ గၵ൧ူLjى᳘ࢇՎუഗీժփݛՍăᅃ߲܋ڇ ้ዓ႑ࡽཚࡗܠዖݛ๕᳘ࢇ้ዓ܋ăړሞ CLK–܋แेᅃ߲ڦړୁពኵۉუ้Ljᅜൻ ۯCLK+܋LjසǍ๖ăۉፆR1ĂR2ᇑۉඹC3ᅃ ഐྺCLK–ิׂ܋ᅃ߲ڪᇀCLKVDD/2ڦୁۉೝă้ ዓᇸՂႷྺڇटႠLjӦޗথৎࡆࡆڟăኄዖದዃ࠶ ०ڇLjඐ݆༵ࠃടڦړᇸ܋থፆੇLjۉܔᇸሯำई থںሯำबࢭቲॐኮ૰ă ᆅCLK–܋ăၙ൧ူLjᆌথሞᇑ้ዓᇸ ၎ཞ(ۅࠌࠅڦ९2)ă C3 0.1 F R3 1kΩ RTERM 50Ω C3 0.1 F R2 1kΩ R4 1kΩ CLK– C2 1nF CLKCOM 2.ۉፆದথ੨ CLK+ ଇ߲1 nFڦ᳘ࢇۉඹC1ࢅC2ॽྪஏߛڦཚገችೕ୲ ยሞ5 MHzፑᆸăߵᅜူࠅ๕ฉူۙবߛཚገችೕ୲ R1 1kΩ 50 Ω SOURCE CLK+ R1 1kΩ 50 Ω SOURCE CLKVDD RSERIES CLKVDD C1 1nF f3dB = R2 1kΩ CLK– 1 2π × C × 50 where C = C1 × C2 C1 + C2 CLKCOM ټದ 1. ܋ڇথ੨ ᅃዖডࡻپ༺ڦӸ݆֑ᆩᅃዖ०ۉټڦڇፆದྪ ஏ(९2)ăසǍ๖LjۉፆR1ĂR2ࢅۉඹC3ׂิڪ ᇀCLKVDD/2ڦୁೋዃۅăۉፆR3ĂR4ྺֶݴ܋ CLK+ࢅCLK–༵ࠃୁೋዃăᅃ߲܋থۉፆRTERM (50Ω) ༵ࠃՂᄲڦᇸ܋থLjۉඹC1ĂC2ሶ༵ࠃ߰ă܋থۉ ፆፌࡻথੵথᇀᆅগCLK+ࢅCLK–Ljഄፕᆩሞ ้ዓ႑ࡽናޗডၭڦ൧ူইگୁೋዃۉუڦీփ ૧ᆖၚăሞگೕ൧ူLjኄዖਦݛӄժփLjᅺྺ ᄲ൱๑ᆩডڦٷ᳘ࢇۉඹăᇑǍዐۉୟփཞڦLj ᇸᅜມटႠǗཞ้LjᆯᇀR3ࢅR4ᇑ50Ω RTERMኮԲ ডٷLjณᅜᅞᅃۨۉڦᇸሯำࢅথںሯำăڍ᳘ ࢇۉඹC2ࠌڦఇ֑֨ᆩڦথݛ๕ܸݒీॽሯำ ሞټᆌᆩዐLjՎუഗ᳘ࢇๆݴᆶᆩăܸLjሞገ࣑ഗ ᆌᆩዐLj้ዓཚ֑ᆩڇᅃۨࠦڦೕ୲ăሞߛ้ዓೕ୲Lj ईኁᅺ้ዓᇸᇑገ࣑ഗ၎ਐডᇺܸీ่ൽୟ০߅ඡڦ ൧ူLjཚ֑ᆩټದྪஏࣷ߸ࡻăټLCದ ᅜ֑ᆩᅃዖߌۉز/ժۉඹLjईۉزඹ/ժۉ ߌઠํ၄ăܸLjᆯᇀCLK+ࢅCLK–ଇ้߲ዓڦ܋ ժႜᄲ൱֑ᆩୁ᳘ࢇݛ๕Ljᅺُۉزඹ/ժߌۉ ૌದ߸ྺࢇ(९3)ă + AD9740ACPĂAD9742ACPĂAD9744ACPĂAD9748ACPĂ AD9751ĂAD9753ĂAD9755ĂAD9772ĂAD9773ĂAD9775Ă AD9777 Rev. 0 | Page 1 of 4 AN-642 ֑ᆩኄᄣټڦཚྪஏᆶबၜᆫăᆯᇀֶݴڦ܋ ፆੇডߛबࢭྺكඹႠLjᅺُᅜํ၄ᅃۨଉ ۉڦუሺᅮăሞኻᆶگና้ޗዓ႑ࡽᆩڦ൧ူLj ኄᅜ༵ߛሯำ௨ᅧ૰ăᇮॲຕଉณǖأକׂิୁ ೋዃՂփณڦᇮॲྔLj࣏ᆶଇ߲ۉඹࢅᅃ߲ডՍᅓ ೌڦ๕ߌۉă CLKVDD C1 R1 1kΩ R3 1kΩ C3 0.1 F R2 1kΩ R4 1kΩ LMATCH 1 2π × f0 = L2 × CIN ᅜǖ L2 = 1 ( 2π × f0 )2 × C IN ැዐ႐ೕ୲ྺ100 MHzCIN = 2.5 pFLjሶL2 = 1.01 μHă ሞሡ้ࢮCINڦ൧ူLjᅜႜ၎࠲ऺ໙Ljᅜ๑50 Ωᇸ (RS)ᇑ1 kΩୁೋዃۉፆ(RIN)၎ದLjཞ้ऺ໙CMATCHࢅL1 ڦኵă CLK+ 50 Ω SOURCE ၿናೕ୲ᆯᅜူࠅ๕ۨᅭǖ CIN ැ CLK– R S × R IN = L1 CMATCH C2 ሞᅜူೕ୲ူLjॽ܋၄ۉፆǖ CLKCOM f0 = 3. LCದথ੨ ൱CMATCHLjࡕڟڥǖ ټLCದ๖૩(100MHz) ࠶ᆶႹײॲܠႾᆩઠൟऺ໙ದᇮॲኵLjڍൣ ؤକภतڦਏ༹ऺ໙ᄺๆݴᆶᆩڦă୯ڟডߛ ೕ୲ူ٪ሞڦPCӱքਆसิၳᆌLjԨ๖૩֑ᆩڦೕ୲ ኵྺ100 MHzăሞᄲ൱ডߛೕ୲ڦPCӱยऺዐLjRFքਆ ݠኈॲݥᆶᆩă ۆ႙൧ူLj้ዓႴᄲದ50 Ωăྺକ०ࣅದ ࡗײLjሡ้փऺ໙CLK+ࢅCLK–ଇ߲ڦ܋ۉ ඹCINLj݆ݛཁेᅃ߲Ⴕెժ(ߌۉL2Lj९4)Lj ॽߌۉӀႴೕ୲ᇑCINၿናăฎࢫඓۨದߌۉLMATCH ้ॽ୯(ߌۉ९3)ăኄᄣፔᅜሞ50 Ωᇸᇑ1 k Ω ୁೋዃۉፆኮक़०ۉڦڇፆۉڟፆದࡗڦײएإฉႜ ዷᄲऺ໙ă AC GROUND L1 C2 L2 RIN 1kΩ AC GROUND 4. ದ๖૩ CMATCH = 1 2π × f0 R S × R IN ැf0 = 100 MHzLjRS= 50 ΩLjRIN = 1 kΩLjሶCMATCH = 7.12 pF থူઠ൱L1Ljࡕڟڥǖ L1 = R S × R IN 2π × f0 ැf0 = 100 MHzLjRS = 50 ΩLjRIN = 1 kΩLjሶL1 = 356 nHă ᆯᇀL1ࢅL2၎ժLjᅺُጹࢇܾኁLjڥLMATCHڦፌዕ ኵǖ LMATCH = L1 × L2 L1 + L2 ැL1 = 356 nHL2 = 1.01 μHLjሶLMATCH = 263 nHă RIN 1kΩ C1 50 Ω SOURCE 1 2π L1 × CMATCH CLK+ CIN CLK– C1ࢅC2ᆶܠዖስăံLjᅜॽC2ยྺᅃ߲ٷኵLjස 1000 pFLjᅜ๑ഄ၄ྺᅃ߲RF܌ୟăࢫᆌॽC1ยྺڪ ᇀCMATCHऺ໙ኵăܾڼLjॽC1ࢅC2ݴ՚ยྺCMATCHڦ ଇԠLjᅜ๑ጺۉزඹڪᇀCMATCHăڼෙLjཚࡗ๑C1ࢅ C2ྲ٪ሞֶᅴ(नስC2ԲC1گ10%ፑᆸ)ڍ๑ഄز ኵ၎ڪLjሶ๑CLK+ࢅCLK–܋႑ࡽڦናޗ၎ڪLjܸٗ ༵ߛֶݴൻڦۯೝ࢚ႠăኻᄲC1ࢅC2ࢇڦժزኵ (न(C1×C2)/(C1+C2))ڪᇀCMATCHLjሶ֑ᆩฉຎෙዖ ၜዐڦඪᅪᅃዖă Rev. 0 | Page 2 of 4 AN-642 ሞᆶ൧ူLjCMATCH(C1, C2)ࢅLMATCHڦኵՂႷٗՔጚ ኵዐႜስăፌথৎڦՔጚኵྺC1 = 16 pFLjC2 = 15 pFLj LMATCH = 270 nH(ස1๖)ăُ้LjႴᄲҾጎฉኄၵኵ ܔᆌڦഗॲLjժ֪ଉሞೕ୲ྺ100 MHz้ڦႠీăᆯᇀ ٪ሞPCӱࢅքਆसิၳᆌLjᅜీႴᄲܔᅜฉ๖૩ ໙ڦᇮॲኵႜۙኝă IଚକǏ๖ۉࢅߌۉඹሞۨRFೕ୲ူॺڦᅱ ኵăසമຎLjܔPCӱքਆႜႪ߀ॽ๑ྪஏႠీᇑ ࡀ߭٪ሞֶᅴă ೕ୲ (MHz) LMATCH (nH) C1 (pF) C2 (pF) ଷྔLjሞ֑ᆩ܋ڇᇸൻڦۯ൧ူLjཚࡗ๑ኄၵۉඹ٪ ሞฎႹֶᅴLjᅜ๑CLK+ࢅCLK–ڦ܋ናޗ၎ڪǗन ຫLjྪஏࣩ݀ጣೝ࢚ljݥೝ࢚Վ࣑ഗڦፕᆩă5၂๖ ڦዐ႐ೕ୲ྺ100 MHz้ڦၚᆌǗ൩ጀᅪگೕူ٪ሞ ڦटߛປ३ăߛೕປ३้ዓᆅগڦۉඹዂă ഄዐLjCLK+ࢅCLK–ଇݴֶڦ܋ናޗၚᆌࢇժሞᅃഐLj ཞ้࣏ᆶ၎߲߳ڦںࠌࠅܔ܋ڇڦ܋ၚᆌă६ᇀ ದྪஏڦၿናႠዊLjCLK+ࢅCLK–ଇ߲܋٪ሞ90° ፑᆸڦ၎ᅎăኄዖ൧ස6๖ăሞۙኝገ࣑ഗຕ ยዃࢅԍ้क़้LjՂႷ୯ኄዖ၎࿋ֶă 61.44 470 24 22 65.00 470 24 18 76.80 390 18 16 78.00 390 18 15 78.64 390 16 16 92.16 330 13 12 100.00 270 16 15 122.88 220 11 10 130.00 180 12 11 153.60 150 10 9 156.00 150 10 8 157.29 120 12 12 184.32 120 8 7 245.76 82 6 5 260.00 56 9 8 307.20 47 7 6 312.00 47 6 6 314.57 47 6 6 368.64 39 5 4 491.52 22 5 4 520.00 18 6 5 614.40 15 4 4 624.00 15 4 3 629.15 15 4 3 737.28 12 2 2 15 10 DIFFERENTIAL RESPONSE VIN 5 0 MAGNITUDE (dB) –5 –10 –15 –20 CLK+ SINGLE-ENDED –25 –30 –35 CLK– SINGLE-ENDED –40 –45 –50 –55 10M 100M FREQUENCY (Hz) 1G 5. 100 MHzದྪஏڦናޗၚᆌ 175 150 125 100 DIFFERENTIAL RESPONSE CLK+ SINGLE-ENDED MAGNITUDE (dB) 75 I. ኍܔ4ዐC1ĂC2ࢅLMATCH ॺڦᅱኵ 50 25 0 –25 –50 –75 CLK– SINGLE-ENDED –100 –125 –150 –175 –200 10M 100M FREQUENCY (Hz) 6. 100 MHzದྪஏڦ၎࿋ၚᆌ 1G 1 ᆩSpiceઠܔኄዖথ੨ྪஏႜॺఇࢅݠኈLjኄԨ࿔ ๖߾ऺ໙ݛ๕ڦᆶᆩ༺پӸ݆ăኄዖఇ๕ူᅜ୯ ߸ܠसิၳᆌLjԲසԈጎࢅPCӱग၍ڪᇮॲׂิڦस ิၳᆌăᅜူଚڦኍ้ܔዓࠓڦSpiceपጱۉ ୟఇ႙ă֖ቷ7ࢅ8ዐڦᇱᅜतଚۥևLjߌۉ L1ࢅۉඹC1ĂC2ඓۨକྪஏڦዐ႐ೕ୲ăഄዐଚኵ एᇀ100 MHzڦೕ୲ăۉፆR1ྺൻۯᇸ(V3)ፆੇLjۉ ፆR2ࢅR3ሶྺୁ᳘ࢇ༵ࠃୁೋዃۉუ(ᆯۉუ ᇸV4ยۨ)ă Rev. 0 | Page 3 of 4 AN-642 C6 16P CLK_VDD CLK_P V3 0 AC 2 L1 270N R2 1K CLK_COM R3 1K XIPT CLK_N C7 5P V4 1.65 V1 3.3 V2 0 7. ྪஏڦSPICEఇ႙ CLK_VDD CLK_P L1 2.1N C1 0.75P R2 0.0517 D1 D2 D3 R1 193 CLK_COM CLK_N C2 9F C3 18F L2 2.1N R3 0.0517 C4 0.75P D4 D6 R4 193 D5 C5 9F 8. XlPTఇڦSPICEጱۉୟ ଚ1 ้ዓದྪஏఇ႙ + V1 CLK_VDD 0 3.3 V2 CLK_COM 0 0 V3 SRC_P 0 0 AC 2 V4 CML 0 1.65 R1 SRC_P CAP_P 50 R2 CLK_P CML 1K R3 CLK_N CML 1K C1 CAP_P CLK_P 16p C2 CLK_N 0 15p L1 CLK_P CLK_N 270n XXIPT CLK_P CLK_N CLK_COM CLK_VDD CLK_INPUT .SUBCKT CLK_INPUT CLK_P CLK_N CLK_COM CLK_VDD C1 CLK_VDD C1_B 0.75p C2 CLK_VDD C2_B 9f C3 C2_B C3_B 18f C4 CLK_VDD C4_B 0.75p C5 CLK_VDD C3_B 9f D1 C1_B CLK_VDD DP1 1 D2 CLK_COM C1_B DN2 1 D3 C2_B CLK_VDD DP3 1 D4 CLK_COM C4_B DN2 1 D5 C3_B CLK_VDD DP3 1 D6 C4_B CLK_VDD DP1 1 L1 L1_A CLK_P 2.1n L2 L2_A CLK_N 2.1n R1 C2_B C1_B 193 R2 C1_B L1_A 0.0517 R3 C4_B L2_A 0.0517 R4 C3_B C4_B 193 .ENDS CLK_INPUT E03631–0–4/03(0) R1 50 .model DP1 D (bv=5.5 cjo=1.17088p eg=1.106 fc=500m ibv=608.2p is=1.299342f m=632.669m) .model DP3 D (bv=5.5 cjo=325.2446f eg=1.106 fc=500m ibv=608.2p is=3.609284e-16 m=632.669m) .model DN2 D (bv=8.0 ibv=1.54587E-06 cjo=1.411p m=0.3675268 is=1.759f eg=1.140) .AC DEC 400 10E6 1E9 .PROBE .OP .END 2 ࠲ᇀೌ๕ڦߌۉࢅߌۉSpiceఇ႙ၠሰฆൽă9 ᆩᇀڦߌۉཚᆩఇ႙Ǘ10ྺఇ႙ۉඹዐ๑ᆩڦཚᆩጱ ۉୟă C R1 L R2 RVAR 9. ኄၵఇ႙ڦኵٗሰฆྪበ(සwww.coilcraft.com)इ ൽă9ዐڦRVARᅺೕ୲ܸۨLjᇑणޒၳᆌतഄߌۉ ࡼ၎࠲ă RP RS LS C . 10. © 2003 Analog Devices, Inc. All rights reserved.Trademarks and registered trademarks are the property of their respective companies. Rev. 0 | Page 4 of 4