4-Line Transient Voltage Suppressor Array

NUP4060AXV6
4−Line Transient Voltage
Suppressor Array
This 4−line voltage transient suppressor array is designed for
application requiring transient voltage protection capability. It is
intended for use in over−transient voltage and ESD sensitive
equipment such as cell phones, portables, computers, printers and
other applications. This device features a common cathode design
which protects four independent lines in a single SOT−563 package.
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SOT−563 4−LINE TRANSIENT
VOLTAGE SUPPRESSOR
Features
• Protects up to 4 Lines in a Single SOT−563 Package
• ESD Rating: IEC61000−4−2: Level 4
•
•
•
PIN ASSIGNMENT
Contact (8 kV), Air (15 kV)
VCC Pin = 16 V Protection
D1, D2, and D3 Pins = 6.8 V Protection
Low Capacitance (< 7 pF @ 3 V) for D1, D2, and D3
This is a Pb−Free Device
D1
1
6
GND
D2
2
5
D3
3
4
GND
VCC
Applications
•
•
•
•
MARKING
DIAGRAM
Hand Held Portable Applications
USB Interface
Notebooks, Desktops, Servers
SIM Card Protection
SOT−563
CASE 463A
STYLE 6
6
1
MAXIMUM RATINGS (TJ = 25°C, unless otherwise specified)
Symbol
PPK 1
Rating
Value
Unit
Peak Power Dissipation
VCC Diode
8x20 msec double exponential waveform,
(Note 1)
D1, D2, and D3
200
W
20
W
1
MT MG
G
MT = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
TJ
Operating Junction Temperature Range
−40 to 125
°C
TSTG
Storage Temperature Range
−55 to 150
°C
TL
Lead Solder Temperature – Maximum
(10 seconds)
260
°C
NUP4060AXV6T1G SOT−563 4000/Tape & Reel
(Pb−Free)
ESD
IEC 61000−4−2 Air
IEC 61000−4−2 Contact
15000
8000
V
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Nonrepetitive current pulse per Figure 1.
© Semiconductor Components Industries, LLC, 2007
January, 2007 − Rev. 1
1
Device
Package
Shipping†
Publication Order Number:
NUP4060/D
NUP4060AXV6
ELECTRICAL CHARACTERISTICS (TJ = 25°C, unless otherwise specified)
Parameter
Conditions
Symbol
Min
Typ
Max
Unit
VRWM
−
−
5.0
V
IT = 1 mA, (Note 3)
VBR
6.2
6.8
7.2
V
Breakdown Voltage (VCC)
IT = 5 mA, (Note 3)
VBR2
15.3
16
17.1
V
Reverse Leakage Current (D1, D2, and D3)
VRWM = 3 V
IR
−
0.01
0.5
mA
Reverse Leakage Current (VCC)
VBR = 11 V
IR
−
−
0.05
mA
Capacitance (D1, D2, and D3)
VR = 3 V, f = 1 MHz (Line to GND)
CJ
−
7
10
pF
Reverse Working Voltage (D1, D2, and D3)
(Note 2)
Breakdown Voltage (D1, D2, and D3)
2. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC
or continuous peak operating voltage level.
3. VBR is measured at pulse test current IT.
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2
NUP4060AXV6
TYPICAL ELECTRICAL CHARACTERISTICS
(Diode D1, D2, and D3 only)
110
100
% OF RATED POWER OR IPP
Ppk, PEAK SURGE POWER (W)
100
10
10
100
80
70
60
50
40
30
20
10
0
1
1
90
1000
50
75
100
Figure 2. Power Derating Curve
150
14
0.14
0.12
0.10
0.08
0.06
0.04
0.02
12
TA = 25°C
10
8
6
4
2
0
0
−60 −40
0
20
40
60
80
100
0
3
4
Figure 3. Reverse Leakage versus
Temperature
Figure 4. Capacitance
70
60
HALF VALUE IRSM/2 @ 20 ms
50
5
6
1
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
40
tP
20
2
BIAS VOLTAGE (V)
80
30
1
T, TEMPERATURE (°C)
PEAK VALUE IRSM @ 8 ms
tr
90
−20
IF, FORWARD CURRENT (A)
100
0.1
0.01
10
0
125
Figure 1. Pulse Width
TYPICAL CAPACITANCE (pF)
1 MHz FREQUENCY
IR, REVERSE LEAKAGE (mA)
25
TA, AMBIENT TEMPERATURE (°C)
0.16
% OF PEAK PULSE CURRENT
0
t, TIME (ms)
TA = 25°C
0.001
0
20
40
60
0.6
80
0.8
1.0
1.2
1.4
t, TIME (ms)
VF, FORWARD VOLTAGE (V)
Figure 5. 8 × 20 ms Pulse Waveform
Figure 6. Forward Voltage
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3
1.6
1.8
NUP4060AXV6
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A−01
ISSUE F
D
−X−
6
5
1
2
A
L
4
E
−Y−
3
b
e
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
DIM
A
b
C
D
E
e
L
HE
HE
C
5 PL
6
0.08 (0.003)
M
X Y
MILLIMETERS
MIN
NOM MAX
0.50
0.55
0.60
0.17
0.22
0.27
0.08
0.12
0.18
1.50
1.60
1.70
1.10
1.20
1.30
0.5 BSC
0.10
0.20
0.30
1.50
1.60
1.70
INCHES
NOM MAX
0.021 0.023
0.009 0.011
0.005 0.007
0.062 0.066
0.047 0.051
0.02 BSC
0.004 0.008 0.012
0.059 0.062 0.066
MIN
0.020
0.007
0.003
0.059
0.043
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.35
0.0531
1.0
0.0394
0.5
0.5
0.0197 0.0197
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
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NUP4060/D
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