6-PIN, Bi-Directional, Quad TVS Array

NUP4102XV6
6−Pin Bi−Directional Quad
TVS Array
This 6−Pin bi−directional transient suppressor array is designed for
applications requiring transient overvoltage protection capability. It is
intended for use in transient voltage and ESD sensitive equipment
such as computers, printers, cell phones, medical equipment, and other
applications. Its integrated design provides bi−directional protection
for four separate lines using a single SOT−563 package. This device is
ideal for situations where board space is a premium.
Features
•
6
4
• Bi−directional Protection for Four Lines in a
•
•
•
•
http://onsemi.com
2, 5
Single SOT−563 Package
Peak Power Dissipation − 75 W (8x20 msec Waveform)
Low Leakage Current (100 nA @ 12 V)
Low Capacitance (< 15 pF)
Provides ESD Protection for JEDEC Standards JESD22
− Machine Model = Class C
− Human Body Model = Class 3B
Provides ESD Protection for IEC 61000−4−2, 15 kV (Air),
8 kV (Contact)
3
1
SOT−563
CASE 463A
PLASTIC
Mechanical Characteristics
•
•
•
•
Void Free, Transfer−Molded, Thermosetting Plastic Case
Corrosion Resistant Finish, Easily Solderable
Package Designed for Optimal Automated Board Assembly
Small Package Size for High Density Applications
MARKING DIAGRAM
6 5 4
RP MG
G
Applications
• GSM Handsets and Accessories
• Other Telephone Sets
• Computers / Printers / Set−Top Boxes
1 2 3
MAXIMUM RATINGS (TJ=25°C, unless otherwise specified)
Rating
Peak Power Dissipation
8x20 msec Double Exponential Waveform,
(Note 1)
Operating Junction Temperature Range
Storage Temperature Range
Lead Solder Temperature – Maximum (10 sec)
Human Body Model ( HBM)
Machine Model (MM)
IEC 61000−4−2 Air (ESD)
IEC 61000−4−2 Contact (ESD)
Symbol
Value
Unit
PPK
75
W
TJ
−40 to
125
°C
TSTG
−55 to
150
TL
ESD
RP = Device Marking
M = One Digit Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping †
°C
NUP4102XV6T1G
SOT−563
(Pb−Free)
4000/Tape & Reel
260
°C
16
0.4
30
30
kV
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Non−repetitive current pulse per Figure 3.
© Semiconductor Components Industries, LLC, 2006
January, 2006 − Rev. 1
1
Publication Order Number:
NUP4102XV6/D
NUP4102XV6
ELECTRICAL CHARACTERISTICS (TJ=25°C, unless otherwise specified)
Parameter
Conditions
Symbol
(Note 2)
VRWM
Max
Unit
12
V
IT = 1 mA, (Note 3)
VBR
17.8
V
VRWM = 12 V
IR
100
nA
Clamping Voltage
IPP = 3 A, (8x20 msec
Waveform)
VC
25
V
Maximum Peak Pulse Current
8x20 msec waveform
IPP
3.0
A
VR = 0 V, f=1 MHz
(Line to GND)
Cj
15
pF
Reverse Working Voltage
Breakdown Voltage
Reverse Leakage Current
Capacitance
Min
Typ
13.6
10
13
2. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC
or continuous peak operating voltage level.
3. VBR is measured at pulse test current IT; Pulse Width 1 ms.
TYPICAL PERFORMANCE CURVES
(TJ = 25°C unless otherwise specified)
110
110
WAVEFORM
PARAMETERS
tr = 8 ms
td = 20 ms
PERCENT OF IPP
90
80
70
100
% OF RATED POWER OR IPP
100
c−t
60
td = IPP/2
50
40
30
20
10
0
0
5
10
15
20
25
30
70
60
50
40
30
20
0
25
50
75
100
125
t, TIME (ms)
TA, AMBIENT TEMPERATURE (°C)
Figure 1. Pulse Waveform
Figure 2. Power Derating Curve
150
14
tP = 10 msec
TA = 25°C
22
JUNCTION CAPACITANCE (pF)
VCLAMP, CLAMPING VOLTAGE (V)
80
10
0
24
20
18
16
14
12
90
12
10
8
6
4
2
0
0.1
1
0
10
IPP, SURGE CURRENT (A)
1
2
3
4
5
6
7
8
9
10 11 12 13 14
VBR, REVERSE VOLTAGE (V)
Figure 3. Clamping Voltage vs. Peak Pulse
Current (10 msec Square Wave Pulse)
Figure 4. Junction Capacitance vs. Reverse
Voltage
http://onsemi.com
2
NUP4102XV6
PACKAGE DIMENSIONS
SOT−563, 6−LEAD
CASE 463A−01
ISSUE O
A
−X−
6
5
1
G
2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
C
K
4
3
B
−Y−
D 65 PL
0.08 (0.003)
DIM
A
B
C
D
G
J
K
S
S
J
M
X Y
MILLIMETERS
MIN
MAX
1.50
1.70
1.10
1.30
0.50
0.60
0.17
0.27
0.50 BSC
0.08
0.18
0.10
0.30
1.50
1.70
INCHES
MIN
MAX
0.059
0.067
0.043
0.051
0.020
0.024
0.007
0.011
0.020 BSC
0.003
0.007
0.004
0.012
0.059
0.067
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
Literature Distribution Center for ON Semiconductor
USA/Canada
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Phone: 81−3−5773−3850
Email: [email protected]
http://onsemi.com
3
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
NUP4102XV6/D