150 mA LDO Linear Voltage Regulator with Reset, Delay and Early Warning

NCV8769
Ultra Low Iq 150 mA LDO
Regulator with Reset and
Early Warning
The NCV8769 is 150 mA LDO regulator with integrated reset and
early warning functions dedicated for microprocessor applications. Its
robustness allows NCV8769 to be used in severe automotive
environments. Ultra low quiescent current as low as 25 mA typical for
NCV8769 makes it suitable for applications permanently connected to
battery requiring ultra low quiescent current with or without load. The
NCV8769 contains protection functions as current limit, thermal
shutdown and reverse output current protection.
Features
•
•
•
•
•
•
•
•
•
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MARKING
DIAGRAMS
14
14
1
Output Voltage Options: 5 V
Output Voltage Accuracy: $2%
Output Current up to 150 mA
Ultra Low Quiescent Current:
− typ 25 mA for Adjustable Early Warning Threshold Option
Very Low Dropout Voltage
Microprocessor Compatible Control Functions:
− Reset with Adjustable Power−on Delay
− Early Warning
Wide Input Voltage Operation Range: up to 40 V
Protection Features:
− Current Limitation
− Thermal Shutdown
These are Pb−Free Devices
Y
Z
XX
A
WL
Y
WW
G
SO−14
D SUFFIX
CASE 751A
V8769YZXXG
AWLYWWG
1
= Timing and Reset Threshold Option*
= Early Warning Option*
= Voltage Option
5.0 V (XX = 50)
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*See Application Information Section.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
Typical Applications
•
•
•
•
Body Control Module
Instruments and Clusters
Occupant Protection and Comfort
Powertrain
VBAT
Cin
0.1 mF
RSI2
RSI1
Vout
Vin
SI
NCV8769y0
VDD
Cout
1 mF
Microprocessor
DT
GND
SO
I/O
RO
RESET
Figure 1. Application Circuit
© Semiconductor Components Industries, LLC, 2011
June, 2011 − Rev. 1
1
Publication Order Number:
NCV8769/D
NCV8769
Vin
Vout
**
**
Driver with
Current
Limit
RO
Thermal
Shutdown
Vref
TIMING
CIRCUIT
and
RESET
OUTPUT
DRIVER
and
SENSE
OUTPUT
DRIVER
SO
SI
DT
V ref
*
GND
*Pull−down Resistor (~150 kW) active only in Reset State.
** 5 V option only.
Figure 2. Simplified Block Diagram
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2
NCV8769
NC
1
14
SI
Vin
DT
GND
GND
GND
GND
GND
GND
GND
Vout
SO
RO
SO−14
Figure 3. Pin Connections
(Top View)
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
1
NC
Not connected
Description
2
DT
Reset Delay Time Select. Short to GND or connect to Vout to select time.
3, 4, 5, 6,
10, 11, 12
GND
7
RO
Reset Output. 30 kW internal Pull−Up resistor connected to Vout. RO goes Low when Vout drops by more
than 7% (typ.) from its nominal value.
8
SO
Early Warning Output. 30 kW internal Pull−Up resistor connected to Vout. It can be used to provide early
warning of an impending reset condition. Leave open if not used.
9
Vout
Regulated Output Voltage. Connect 1 mF capacitor with ESR < 100 W to ground.
13
Vin
Positive Power Supply Input. Connect 0.1 mF capacitor to ground.
14
SI
Sense Input; If not used, connect to Vout. See Electrical Characteristics Table and Application Information
sections for more information.
Power Supply Ground.
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NCV8769
ABSOLUTE MAXIMUM RATINGS
Symbol
Min
Max
Unit
Input Voltage DC (Note 1)
Rating
Vin
−0.3
40
V
Input Voltage Transient (Note 1)
Vin
−
45
V
Input Current
Iin
−5
−
mA
Output Voltage (Note 2)
Vout
−0.3
5.5
V
Output Current
Iout
−3
Current
Limited
mA
DT (Reset Delay Time Select) Voltage
VDT
−0.3
5.5
V
DT (Reset Delay Time Select) Current
IDT
−1
1
mA
Reset Output Voltage
VRO
−0.3
5.5
V
Reset Output Current
IRO
−3
3
mA
Sense Input Voltage DC
VSI
−0.3
40
V
Sense Input Voltage Transient
VSI
−
45
V
Sense Input Current
ISI
−1
1
mA
Sense Output Voltage
VSO
−0.3
5.5
V
Sense Output Current
ISO
−3
3
mA
TJ(max)
−40
150
°C
TSTG
−55
150
°C
ESD Capability, Human Body Model (Note 3)
ESDHBM
−2
2
kV
ESD Capability, Machine Model (Note 3)
ESDMM
−200
200
V
TSLD
−
265 peak
°C
Maximum Junction Temperature
Storage Temperature
Lead Temperature Soldering
Reflow (SMD Styles Only) (Note 4)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. 5.5 or (Vin + 0.3 V), whichever is lower
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
4. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
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NCV8769
THERMAL CHARACTERISTICS
Rating
Symbol
Thermal Characteristics, SO−14 (Note 5)
Thermal Resistance, Junction−to−Air (Note 6)
Thermal Reference, Junction−to−Pin4 (Note 6)
Value
Unit
°C/W
94
18
RθJA
YψJP4
5. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
6. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate.
OPERATING RANGES (Note 7)
Rating
Symbol
Min
Max
Unit
Input Voltage (Note 8)
Vin
5.5
40
V
Junction Temperature
TJ
−40
150
°C
7. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
8. Minimum Vin = 5.5 V or (Vout + VDO), whichever is higher.
ELECTRICAL CHARACTERISTICS Vin = 13.2 V, VDT = GND, VSI = Vout, RSI1 & RSI2 not used, Cin = 0.1 mF, Cout = 1 mF, for typical
values TJ = 25°C, for min/max values TJ = −40 °C to 150°C; unless otherwise noted. (Notes 9 and 10)
Test Conditions
Parameter
Symbol
Min
Typ
Max
Unit
4.9
4.9
(−2 %)
5.0
5.0
5.1
5.1
(+2%)
V
4.9
(−2 %)
5.0
5.1
(+2%)
REGULATOR OUTPUT
Output Voltage (Accuracy %)
Vin = 5.6 V to 40 V, Iout = 0.1 mA to 100 mA
Vin = 5.8 V to 16 V, Iout = 0.1 mA to 150 mA
Vout
Output Voltage (Accuracy %)
TJ = −40°C to 125°C
Vin = 5.8 V to 28 V, Iout = 0 mA to 150 mA
Vout
Line Regulation
Vin = 6 V to 28 V, Iout = 5 mA
Regline
−20
0
20
mV
Load Regulation
Iout = 0.1 mA to 150 mA
Regload
−40
10
40
mV
Dropout Voltage (Note 11)
Iout = 100 mA
Iout = 150 mA
VDO
−
−
225
300
450
600
mV
Output Capacitor for Stability
(Note 12)
Iout = 0 mA to 150 mA
Cout
ESR
1.0
0.01
−
−
100
100
mF
W
Iq
−
−
25
−
31
33
mA
V
QUIESCENT CURRENTS
Quiescent Current, Iq = Iin − Iout
Iout = 0.1 mA, TJ = 25°C
Iout = 0.1 mA to 150 mA, TJ ≤ 125°C
CURRENT LIMIT PROTECTION
Current Limit
Vout = 0.96 x Vout_nom
ILIM
205
−
525
mA
Short Circuit Current Limit
Vout = 0 V
ISC
205
−
525
mA
PSRR
−
60
−
dB
−
2
−
−
0.8
−
−
−
1
PSRR
Power Supply Ripple Rejection
(Note 12)
f = 100 Hz, 0.5 Vpp
DT (Reset Delay Time Select)
DT Threshold Voltage
DT Input Current
Vth(DT)
Logic Low
Logic High
VDT = 5 V
IDT
V
μA
9. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
10. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [TJ. Low duty
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
11. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V.
12. Values based on design and/or characterization.
13. See APPLICATION INFORMATION section for Reset Thresholds and Reset Delay Time Options.
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NCV8769
ELECTRICAL CHARACTERISTICS Vin = 13.2 V, VDT = GND, VSI = Vout, RSI1 & RSI2 not used, Cin = 0.1 mF, Cout = 1 mF, for typical
values TJ = 25°C, for min/max values TJ = −40 °C to 150°C; unless otherwise noted. (Notes 9 and 10)
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
90
93
96
VRH
−
2.0
−
%Vout
IROmax
1.75
−
−
mA
VROL
−
0.15
0.25
V
Reset Output High Voltage
VROH
4.5
−
−
V
Integrated Reset Pull Up Resistor
RRO
15
30
50
kW
tRD
12.8
25.6
16
32
19.2
38.4
ms
tRR
16
25
38
μs
1.25
1.20
1.33
1.25
1.40
1.33
ISI
−1
0.1
1
μA
RSO
15
30
50
kW
VSOL
−
0.15
0.25
V
VSOH
4.5
−
−
V
1.75
−
−
RESET OUTPUT RO
Output Voltage Reset Threshold
(Note 13)
Vout decreasing
Vin > 5.5 V
VRT
Reset Hysteresis
Maximum Reset Sink Current
Vout = 4.5 V, VRO = 0.25 V
Reset Output Low Voltage
Vout > 1 V, IRO < 200 mA
Reset Delay Time (Note 13)
DT connected to GND
DT connected to Vout
Reset Reaction Time (see Figure
29)
%Vout
EARLY WARNING (SI and SO)
Sense Input Threshold
(NCV8769y0)
VSI(th)
High
Low
Sense Input Current (NCV8769y0)
VSI = 5 V
Integrated Sense Output Pull Up
Resistor
Sense Output Low Voltage
VSI < 1.2 V, ISO < 200 mA, Vout > 1 V
Sense Output High Voltage
ISOmax
V
Maximum Sense Output Sink
Current
Vout = 4.5 V, VSI < 1.2 V, VSO = 0.25 V
mA
SI High to SO High Reaction Time
VSI increasing
tPSOLH
−
7
12
μs
SI Low to SO Low Reaction Time
VSI decreasing
tPSOHL
−
3.8
5.0
μs
Thermal Shutdown Temperature
(Note 12)
TSD
150
175
195
°C
Thermal Shutdown Hysteresis
(Note 12)
TSH
−
25
−
°C
THERMAL SHUTDOWN
9. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
10. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [TJ. Low duty
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
11. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V.
12. Values based on design and/or characterization.
13. See APPLICATION INFORMATION section for Reset Thresholds and Reset Delay Time Options.
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NCV8769
TYPICAL CHARACTERISTICS
300
Vin = 13.2 V
Iout = 100 mA
29
28
Iq, QUIESCENT CURRENT (mA)
Iq, QUIESCENT CURRENT (mA)
30
27
26
25
24
23
22
21
20
−40 −20
0
20
40
60
80
150
100
50
5
10
15
20
25
35
Figure 4. Quiescent Current vs. Temperature
Figure 5. Quiescent Current vs. Input Voltage
5.10
Vout, OUTPUT VOLTAGE (V)
28
TJ = 150°C
27
26
TJ = −40°C
25
TJ = 25°C
24
23
22
21
Vin = 13.2 V
20
0
25
50
75
100
125
5.05
5.00
4.95
4.90
−40 −20
150
0
20
40
60
80
100 120 140 160
Iout, OUTPUT CURRENT (mA)
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Quiescent Current vs. Output Current
Figure 7. Output Voltage vs. Temperature
6
500
Iout = 1.0 mA
5
4
3
TJ = 25°C
2
1
TJ = −40°C
TJ = 150°C
0
1
2
3
4
5
6
7
40
Vin = 13.2 V
Iout = 100 mA
29
0
30
Vin, INPUT VOLTAGE (V)
VDO, DROPOUT VOLTAGE (mV)
Iq, QUIESCENT CURRENT (mA)
200
TJ, JUNCTION TEMPERATURE (°C)
30
Vout, OUTPUT VOLTAGE (V)
250
0
0
100 120 140 160
Iout = 0 mA
TJ = 25°C
400
TJ = 25°C
200
100
0
0
8
TJ = 150°C
300
TJ = −40°C
25
50
75
100
125
Vin, INPUT VOLTAGE (V)
Iout, OUTPUT CURRENT (mA)
Figure 8. Output Voltage vs. Input Voltage
Figure 9. Dropout vs. Output Current
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150
NCV8769
TYPICAL CHARACTERISTICS
400
400
ILIM, ISC, CURRENT LIMIT (mA)
VDO, DROPOUT VOLTAGE (mV)
500
Iout = 150 mA
300
Iout = 100 mA
200
100
0
−40 −20
0
20
40
60
80
ILIM @ Vout = 4.8 V
200
100
0
5
10
15
20
25
30
35
TJ, JUNCTION TEMPERATURE (°C)
Vin, INPUT VOLTAGE (V)
Figure 10. Dropout vs. Temperature
Figure 11. Output Current Limit vs. Input
Voltage
400
100
Vin = 13.2 V
ESR, STABILITY REGION (W)
ILIM, ISC, CURRENT LIMIT (mA)
300
0
100 120 140 160
TJ = 25°C
ISC @ Vout = 0 V
350
ISC @ Vout = 0 V
300
ILIM @ Vout = 4.8 V
250
200
−40 −20
0
20
40
60
80
Vin = 13.2 V
TJ = −40°C to 150°C
Cout = 1 mF − 100 mF
10
STABLE REGION
1
0.1
0.01
100 120 140 160
40
0
50
100
150
200
250
300
350
TJ, JUNCTION TEMPERATURE (°C)
Iout, OUTPUT CURRENT (mA)
Figure 12. Output Current Limit vs. Temperature
Figure 13. Cout ESR Stability vs. Output Current
TJ = 25°C
Iout = 1 mA
Cout = 10 mF
trise/fall = 1 ms (Vin)
14.2 V
Vin
(1 V/div)
13 V
TJ = 25°C
Vin = 13.2 V
Cout = 10 mF
trise/fall = 1 ms (Iout)
150 mA
Iout
(100 mA/div)
12.2 V
0.1 mA
5.08 V
5.15 V
Vout
(50 mV/div)
Vout
(200 mV/div)
5V
5V
4.97 V
4.79 V
TIME (20 ms/div)
TIME (500 ms/div)
Figure 15. Load Transients
Figure 14. Line Transients
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NCV8769
TYPICAL CHARACTERISTICS
100
TJ = 25°C
Rout = 5 kW
TJ = 25°C
Vin = 13.2 V ±0.5 VPP
Cout = 1 mF
Iout = 1 mA
90
Vin
(5 V/div)
80
PSRR (dB)
70
Vout
(5 V/div)
60
50
40
VRO
(5 V/div)
30
VSO
(5 V/div)
10
20
0
TIME (100 ms/div)
10
100
10000
100000
f, FREQUENCY (Hz)
Figure 16. Power Up and Down Transient
Figure 17. PSRR vs. Frequency
40
4.80
Vin = 13.2 V
tRD, RESET DELAY TIME (ms)
Vin = 13.2 V
4.75
4.70
4.65
4.60
−40 −20
35
VDT = Vout
30
25
20
VDT = GND
15
10
−40 −20
0
20 40 60 80 100 120 140 160
TJ, JUNCTION TEMPERATURE (°C)
0
20
40
VSI_(th),H (VSI Increasing)
1.32
1.3
1.28
1.26
VSI_(th),L (VSI Decreasing)
1.24
1.22
−40 −20
0
20
80
100 120 140 160
Figure 19. Reset Time vs. Temperature
1.36
1.34
60
TJ, JUNCTION TEMPERATURE (°C)
Figure 18. Reset Threshold vs. Temperature
SENSE INPUT VOLTAGE (V)
VRT, RESET THRESHOLD (V)
1000
40
60
80
100 120 140 160
TJ, JUNCTION TEMPERATURE (°C)
Figure 20. SI Threshold vs. Temperature
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NCV8769
Vin
t
Vout
<tRR
VRT+VRH
VRT
VRO
t
tRR
tRD
VROH
VROL
t
Figure 21. Reset Function and Timing Diagram
Vin
Vin_EW(th)_L
t
V out
V RT
t
V RO
t
VSO
tWarning
Figure 22. Input Voltage Early Warning Function Diagram
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t
NCV8769
DEFINITIONS
General
All measurements are performed using short pulse low
duty cycle techniques to maintain junction temperature as
close as possible to ambient temperature.
the device is capable to supply minimum 200 mA without
sending Reset signal to microprocessor.
Short Circuit Current Limit is output current value
measured with output of the regulator shorted to ground.
Output Voltage
PSRR
The output voltage parameter is defined for specific
temperature, input voltage and output current values or
specified over Line, Load and Temperature ranges.
Power Supply Rejection Ratio is defined as ratio of output
voltage and input voltage ripple. It is measured in decibels
(dB).
Line Regulation
Line Transient Response
The change in output voltage for a change in input voltage
measured for specific output current over operating ambient
temperature range.
Typical output voltage overshoot and undershoot
response when the input voltage is excited with a given
slope.
Load Regulation
Load Transient Response
The change in output voltage for a change in output
current measured for specific input voltage over operating
ambient temperature range.
Typical output voltage overshoot and undershoot
response when the output current is excited with a given
slope between low−load and high−load conditions.
Dropout Voltage
Thermal Protection
The input to output differential at which the regulator
output no longer maintains regulation against further
reductions in input voltage. It is measured when the output
drops 100 mV below its nominal value. The junction
temperature, load current, and minimum input supply
requirements affect the dropout level.
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 175°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Quiescent Current
The power dissipation level is maximum allowed power
dissipation for particular package or power dissipation at
which the junction temperature reaches its maximum
operating value, whichever is lower.
Maximum Package Power Dissipation
Quiescent Current (Iq) is the difference between the input
current (measured through the LDO input pin) and the
output load current.
Current Limit and Short Circuit Current Limit
Current Limit is value of output current by which output
voltage drops below 96% of its nominal value. It means that
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NCV8769
APPLICATIONS INFORMATION
The NCV8769 regulator is self−protected with internal
thermal shutdown and internal current limit. Typical
characteristics are shown in Figures 4 to 22.
RESET DELAY AND RESET THRESHOLD OPTIONS
Input Decoupling (Cin)
A ceramic or tantalum 0.1 mF capacitor is recommended
and should be connected close to the NCV8769 package.
Higher capacitance and lower ESR will improve the overall
line and load transient response.
If extremely fast input voltage transients are expected then
appropriate input filter must be used in order to decrease
rising and/or falling edges below 50 V/ms for proper
operation. The filter can be composed of several capacitors
in parallel.
Part Number
DT = GND
Reset Time
DT = Vout
Reset Time
Reset
Threshold
NCV87695z
16 ms
32 ms
93%
NOTE:
The timing values can be selected from following list: 8, 16,
32, 64, 128 ms. The reset threshold values can be selected
from the following list: 90% and 93%. Contact factory for
other timing combinations not included in the table.
Sense Input (SI)/Sense Output (SO) Voltage Monitor
An on-chip comparator is available to provide early
warning to the microprocessor of a possible reset signal. The
reset signal typically turns the microprocessor off
instantaneously. This can cause unpredictable results with
the microprocessor. The signal received from the SO pin will
allow the microprocessor time (TWARNING) to complete its
present task before shutting down. This function is
performed by a comparator referenced to the band gap
voltage. The actual trip point can be programmed externally
using a resistor divider to the input monitor (SI). (See
Figure 1) The values for RSI1 and RSI2 are selected for a
typical threshold of 1.2 V on the SI pin according to
Equations 1 and 2, where Vin_EW(th) is demanded value of
input voltage at which Early Warning signal has to be
generated. RSI2 is recommended to be selected in range of
100 kW to 1 MW. The higher are values of resistors RSI1 and
RSI2 the lower is current flowing through the resistor
divider, however this also increases a delay between Input
voltage and SI input voltage caused by charging SI input
capacitance with higher RC constant. The delay can be
lowered by decreasing the resistors values with consequence
of resistor divider current is increased.
Output Decoupling (Cout)
The NCV8769 is a stable component and does not require
a minimum Equivalent Series Resistance (ESR) for the
output capacitor. Stability region of ESR vs. Output Current
is shown in Figure 13. The minimum output decoupling
value is 1 mF and can be augmented to fulfill stringent load
transient requirements. The regulator works with ceramic
chip capacitors as well as tantalum devices. Larger values
improve noise rejection and load transient response.
Reset Delay Time Select
Selection of the NCV8769yz devices and the state of the
DT pin determines the available Reset Delay times. The part
is designed for use with DT tied to ground or OUT, but may
be controlled by any logic signal which provides a threshold
between 0.8 V and 2 V. The default condition for an open DT
pin is the slower Reset time (DT = GND condition). Times
are in pairs and are highlighted in the chart below. Consult
factory for availability. The Delay Time select (DT) pin is
logic level controlled and provides Reset Delay time per the
chart. Note the DT pin is sampled only when RO is low, and
changes to the DT pin when RO is high will not effect the
reset delay time.
ǒ
V in_EW(th) + 1.25 1 )
ǒ
R SI1 + R SI2
Reset Operation
(eq. 1)
Ǔ
(eq. 2)
R SI2
V in_EW(th)
1.2
Ǔ
R SI1
*1
Sense Output
A reset signal is provided on the Reset Output (RO) pin to
provide feedback to the microprocessor of an out of
regulation condition. The timing diagram of reset function
is shown in Figure 21. This is in the form of a logic signal on
RO. Output voltage conditions below the RESET threshold
cause RO to go low. The RO integrity is maintained down
to Vout = 1.0 V. The Reset Output (RO) circuitry includes
internal pull−up connected to the output (Vout) No external
pull−up is necessary.
Reset signal is also generated in case when input voltage
decreases below its minimum operating limit.
The Sense Output is from an open drain driver with an
internal 30 kW pull up resistor to Vout. Figure 23 shows the
SO Monitor timing waveforms as a result of the circuit
depicted in Figure 1. If the input voltage decreases the
output voltage decreases as well. If the SI input low
threshold voltage is crossed it causes the voltage on the SO
output goes low sending a warning signal to the
microprocessor that a reset signal may occur in a short
period of time. TWARNING is the time the microprocessor has
to complete the function it is currently working on and get
ready for the reset shutdown signal.
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NCV8769
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the NCV8769 has good thermal conductivity through the
PCB, the junction temperature will be relatively low with
high power applications. The maximum dissipation the
NCV8769 can handle is given by:
V out
VSI
V SI,Low
V RO
P D(MAX) +
ƪTJ(MAX) * TAƫ
(eq. 3)
R qJA
Since TJ is not recommended to exceed 150°C, then the
NCV8769 soldered on 645 mm2, 1 oz copper area, FR4 can
dissipate up to 1.33 W when the ambient temperature (TA)
is 25°C. See Figure 25 for RthJA versus PCB area. The power
dissipated by the NCV8769 can be calculated from the
following equations:
V SO
T WARNING
Figure 23. SO Warning Timing Diagram
P D [ V inǒI q@I outǓ ) I outǒV in * V outǓ
(eq. 4)
or
Sense
Input
V in(MAX) [
P D(MAX) ) ǒV out
I outǓ
I out ) I q
(eq. 5)
VSI,High
RqJA, THERMAL RESISTANCE (°C/W)
120
VSI,Low
PCB 1 oz Cu
110
100
t
Sense
Output
t PSOLH
t PSOHL
High
Low
t
90
PCB 2 oz Cu
80
70
60
0
100
200
300
400
500
600
COPPER HEAT SPREADER AREA (mm2)
700
Figure 25. Thermal Resistance vs. PCB Copper Area
Figure 24. Sense Input to Sense Output Timing
Diagram
Hints
Vin and GND printed circuit board traces should be as
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the NCV8769 and
make traces as short as possible.
Thermal Considerations
As power in the NCV8769 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
ORDERING INFORMATION
Device
NCV876950D250R2G
Output
Voltage
Reset Delay Time
DT = GND/Vout
Reset
Threshold
(Typ)
Marking
Package
Shipping†
5.0 V
16/32 ms
93 %
V87695050G
SO−14
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
http://onsemi.com
13
NCV8769
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE J
−A−
14
8
−B−
P 7 PL
0.25 (0.010)
M
B
M
7
1
G
−T−
0.25 (0.010)
M
T B
S
A
DIM
A
B
C
D
F
G
J
K
M
P
R
J
M
K
D 14 PL
F
R X 45 _
C
SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
S
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0_
7_
0.228 0.244
0.010 0.019
SOLDERING FOOTPRINT
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
14
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCV8769/D