150 mA LDO Linear Voltage Regulator with Reset, Delay and Early Warning

NCV8669
Very Low Iq 150 mA LDO
Regulator with Reset and
Early Warning
The NCV8669 is 150 mA LDO regulator with integrated reset and
early warning functions dedicated for microprocessor applications. Its
robustness allows NCV8669 to be used in severe automotive
environments. The NCV8669 utilizes precise 1 MW internal resistor
divider for Early Warning function which significantly reduces overall
application quiescent current and number of external components.
Very low quiescent current as low as 42 mA typical for NCV8669
makes it suitable for applications permanently connected to battery
requiring very low quiescent current with or without load. The
NCV8669 contains protection functions as current limit and thermal
shutdown.
•
•
•
•
•
•
MARKING
DIAGRAM
14
14
1
SO−14
D SUFFIX
CASE 751A
y
z
xx
Features
•
•
•
•
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V8669yzxxG
AWLYWW
1
= Timing and Reset Threshold Option*
= Early Warning Option*
= Voltage Option
5.0 V (xx = 50)
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Output Voltage Options: 5 V
Output Voltage Accuracy: ±2 %
A
Output Current up to 150 mA
WL
Very Low Quiescent Current: Typ 42 mA (Including Internal Early
Y
WW
Warning Resistor Divider Current)
G
Very Low Dropout Voltage
*See APPLICATION INFORMATION section.
Early Warning Threshold Accuracy: $10% Over Temperature
Range (Using RSI_ext External Resistor with $1% 100 ppm/°C)
ORDERING INFORMATION
Microprocessor Compatible Control Functions:
See detailed ordering and shipping information in
♦ Reset with Adjustable Power−on Delay
dimensions section on page 13 of this data sheet.
♦ Early Warning
Wide input voltage operation range: up to 40 V
Typical Applications
Protection Features:
• Body Control Module
♦ Current Limitation
♦ Thermal Shutdown
• Instruments and Clusters
These are Pb−Free Devices
• Occupant Protection and Comfort
• Powertrain
VBAT
Vout
Vin
Cin
0.1 mF
*
RSI_ext
Vout
the
VDD
Cout
2.2 mF
SI
Microprocessor
NCV8669yz**
DT
*RSI_ext is optional
** z is 1, 2, 3, ... , n
SO
I/O
RO
RESET
GND
Figure 1. Application Circuit
© Semiconductor Components Industries, LLC, 2011
July, 2011 − Rev. 1
1
Publication Order Number:
NCV8669/D
NCV8669
Vin
Vout
RSI1
RSI2
Driver with
Current
Limit
RO
Thermal
Shutdown
TIMING
CIRCUIT
and
RESET
OUTPUT
DRIVER
and
SENSE
OUTPUT
DRIVER
Vref
SO
SI
DT
V ref
*
GND
*Pull−down Resistor (typ 150 kW) active only in Reset State.
Figure 2. Simplified Block Diagram
NC
1
14
SI
Vin
DT
GND
GND
GND
GND
GND
GND
GND
Vout
SO
RO
SO−14
Figure 3. Pin Connections
(Top View)
PIN FUNCTION DESCRIPTION
Pin No.
SO−14
Pin Name
1
NC
Not Connected.
Reset Delay Time Select. Short to GND or connect to Vout to select time.
Description
2
DT
3, 4, 5, 6,
10, 11,
12
GND
7
RO
Reset Output. 30 kW internal Pull−Up resistor connected to Vout. RO goes Low when Vout drops by more
than 7% (typ.) from its nominal value.
8
SO
Early Warning Output. 30 kW internal Pull−Up resistor connected to Vout. It can be used to provide early
warning of an impending reset condition. Leave open if not used.
9
Vout
Regulated Output Voltage. Connect 2.2 mF capacitor with ESR < 100 W to ground.
13
Vin
Positive Power Supply Input. Connect 0.1 mF capacitor to ground.
14
SI
Early Warning Adjust Input; connect RSI_ext against GND to adjust Input Voltage Early Warning
Threshold or leave unconnected. See Electrical Characteristics Table and Application Information sections for more information.
Power Supply Ground.
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NCV8669
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Min
Max
−0.3
−
40
45
Iin
−5
−
Output Voltage (Note 2)
Vout
−0.3
5.5
V
Output Current
Iout
−3
Current Limited
mA
Sense Input Voltage DC
DC
Transient, t < 100 ms
VSI
−0.3
−
40
45
Sense Input Current Range
ISI
−1
1
DT (Reset Delay Time Select) Voltage
VDT
−0.3
5.5
V
DT (Reset Delay Time Select) Current
IDT
−1
1
mA
Reset Output Voltage
VRO
−0.3
5.5
V
Reset Output Current
IRO
−3
3
mA
Sense Output Voltage
VSO
−0.3
5.5
V
Sense Output Current
ISO
−3
3
mA
Junction Temperature
TJ
−40
150
°C
Storage Temperature
TSTG
−55
150
°C
Input Voltage DC (Note 1)
DC
Transient, t < 100 ms
Vin
Input Current
Unit
V
mA
V
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. 5.5 or (Vin + 0.3 V), whichever is lower
ESD CAPABILITY (Note 3)
Rating
Symbol
Min
Max
Unit
ESD Capability, Human Body Model
ESDHBM
−2
2
kV
ESD Capability, Machine Model
ESDMM
−200
200
V
ESD Capability, Charged Device Model
ESDCDM
−1
1
kV
Min
Max
Unit
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (JS−001−2010)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD Charged Device Model tested per AEC−Q100−011 (EIA/JESD22−C101)
LEAD SOLDERING TEMPERATURE AND MSL (Note 4)
Rating
Symbol
Moisture Sensitivity Level
MSL
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb−Free Versions
TSLD
1
−
−
265 peak
°C
4. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
THERMAL CHARACTERISTICS (Note 5)
Rating
Thermal Characteristics
Thermal Resistance, Junction−to−Air (Note 6)
Thermal Reference, Junction−to−Lead (Note 6)
Symbol
Value
RqJA
RψJL
94
18
5. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
6. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate.
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Unit
°C/W
NCV8669
OPERATING RANGES (Note 7)
Rating
Symbol
Min
Max
Unit
Input Voltage (Note 7)
Vin
5.5
40
V
Junction Temperature
TJ
−40
150
°C
7. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
8. Minimum Vin = 5.5 V or (Vout + VDO), whichever is higher.
ELECTRICAL CHARACTERISTICS Vin = 13.2 V, VDT = GND, RSI_ext not used, Cin = 0.1 mF, Cout = 2.2 mF, for typical values TJ =
25°C, for min/max values TJ = −40°C to 150°C; unless otherwise noted. (Notes 9 and 10)
Test Conditions
Parameter
Symbol
Min
Typ
Max
4.9
4.9
(−2%)
5.0
5.0
5.1
5.1
(+2%)
4.9
(−2%)
5.0
5.1
(+2%)
Unit
REGULATOR OUTPUT
Output Voltage (Accuracy %)
Vin = 5.6 V to 40 V, Iout = 0.1 mA to 100 mA
Vin = 5.8 V to 16 V, Iout = 0.1 mA to 150 mA
Vout
Output Voltage (Accuracy %)
TJ = −40 °C to 125 °C
Vin = 5.8 V to 28 V, Iout = 0 mA to 150 mA
Line Regulation
Vin = 6 V to 28 V, Iout = 5 mA
Regline
−20
0
20
mV
Load Regulation
Iout = 0.1 mA to 150 mA
Regload
−40
10
40
mV
−
−
225
300
450
600
2.2
0.01
−
−
100
100
−
−
42
49
50
Dropout Voltage (Note 11)
Output Capacitor for Stability (Note 12)
Vout
V
VDO
Iout = 100 mA
Iout = 150 mA
Iout = 0 mA to 150 mA
Cout
ESR
V
mV
mF
W
QUIESCENT CURRENT
Quiescent Current, Iq = Iin − Iout (Note 13)
Iout = 0.1 mA, TJ = 25°C
Iout = 0.1 mA to 150 mA, TJ ≤ 125°C
Iq
mA
CURRENT LIMIT PROTECTION
Current Limit
Vout = 0.96 x Vout_nom
ILIM
205
−
525
mA
Short Circuit Current Limit
Vout = 0 V
ISC
205
−
525
mA
PSRR
−
60
−
dB
−
2
−
−
0.8
−
−
−
1
90
93
96
−
2.0
−
1.75
−
−
PSRR
Power Supply Ripple Rejection (Note 12)
f = 100 Hz, 0.5 Vpp
DT (Reset Delay Time Select)
Vth(DT)
DT Threshold Voltage
Logic Low
Logic High
DT Input Current
VDT = 5 V
IDT
V
mA
RESET OUTPUT RO
Output Voltage Reset Threshold (Note 14) Vout decreasing
Vin > 5.5 V
VRT
Reset Hysteresis
VRH
Maximum Reset Sink Current
Vout = 4.5 V, VRO = 0.25 V
IROmax
%Vout
%Vout
mA
9. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
10. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [TJ. Low duty
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
11. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V.
12. Values based on design and/or characterization.
13. Iq for Preset EW Threshold Options is measured when RSI_ext is not used. For typical values of Iq vs RSI_ext see Figure 23.
14. See APPLICATION INFORMATION section for Reset Thresholds and Reset Delay Time Options
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NCV8669
ELECTRICAL CHARACTERISTICS Vin = 13.2 V, VDT = GND, RSI_ext not used, Cin = 0.1 mF, Cout = 2.2 mF, for typical values TJ =
25°C, for min/max values TJ = −40°C to 150°C; unless otherwise noted. (Notes 9 and 10)
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
VROL
−
0.15
0.25
V
4.5
−
−
15
30
50
12.8
25.6
16
32
19.2
38.4
16
25
38
RESET OUTPUT RO
Reset Output Low Voltage
Vout > 1 V, IRO < 200 mA
Reset Output High Voltage
VROH
Integrated Reset Pull Up Resistor
RRO
Reset Delay Time (Note 14)
tRD
DT connected to GND
DT connected to Vout
Reset Reaction Time (see Figure 24)
tRR
V
kW
ms
ms
EARLY WARNING (SI and SO)
Early Warning Input Voltage Threshold
(Preset EW Threshold Values)
NCV8669y2
High
Low
RSI1 = 480 kW, RSI2 = 520 kW
(internal resistor divider values, see )
RSI_ext = 150 kW (±1%, ±100 ppm/°C)
(external resistor value, see Figure 22)
Integrated Sense Output Pull Up Resistor
Sense Output Low Voltage
RSO
Vin < Vin_EW(th)_Low_Min, ISO < 200 mA, Vout > 1 V
Sense Output High Voltage
Maximum Sense Output Sink Current
Vin_EW(th)
VSOL
VSOH
VSO = 0.25 V
Vin < Vin_EW(th)_Low_Min
Vout = 4.5 V
V
5.67
5.30
6.30
5.89
6.92
6.47
15
30
50
−
0.15
0.25
4.5
−
−
ISOmax
kW
V
V
mA
1.75
−
−
THERMAL SHUTDOWN
Thermal Shutdown Temperature (Note 12)
TSD
150
175
195
°C
Thermal Shutdown Hysteresis (Note 12)
TSH
−
25
−
°C
9. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
10. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [TJ. Low duty
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
11. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V.
12. Values based on design and/or characterization.
13. Iq for Preset EW Threshold Options is measured when RSI_ext is not used. For typical values of Iq vs RSI_ext see Figure 23.
14. See APPLICATION INFORMATION section for Reset Thresholds and Reset Delay Time Options
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NCV8669
TYPICAL CHARACTERISTICS
300
44
Iq, QUIESCENT CURRENT (mA)
Iq, QUIESCENT CURRENT (mA)
45
43
42
41
40
39
38
Vin = 13.2 V
Iout = 100 mA
RSI_ext not used
37
36
35
−40 −20
250
200
150
100
50
0
0
20 40 60 80 100 120 140 160
TJ, JUNCTION TEMPERATURE (°C)
Iout = 0 mA
TJ = 25°C
RSI_ext not used
0
Figure 4. Quiescent Current vs. Temperature
43
Vout, OUTPUT VOLTAGE (V)
TJ = 150°C
TJ = −40°C
42
41
TJ = 25°C
40
39
38
37
Vin = 13.2 V
RSI_ext not used
36
25
50
75
100
125
35
5.05
5.00
4.95
0
20
40
60
80
100 120 140 160
Iout, OUTPUT CURRENT (mA)
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Quiescent Current vs. Output Current
Figure 7. Output Voltage vs. Temperature
6
500
Iout = 1.0 mA
5
4
3
TJ = 25°C
2
1
TJ = −40°C
TJ = 150°C
0
1
2
3
4
5
6
7
40
Vin = 13.2 V
Iout = 100 mA
4.90
−40 −20
150
VDO, DROPOUT VOLTAGE (mV)
Iq, QUIESCENT CURRENT (mA)
5.10
44
35
0
Vout, OUTPUT VOLTAGE (V)
10
15
20
25
30
Vin, INPUT VOLTAGE (V)
Figure 5. Quiescent Current vs. Input Voltage
45
0
5
400
TJ = 25°C
200
100
0
0
8
TJ = 150°C
300
TJ = −40°C
25
50
75
100
125
Vin, INPUT VOLTAGE (V)
Iout, OUTPUT CURRENT (mA)
Figure 8. Output Voltage vs. Input Voltage
Figure 9. Dropout vs. Output Current
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150
NCV8669
TYPICAL CHARACTERISTICS
400
400
ILIM, ISC, CURRENT LIMIT (mA)
VDO, DROPOUT VOLTAGE (mV)
500
Iout = 150 mA
300
Iout = 100 mA
200
100
0
−40 −20
0
20
40
60
80
ILIM @ Vout = 4.8 V
200
100
0
5
10
15
20
25
30
35
TJ, JUNCTION TEMPERATURE (°C)
Vin, INPUT VOLTAGE (V)
Figure 10. Dropout vs. Temperature
Figure 11. Output Current Limit vs. Input
Voltage
400
100
Vin = 13.2 V
ESR, STABILITY REGION (W)
ILIM, ISC, CURRENT LIMIT (mA)
300
0
100 120 140 160
TJ = 25°C
ISC @ Vout = 0 V
350
ISC @ Vout = 0 V
300
ILIM @ Vout = 4.8 V
250
200
−40 −20
0
20
40
60
80
Vin = 13.2 V
TJ = −40°C to 150°C
Cout = 2.2 mF − 100 mF
10
STABLE REGION
1
0.1
0.01
100 120 140 160
40
0
50
100
150
200
250
300
350
TJ, JUNCTION TEMPERATURE (°C)
Iout, OUTPUT CURRENT (mA)
Figure 12. Output Current Limit vs. Temperature
Figure 13. Cout ESR Stability vs. Output Current
14.2 V
Vin
(1 V/div)
TJ = 25°C
I Iout = 1 mA
Cout = 10 mF
trise/fall = 1 ms (Vin)
13 V
Iout
(100 mA/div)
TJ = 25°C
Vin = 13.2 V
Cout = 10 mF
trise/fall = 1 ms (Iout)
150 mA
12.2 V
0.1 mA
5.16 V
5.09 V
5V
Vout
(50 mV/div)
5V
Vout
(200 mV/div)
4.97 V
4.77 V
TIME (100 ms/div)
TIME (20 ms/div)
Figure 14. Line Transients
Figure 15. Load Transients
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NCV8669
TYPICAL CHARACTERISTICS
100
TJ = 25°C
RSI_ext = 150 kW
Rout = 5 kW
Vin
(5 V/div)
TJ = 25°C
Vin = 13.2 V $0.5 VPP
Cout = 2.2 mF
Iout = 1 mA
90
80
70
60
PSRR (dB)
Vout
(5 V/div)
50
40
VRO
(5 V/div)
30
VSO
(5 V/div)
10
20
0
TIME (100 ms/div)
10
100
4.80
3500
3000
VRT, RESET THRESHOLD (V)
TJ = 25°C
Vin = 12.5 V
Cout = 2.2 mF
Iout = 1 mA
4000
2500
2000
1500
1000
500
0
10
100
1000
10000
f, FREQUENCY (Hz)
100000
Figure 17. PSRR vs. Frequency
4500
NOISE DENSITY (nV/√Hz)
10000
f, FREQUENCY (Hz)
Figure 16. Power Up and Down Transient
100000
Vin = 13.2 V
4.75
4.70
4.65
4.60
−40 −20
Figure 18. Noise Density vs. Frequency
0
20 40 60 80 100 120 140 160
TJ, JUNCTION TEMPERATURE (°C)
Figure 19. Reset Threshold vs. Temperature
6.5
Vin = 13.2 V
35
VDT = Vout
30
25
20
VDT = GND
15
10
−40 −20
0
20
40
60
80
INPUT VOLTAGE EW THRESHOLD
(V)
40
tRD, RESET DELAY TIME (ms)
1000
100 120 140 160
6.4
Vin_EW(th),H (Vin increasing)
6.3
6.2
6.1
6.0
5.9
Vin_EW(th),L (Vin decreasing)
5.8
5.7
5.6
RSI_ext = 150 kW
5.5
−40 −20 0
20
40
60
80
100 120 140 160
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 20. Reset Delay Times vs. Temperature
Figure 21. Vin EW Thresholds vs. Temperature
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NCV8669
TYPICAL CHARACTERISTICS
55
11
10
9
8
7
Vin_EW(th),H (Vin decreasing)
6
5
4
50
75
100
125
150 175
RSI_ext, (kW)
200
225
Vin = 13.2 V
TJ = 25°C
54
53
52
51
(mA)
TJ = 25°C
Iq&RSI_ext, QUIESCENT CURRENT
INPUT VOLTAGE EW THRESHOLD
LOW (V)
12
50
49
48
47
46
45
50
250
Figure 22. Input Voltage EW Threshold Low vs.
RSI_ext (Calculated Using E24 Series)
75
100
125
150
175
RSI_ext, (kW)
200
225
250
Figure 23. Quiescent Current vs. RSI_ext
(Including IRSI_ext, Calculated Using E24 Series)
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NCV8669
Vin
t
Vout
<tRR
VRT+VRH
VRT
VRO
t
tRR
tRD
VROH
VROL
t
Figure 24. Reset Function and Timing Diagram
Vin
Vin_EW(th)_L
t
V out
V RT
t
V RO
t
VSO
tWarning
t
Figure 25. Input Voltage Early Warning Function Diagram
DEFINITIONS
General
Line Regulation
All measurements are performed using short pulse low
duty cycle techniques to maintain junction temperature as
close as possible to ambient temperature.
The change in output voltage for a change in input voltage
measured for specific output current over operating ambient
temperature range.
Output Voltage
Load Regulation
The output voltage parameter is defined for specific
temperature, input voltage and output current values or
specified over Line, Load and Temperature ranges.
The change in output voltage for a change in output
current measured for specific input voltage over operating
ambient temperature range.
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NCV8669
Dropout Voltage
Line Transient Response
The input to output differential at which the regulator
output no longer maintains regulation against further
reductions in input voltage. It is measured when the output
drops 100 mV below its nominal value. The junction
temperature, load current, and minimum input supply
requirements affect the dropout level.
Typical output voltage overshoot and undershoot
response when the input voltage is excited with a given
slope.
Load Transient Response
Typical output voltage overshoot and undershoot
response when the output current is excited with a given
slope between low−load and high−load conditions.
Quiescent Current
Quiescent Current (Iq) is the difference between the input
current (measured through the LDO input pin) and the
output load current.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 175°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Current Limit and Short Circuit Current Limit
Current Limit is value of output current by which output
voltage drops below 96% of its nominal value. It means that
the device is capable to supply minimum 200 mA without
sending Reset signal to microprocessor.
Short Circuit Current Limit is output current value
measured with output of the regulator shorted to ground.
Maximum Package Power Dissipation
The power dissipation level is maximum allowed power
dissipation for particular package or power dissipation at
which the junction temperature reaches its maximum
operating value, whichever is lower.
PSRR
Power Supply Rejection Ratio is defined as ratio of output
voltage and input voltage ripple. It is measured in decibels
(dB).
APPLICATIONS INFORMATION
between 0.8 V and 2 V. The default condition for an open DT
pin is the faster Reset time (DT = GND condition). Times are
in pairs and are highlighted in the table below. Consult
factory for availability. The Delay Time select (DT) pin is
logic level controlled and provides Reset Delay time per the
table. Note the DT pin is sampled only when RO is low, and
changes to the DT pin when RO is high will not effect the
reset delay time.
The NCV8669 regulator is self−protected with internal
thermal shutdown and internal current limit. Typical
characteristics are shown in Figures 4 to 25.
Input Decoupling (Cin)
A ceramic or tantalum 0.1 mF capacitor is recommended
and should be connected close to the NCV8669 package.
Higher capacitance and lower ESR will improve the overall
line and load transient response.
If extremely fast input voltage transients are expected then
appropriate input filter must be used in order to decrease
rising and/or falling edges below 50 V/ms for proper
operation. The filter can be composed of several capacitors
in parallel.
Reset Operation
A reset signal is provided on the Reset Output (RO) pin to
provide feedback to the microprocessor of an out of
regulation condition. The timing diagram of reset function
is shown in Figure 24. This is in the form of a logic signal on
RO. Output voltage conditions below the RESET threshold
cause RO to go low. The RO integrity is maintained down
to Vout = 1.0 V. The Reset Output (RO) circuitry includes
internal pull−up connected to the output (Vout) No external
pull−up is necessary.
Output Decoupling (Cout)
The NCV8669 is a stable component and does not require
a minimum Equivalent Series Resistance (ESR) for the
output capacitor. Stability region of ESR versus Output
Current is shown in Figure 13. The minimum output
decoupling value is 2.2 mF and can be augmented to fulfill
stringent load transient requirements. The regulator works
with ceramic chip capacitors as well as tantalum devices.
Larger values improve noise rejection and load transient
response.
RESET DELAY AND RESET THRESHOLD OPTIONS
Reset Delay Time Select
Part Number
DT = GND
Reset
Time
DT = Vout
Reset
Time
Reset
Threshold
NCV86695z
16 ms
32 ms
93%
NOTE:
Selection of the NCV8669yz devices and the state of the
DT pin determines the available Reset Delay times. The part
is designed for use with DT tied to ground or OUT, but may
be controlled by any logic signal which provides a threshold
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The timing values can be selected from following list: 8,
16, 32, 64, and 128 ms. The reset threshold values can
be selected from following list: 90% and 93%. Contact
factory for other timing and reset thresholds
combinations not included in the table.
NCV8669
Sense Input (SI) / Sense Output (SO) Voltage Monitor
Thermal Considerations
An on−chip comparator is available to provide early
warning to the microprocessor of a possible reset signal
(Figure 25). The Sense Output is from an open drain driver
with an internal 30 kW pull up resistor to Vout. The reset
signal typically turns the microprocessor off
instantaneously. This can cause unpredictable results with
the microprocessor. The signal received from the SO pin will
allow the microprocessor time (tWarning) to complete its
present task before shutting down. The actual trip point of
input voltage is programmed by internal resistor divider and
external resistor RSI_ext. If RSI_ext is not used following
Preset Early Warning Threshold would apply:
As power in the NCV8669 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the NCV8669 has good thermal conductivity through the
PCB, the junction temperature will be relatively low with
high power applications. The maximum dissipation the
NCV8669 can handle is given by:
P D(MAX) +
EARLY WARNING PRESET OPTIONS
Part Number
NCV8669y2
NOTE:
RSI1
(Internal)
RSI2
(Internal)
Input Voltage
Early Warning
Threshold Low
(Typ) (RSI_ext
not used)
480 kW
520 kW
2.37 V
P D [ V inǒI [email protected] outǓ ) I outǒV in * V outǓ
ȡ
ȧR
Ȣ
R SI2
SI2
ǒVin_EW(th)_Low
I outǓ
I out ) I q
(eq. 5)
PCB 1 oz Cu
110
100
ȧ
Ȥ (eq. 1)
R
ȣ
ȧ
* 0.25Ǔ * 1.1 10 Ȥ
R SI_ext
P D(MAX) ) ǒV out
120
ǒRSI2 ) RSI_extǓȣ
R SI1
R SI_ext + 1.1
V in(MAX) [
RqJA, THERMAL RESISTANCE (°C/W)
R SI1
(eq. 4)
or
Practically only preset options above 4.5 V can be used
without RSI_ext due to minimum operating input voltage
value limitation. For other preset options the trip point has
to be adjusted externally using RSI_ext resistor connected
between input monitor SI and GND (see Figure 1). For other
preset options RSI_ext has to be used to achieve Vin_EW(th) >
5.5 V (minimum operating input voltage value). The value
for RSI_ext is recommended to be selected in range from
50 kW to 250 kW and the trip point can be shifted according
to Figure 22. The higher is RSI_ext the lower is overall
Quiescent Current of the application (see Figure 23).
General formulas for calculation of Vin_EW(th)Low or RSI_ext
for selected preset Early Warning options are described by
Equations 1 and 2.
ȡ
ȧ
Ȣ
(eq. 3)
R qJA
Since TJ is not recommended to exceed 150°C, then the
NCV8669 soldered on 645 mm2, 1 oz copper area, FR4 can
dissipate up to 1.33 W when the ambient temperature (TA)
is 25°C. See Figure 26 for RthJA versus PCB area. The power
dissipated by the NCV8669 can be calculated from the
following equations:
Contact factory for other EW Preset Options
combinations not included in the table.
V in_EW(th)_Low + 1.1 1 )
ƪTJ(MAX) * TAƫ
) 0.25
SI2
90
PCB 2 oz Cu
80
70
60
0
100
200
300
400
500
600
COPPER HEAT SPREADER AREA (mm2)
700
Figure 26. Thermal Resistance vs. PCB Copper Area
6
Hints
(eq. 2)
Vin and GND printed circuit board traces should be as
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the NCV8669 and
make traces as short as possible.
Where:
RSI1,RSI2 − internal EW divider resistors (see Figure 2)
(select values from Early Warning Preset Options table)
RSI−ext − external resistor connected between SI and GND
(recommended to be selected from 50 kW to 250 kW)
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NCV8669
ORDERING INFORMATION
Device
Output
Voltage
Reset Delay Time
DT = GND/Vout
Reset
Threshold (Typ)
Input Voltage Early Warning Threshold Low (Typ)
RSI_ext = 150 kW
Marking
Package
Shipping†
NCV866952D250R2G
5.0 V
16 / 32 ms
93%
5.89 V
V86695250G
SO−14
(Pb−Free)
2500 / Tape &
Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
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NCV8669
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE J
−A−
14
8
−B−
P 7 PL
0.25 (0.010)
M
B
M
7
1
G
−T−
0.25 (0.010)
M
T B
S
A
DIM
A
B
C
D
F
G
J
K
M
P
R
J
M
K
D 14 PL
F
R X 45 _
C
SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
S
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0_
7_
0.228 0.244
0.010 0.019
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
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ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCV8669/D
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