6-Channel EMI Filter Array with ESD Protection

CSPEMI306A
6-Channel EMI Filter Array
with ESD Protection
Product Description
The CSPEMI306A is a six channel low*pass filter array that
reduces EMI/RFI emissions while at the same time providing ESD
protection. It is used on data ports on mobile devices. To reduce
EMI/RFI emissions, the CSPEMI306A integrates a pi*style filter
(C*R*C) for each of the 6 channels. Each high quality filter
provides greater than 30 dB attenuation in the 800*2700 MHz range.
These pi*style filters also support bidirectional filtering, controlling
EMI both to and from a data port connector.
In addition, the CSPEMI306A provides a very high level of
protection for sensitive electronic components that may be subjected
to electrostatic discharge (ESD). The input pins safely dissipate ESD
strikes of ±15 kV, exceeding the maximum requirement of the IEC
61000*4*2 international standard. Using the MIL*STD*883
(Method 3015) specification for Human Body Model (HBM) ESD, the
device provides protection for contact discharges to greater than
±30 kV.
The CSPEMI306A is particularly well suited for portable
electronics (e.g. cellular telephones, PDAs, notebook computers)
because of its small package footprint and low weight. The
CSPEMI306A is available in a space*saving, low*profile Chip
Scale Package with optional lead*free finishing.
Features
• Six Channels of EMI Filtering for Data Ports
• Pi*Style EMI Filters in a Capacitor*Resistor*Capacitor
(C*R*C) Network
• Greater than 32 dB Attenuation at 1 GHz
• ±15 kV ESD Protection on each Channel
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WLCSP15
CASE 567BS
MARKING DIAGRAM
+
306A
306A = CSPEMI306A
ORDERING INFORMATION
Device
Package
Shipping†
CSPEMI306A
CSP−15
(Pb−Free)
3500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
(IEC 61000−4−2 Level 4, Contact Discharge)
• ±30 kV ESD Protection on each Channel (HBM)
• Chip Scale Package Features Extremely Low Lead Inductance for
Optimum Filter and ESD Performance
• 15−Bump, 2.960 mm x 1.330 mm Footprint Chip Scale Package
•
(CSP)
These Devices are Pb−Free and are RoHS Compliant
Applications
•
•
•
•
•
•
EMI Filtering and ESD Protection for both Data and I/O Ports
Wireless Handsets
Handheld PCs / PDAs
MP3 Players
Notebooks
Desktop PCs
© Semiconductor Components Industries, LLC, 2011
May, 2011 − Rev. 3
1
Publication Order Number:
CSPEMI306A/D
CSPEMI306A
ELECTRICAL SCHEMATIC
100 W
FILTERn*
FILTERn*
30 pF
30 pF
GND
(Pins B1−B3)
1 of 6 EMI/RFI + ESD Channels
*See Package/Pinout Diagrams for expanded pin information.
PACKAGE / PINOUT DIAGRAMS
Table 1. PIN DESCRIPTIONS
Pin(s)
Name
Description
A1
FILTER1
Filter Channel 1
A2
FILTER2
Filter Channel 2
A3
FILTER3
Filter Channel 3
A
A4
FILTER4
Filter Channel 4
B
A5
FILTER5
Filter Channel 5
A6
FILTER6
Filter Channel 6
B1−B3
GND
Device Ground
C1
FILTER1
Filter Channel 1
C2
FILTER2
Filter Channel 2
C3
FILTER3
Filter Channel 3
C4
FILTER4
Filter Channel 4
C5
FILTER5
Filter Channel 5
C6
FILTER6
Filter Channel 6
Orientation
Marking
(see Note)
+
1
Top View
(Bumps Down View)
4
5
2
3
6
306A
C
Bottom View
(Bumps Up View)
C1
Orientation
Marking
C2
B1
A1
A1
C3 C4
C5
B2
A2
A3
A4
C6
B3
A5
A6
CSPEMI306A
CSP Package
Note: Lead−free devices are specified by using a “+” character
for the top side orientation mark.
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
Units
−65 to +150
°C
DC Power per Resistor
100
mW
DC Package Power Rating
600
mW
Storage Temperature Range
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. STANDARD OPERATING CONDITIONS
Parameter
Operating Temperature Range
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2
Rating
Units
−40 to +85
°C
CSPEMI306A
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol
Parameter
R
Resistance
C
Capacitance
Conditions
Temperature Coefficient of Resistance
TCC
Temperature Coefficient of Capacitance
At 2.5 V DC
Diode Voltage (reverse bias)
IDIODE = 10 mA
ILEAK
Diode Leakage Current (reverse bias)
VDIODE = 3.3 V
VSIG
Signal Voltage
Positive Clamp
Negative Clamp
ILOAD = 10 mA
VESD
In−system ESD Withstand Voltage
a) Human Body Model, MIL−STD−883, Method 3015
b) Contact Discharge per IEC 61000−4−2 Level 4
(Notes 2 and 4)
Clamping Voltage during ESD Discharge
MIL−STD−883 (Method 3015), 8 kV
Positive Transients
Negative Transients
(Notes 2, 3 and 4)
Cut−off frequency
ZSOURCE = 50 W, ZLOAD = 50 W
R = 100 W, C = 30 pF
VCL
fC
Typ
Max
Units
80
100
120
W
24
30
36
pF
At 2.5 V DC
TCR
VDIODE
Min
1200
ppm/°C
−300
ppm/°C
5.5
V
100
5.6
−0.4
6.8
−0.8
9.0
−1.5
nA
V
kV
±30
±15
V
+10
−5
58
MHz
1. TA = 25°C unless otherwise specified.
2. ESD applied to input and output pins with respect to GND, one at a time.
3. Clamping voltage is measured at the opposite side of the EMI filter to the ESD pin. For example, if ESD is applied to Pin A1, then clamping
voltage is measured at Pin C1.
4. Unused pins are left open.
PERFORMANCE INFORMATION
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 1. Insertion Loss vs. Frequency (A1−C1 to GND B2)
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3
CSPEMI306A
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 2. Insertion Loss vs. Frequency (A2−C2 to GND B2)
Figure 3. Insertion Loss vs. Frequency (A3−C3 to GND B2)
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4
CSPEMI306A
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 4. Insertion Loss vs. Frequency (A4−C4 to GND B2)
Figure 5. Insertion Loss vs. Frequency (A5−C5 to GND B2)
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5
CSPEMI306A
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 6. Insertion Loss vs. Frequency (A6−C6 to GND B2)
Figure 7. Comparison of Filter Response Curves for CSPEMI306A vs. DC Bias
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6
CSPEMI306A
PERFORMANCE INFORMATION (Cont’d)
Figure 8. Filter Capacitance vs. Input Voltage over Temperature
(normalized to capacitance at 2.5 VDC and 255C)
Figure 9. Resistance vs. Temperature (normalized to resistance at 255C)
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7
CSPEMI306A
APPLICATION INFORMATION
Parameter
Value
Pad Size on PCB
0.240 mm
Pad Shape
Round
Pad Definition
Non−Solder Mask defined pads
Solder Mask Opening
0.290 mm Round
Solder Stencil Thickness
0.125 mm − 0.150 mm
Solder Stencil Aperture Opening (laser cut, 5% tapered walls)
0.300 mm Round
Solder Flux Ratio
50/50 by volume
Solder Paste Type
No Clean
Pad Protective Finish
OSP (Entek Cu Plus 106A)
Tolerance − Edge To Corner Ball
±50 mm
Solder Ball Side Coplanarity
±20 mm
Maximum Dwell Time Above Liquidous
60 seconds
Maximum Soldering Temperature for Lead−free Devices using a Lead−free Solder Paste
260°C
Non−Solder Mask Defined Pad
0.240 mm DIA.
Solder Stencil Opening
0.300 mm DIA.
Solder Mask Opening
0.290 mm DIA.
Figure 10. Recommended Non−Solder Mask Defined Pad Illustration
Temperature (5C)
250
200
150
100
50
0
1:00.0
2:00.0
3:00.0
Time (minutes)
4:00.0
Figure 11. Lead−free (SnAgCu) Solder Ball Reflow Profile
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8
CSPEMI306A
PACKAGE DIMENSIONS
WLCSP15, 2.96x1.33
CASE 567BS−01
ISSUE O
PIN A1
REFERENCE
2X
D
ÈÈ
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
B
E
DIM
A
A1
A2
b
D
E
eD
eE
0.05 C
2X
0.05 C
TOP VIEW
A2
0.05 C
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05 C
NOTE 3
A1
C
SIDE VIEW
SEATING
PLANE
eD/2
15X
0.05 C A B
0.03 C
PACKAGE
OUTLINE
A1
0.87
eD
b
eE
0.44
C
15X
0.50
PITCH
B
A
1 2 3
4 5 6
MILLIMETERS
MIN
MAX
0.65
0.56
0.21
0.27
0.40 REF
0.29
0.35
2.96 BSC
1.33 BSC
0.50 BSC
0.435 BSC
0.25
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
7 8 9
BOTTOM VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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CSPEMI306A/D