6-Channel LCD and Camera EMI Filter Array with ESD Protection

CM1442-06LP
LCD and Camera EMI Filter
Array with ESD Protection
Functional Description
Features
• Six Channels of EMI Filtering with Integrated ESD Protection
• 0.4 mm Pitch, 15−Bump, 2.360 mm x 1.053 mm Footprint Chip
•
•
•
•
•
Scale Package (CSP)
Pi−Style EMI Filters in a Capacitor−Resistor−Capacitor (C−R−C)
Network
±15 kV ESD Protection on Each Channel
(IEC 61000−4−2 Level 4, Contact Discharge)
±30 kV ESD Protection on Each Channel (HBM)
Greater than 30 dB Attenuation (Typical) at 1 GHz
These Devices are Pb−Free and are RoHS Compliant
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WLCSP15
LP SUFFIX
CASE 567CM
MARKING DIAGRAM
+
N4
YY
WW
The CM1442-06LP is part of a family of pi-style EMI filter arrays
with ESD protection, which integrates six filters (C-R-C) in a Chip
Scale Package (CSP) form factor with 0.40 mm pitch. The
CM1442-06LP (low profile) has component values of 15 pF − 100 −
15 pF per channel. The CM1442-06LP has a cut-off frequency of
120 MHz and can be used in applications where the data rates are as
high as 48 Mbps. The parts include avalanche-type ESD diodes on
every pin, which provide a very high level of protection for sensitive
electronic components against potential electrostatic discharge (ESD).
The ESD protection diodes safely dissipate ESD strikes of ±15 kV,
well beyond the maximum requirement of the IEC61000-4-2
international standard. Using the MIL-STD-883 (Method 3015)
specification for Human Body Model (HBM) ESD, the pins are
protected for contact discharges at greater than ±30 kV.
The CM1442-06LP is available in a space-saving, low-profile CSP
with RoHS-compliant, lead-free finishing. It is manufactured with a
0.40 mm pitch and 0.15 mm CSP solder ball to provide up to 28%
board space saving versus competing CSP devices with 0.50 mm pitch
and 0.30 mm CSP solder ball.
CM1442−06LP
15−Bump CSP Package
N4
= CM1442−06LP
YYWW = Datecode
ORDERING INFORMATION
Device
Package
Shipping†
CM1442−06LP
CSP−15
(Pb−Free)
3500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Applications
• LCD and Camera Data Lines in Mobile Handsets
• I/O Port Protection for Mobile Handsets, Notebook Computers,
•
•
•
•
PDAs, etc.
EMI Filtering for Data Ports in Cell Phones, PDAs or Notebook
Computers
Wireless Handsets
Handheld PCs/PDAs
LCD and Camera Modules
© Semiconductor Components Industries, LLC, 2011
March, 2011 − Rev. 4
1
Publication Order Number:
CM1442−06LP/D
CM1442−06LP
BLOCK DIAGRAM
100 FILTER+ESDn*
(Pins A1−An)
15 pF
GND
(Pins B1−Bm
where m = n/2)
FILTER+ESDn*
(Pins C1−Cn)
15 pF
1 of 6 EMI/RFI + ESD Channels
*See Package/Pinout Diagrams for expanded pin information.
PACKAGE / PINOUT DIAGRAMS
Top View
(Bumps Down View)
A
+
1
2
3
4
5
6
C1
N4
Orientation
Marking
(see Note)
Bottom View
(Bumps Up View)
B
Orientation
Marking
C
C2
B1
A1
A1
C3
C4
B2
A2
A3
C5
C6
B3
A4
A5
A6
CM1442−06LP
15−Bump CSP Package
Table 1. PIN DESCRIPTIONS
Pins
Name
A1
FILTER1
A2
FILTER2
A3
Description
Pins
Name
Description
Filter + ESD Channel 1
C1
FILTER1
Filter + ESD Channel 1
Filter + ESD Channel 2
C2
FILTER2
Filter + ESD Channel 2
FILTER3
Filter + ESD Channel 3
C3
FILTER3
Filter + ESD Channel 3
A4
FILTER4
Filter + ESD Channel 4
C4
FILTER4
Filter + ESD Channel 4
A5
FILTER5
Filter + ESD Channel 5
C5
FILTER5
Filter + ESD Channel 5
A6
FILTER6
Filter + ESD Channel 6
C6
FILTER6
Filter + ESD Channel 6
B1−B3
GND
Device Ground
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
Units
−65 to +150
°C
DC Power per Resistor
100
mW
DC Package Power Rating
500
mW
Storage Temperature Range
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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2
CM1442−06LP
Table 3. STANDARD OPERATING CONDITIONS
Parameter
Operating Temperature Range
Rating
Units
−40 to +85
°C
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol
R
CTOTAL
Parameter
Conditions
Resistance
Min
Typ
Max
Units
80
100
120
Total Channel Capacitance
At 2.5 VDC Reverse Bias,
1 MHz, 30 mVAC
24
30
36
pF
C
Capacitance C1
At 2.5 VDC Reverse Bias,
1 MHz, 30 mVAC
12
15
18
pF
VDIODE
Standoff Voltage
IDIODE = 10 A
6.0
ILEAK
Diode Leakage Current (reverse bias)
VDIODE = +3.3 V
0.1
1
VSIG
Signal Clamp Voltage
Positive Clamp
Negative Clamp
ILOAD = 10 mA
ILOAD = −10 mA
6.8
−0.8
9.0
−0.4
VESD
In−system ESD Withstand Voltage
a) Human Body Model, MIL−STD−883, Method 3015
b) Contact Discharge per IEC 61000−4−2 Level 4
RDYN
Dynamic Resistance
Positive
Negative
fC
(Notes 2 and 3)
5.6
−1.5
R = 100 , C = 15 pF
1. TA = 25°C unless otherwise specified.
2. ESD applied to input and output pins with respect to GND, one at a time.
3. Unused pins are left open.
PERFORMANCE INFORMATION
Figure 1. Filter Capacitance vs. Input Voltage
(normalized to capacitance at 2.5 VDC and 255C)
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3
A
V
kV
±30
±15
2.3
0.9
Cut−off Frequency
ZSOURCE = 50 , ZLOAD = 50 V
115
MHz
CM1442−06LP
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 2. Insertion Loss vs. Frequency (A1−C1 to GND B1)
Figure 3. Insertion Loss vs. Frequency (A2−C2 to GND B1)
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4
CM1442−06LP
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 4. Insertion Loss vs. Frequency (A3−C3 to GND B2)
Figure 5. Insertion Loss vs. Frequency (A4−C4 to GND B2)
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5
CM1442−06LP
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 6. Insertion Loss vs. Frequency (A5−C5 to GND B3)
Figure 7. Insertion Loss vs. Frequency (A6−C6 to GND B3)
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6
CM1442−06LP
APPLICATION INFORMATION
Table 5. PRINTED CIRCUIT BOARD RECOMMENDATIONS
Parameter
Value
Pad Size on PCB
0.240 mm
Pad Shape
Round
Pad Definition
Non−Solder Mask defined pads
Solder Mask Opening
0.290 mm Round
Solder Stencil Thickness
0.125 − 0.150 mm
Solder Stencil Aperture Opening (laser cut, 5% tapered walls)
0.300 mm Round
Solder Flux Ratio
50/50 by volume
Solder Paste Type
No Clean
Pad Protective Finish
OSP (Entek Cu Plus 106A)
Tolerance − Edge To Corner Ball
±50 m
Solder Ball Side Coplanarity
±20 m
Maximum Dwell Time Above Liquidous
60 seconds
Maximum Soldering Temperature for Lead−free Devices using a Lead−free Solder Paste
260°C
Non−Solder Mask Defined Pad
0.240 mm DIA.
Solder Stencil Opening
0.300 mm DIA.
Solder Mask Opening
0.290 mm DIA.
Figure 8. Recommended Non−Solder Mask Defined Pad Illustration
Temperature (5C)
250
200
150
100
50
0
1:00.0
2:00.0
3:00.0
Time (minutes)
4:00.0
Figure 9. Lead−free (SnAgCu) Solder Ball Reflow Profile
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7
CM1442−06LP
PACKAGE DIMENSIONS
WLCSP15, 2.36x1.05
CASE 567CM−01
ISSUE O
PIN A1
REFERENCE
2X
0.05 C
2X
D
È
È
0.05 C
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
B
E
DIM
A
A1
A2
b
D
E
eD
eE
TOP VIEW
A2
0.05 C
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05 C
NOTE 3
A1
C
SIDE VIEW
SEATING
PLANE
PACKAGE
OUTLINE
A1
eD/2
15X
b
0.05 C A B
0.03 C
eD
MILLIMETERS
MIN
MAX
0.30
0.22
0.04
0.12
0.20 REF
0.23
0.28
2.36 BSC
1.05 BSC
0.400 BSC
0.347 BSC
0.35
eE
0.35
C
15X
0.40
PITCH
B
0.25
DIMENSIONS: MILLIMETERS
A
1 2 3
4 5 6
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
7 8 9
BOTTOM VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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CM1442−06LP/D
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