1-Channel Step-Down Switching Regulator

Ordering number : ENA1443A
LV5761V
Bi-CMOS LSI
1-channel Step-down
Switching Regulator
http://onsemi.com
Overview
The LV5761V is a 1-channel step-down switching regulator.
Functions
• 1 channel step-down switching regulator controller.
• Frequency decrease function at pendent.
• Load-independent soft start circuit.
• ON/OFF function.
• Built-in pulse-by-pulse OCP circuit. It is detected by using ON resistance of an external MOS.
• Synchronous rectification.
• Current mode control.
• Synchronous drive by external signal.
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
supply voltage
VIN max
Allowable Power dissipation
Pd max
Operating temperature
Storage temperature
Conditions
Ratings
Unit
45
V
0.74
W
Topr
-40 to +85
°C
Tstg
-55 to +150
°C
Mounted on a specified board. *
* Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Recommended Operating Range at Ta = 25°C
Parameter
Supply voltage range
Symbol
VIN
Error amplifier input voltage
Semiconductor Components Industries, LLC, 2013
August, 2013
Conditions
Ratings
Unit
8.5 to 42
V
0 to 1.6
V
90909 SY / 41509 MS 20090401-S00011 No.A1443-1/6
LV5761V
Electrical Characteristics at Ta = 25°C, VIN = 12V
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Reference voltage block
Internal reference voltage
Vref
Including offset of E/A
0.654
0.67
0.686
V
5V power supply
VDD
IOUT = 0 to 5mA
4.7
5.2
5.7
V
110
125
140
kHz
Triangular waveform oscillator block
Oscillation frequency
FOSC
RT = 220kΩ
Frequency variation
FOSC DV
VIN = 8 to 42V
Oscillation frequency fold back
VOSC FB
FB voltage detection after SS ends
1
%
0.1
V
detection voltage
Oscillatory frequency after fold
FOSC FB
1/3FOSC
kHz
back
ON/OFF circuit block
IC start-up voltage
VEN on
2.5
3.0
3.5
V
IC off voltage
VEN off
1.0
1.2
1.4
V
4
5
6
Soft start circuit block
Soft start source current
ISS SC
EN > 3.5V
Soft start sink current
ISS SK
EN < 1V, VDD = 5V
2
μA
mA
UVLO circuit block
UVLO lock release voltage
VUVLO
UVLO hysteresis
VUVLO H
7.5
8.0
8.5
V
0.7
V
5
μA
OCP circuit block
OCP charge current
IOCP
Error amplifier
Input bias current
IEA IN
Error amplifier transconductance
GEA
Sink output current
IEA OSK
FB = 1.0V
Source output current
IEA OSC
FB = 0V
Current detection amplifier gain
GISNS
1000
1400
100
nA
1800
μA/V
-100
μA
100
μA
1.5
over current limiter circuit block
Reference current 1
ILIM1
MODE = L (GND)
-10%
18.5
+10%
Reference current 2
ILIM2
MODE = H (VIN)
-10%
37.0
Over current detection comparator
VLIM OFS
μA
+10%
μA
-5
+5
mA
VIN-0.45
VIN
V
V
offset voltage
Over current detection comparator
common mode input range
PWM comparator
Input threshold voltage
Vt max
Duty cycle = DMAX
0.9
1.0
1.1
(fosc = 125kHz)
Vt0
Duty cycle = 0%
0.4
0.5
0.6
V
Maximum ON duty
DMAX
80
85
90
%
Output block
Output stage ON resistance
RONH
5
Ω
RONL
5
Ω
(the upper side)
Output stage ON resistance
(the under side)
Output stage ON current
IONH
240
mA
IONL
240
mA
(the upper side)
Output stage ON current
(the under side)
The whole device
Standby current
ICCS
EN < 1V
Mean consumption current
ICCA
EN > 3V
10
3
μA
mA
No.A1443-2/6
LV5761V
Package Dimensions
unit : mm (typ)
3178B
Pd max -- Ta
Allowable power dissipation, Pd amx -- W
1.0
5.2
0.5
6.4
9
4.4
16
1
8
0.65
0.22
0.8
0.74
0.6
0.4
0.38
0.2
0
-40
1.5max
(0.33)
0.15
Specified board: 114.3×76.1×1.6mm3
glass epoxy board.
-20
0
20
40
60
8085
100
0.1
(1.3)
Ambient temperature, Ta -- °C
SANYO : SSOP16(225mil)
Pin Assignment
FB 1
16 SS
COMP 2
15 ILIM
EN 3
14 VIN
RT 4
LV5761V
SYNC 5
13 OCP
12 MODE
SW 6
11 GND
CBOOT 7
10 VDD
HDRV 8
9 LDRV
Top view
No.A1443-3/6
LV5761V
Block Diagram
VIN 14
REFERENCE
VOLTAGE
5V
REGULATOR
MODE 12
UVLO
5μA
+
-
OCP 13
1.25V
OSP
LOGIC
OCP Comp1
+
ILIM 15
S Q
R
OCP Comp2
VCC
MODE L 20μA
MODE H 40μA
+
-
Current Amp
5μA
+
- SD
SD
7 CBOOT
8 HDRV
S Q
R
DMAX = 90%
1.1V
SS 16
0.67V
FB 1
SAW WAVE
OSCILLATOR
+
+
-
1.0V
0.5V
fosc forced
1/3
COMP 2
6 SW
+
CONTROL
Logic
5V
10 VDD
PWM Comp
9 LDRV
+
0.1V
11 GND
shut down(SD)
FFOLD
Comp
4 5
RT SYNC
3
EN
Pin Function
Pin No.
14
Pin name
VIN
Description
Power supply pin. This pin is monitored by UVLO function. When the voltage of this pin becomes 8V or more by UVLO function,
The IC starts and the soft start function operates.
11
GND
Ground pin. Each reference voltage is based on the voltage of the ground pin.
10
VDD
Power supply pin for an external the lower MOS-FET gate drive.
7
CBOOT
Bootstrap capacity connection pin. This pin becomes a GATE drive power supply of an external NchMOSFET.
Connect a bypath capacitor between CBOOT and SW.
6
SW
Pin to connect with switching node. The source of NchMOSFET connects to this pin.
5
SYNC
External synchronous signal input pin.
9
LDRV
An external the lower MOSFET gate drive pin.
8
HDRV
An external the upper MOSFET gate drive pin.
1
FB
Error amplifier reverse input pin. By operating the converter, the voltage of this pin becomes 0.67V.
The voltage in which the output voltage is divided by an external resistance is applied to this pin. Moreover, when this pin
voltage becomes 0.1V or less after a soft start ends, the oscillatory frequency becomes 1/3.
2
COMP
Error amplifier output pin. Connect a phase compensation circuit between this pin and GND.
16
SS
Pin to connect a capacitor for soft start. A capacitor for soft start is charged by using the voltage of about 5μA.
This pin ends the soft start period by using the voltage of about 1.1V and the frequency fold back function becomes active.
15
ILIM
Reference current pin for current detection.
The sink current of about 20μA flows to this pin when Low level (GND) is set to the MODE pin.
Also, the sink current of about 40μA flows to this pin when High level (VIN) is set to the MODE pin.
When a resistance is connected between this pin and VIN outside and the voltage applied to the SW pin is lower than the
voltage of the terminal side of the resistance, the upper NchMOSFET is off by operating the current limiter comparator.
This operation is reset with respect to each PWM pulse.
3
EN
13
OCP
ON/OFF pin.
Pin to set the time of the timer (during double the over current detection point)
Connect a capacitor between this pin and GND. OCP charge current : 5μA
4
RT
12
MODE
Pin to set the oscillation frequency. Connect a resistance between this pin and GND.
Pin to switch the over current detection point. Set by the low level (GND) of the ILIM pin.
Set by the high level (VIN) of the OCP pin.
When this MODE pin is set to the high level and the point of the over current detection is set by using the ILIM pin is exceeded,
the value becomes double the original value.
Also, when the MODE pin is set to the low level, the point of the over current detection remains an original value.
No.A1443-4/6
LV5761V
Timing Chart
When the MODE pin is set to the high level and the point of the over current detection is set by using the ILIM pin is
exceeded, the value becomes double the original value.
Also, when the MODE pin is set to the low level, the point of over current detection remains an original value.
Timing chart of the over current detection point switching is as below.
MODE = HIGH
t
1.25V
OCP
0V
over current detection point during High MODE
current limit × 2A
For example 6A
over current detection point during Low MODE
current limit × 1A
For example 3A
Load Current
Sample Application Circuit
VIN = 8 to 42V
C1
C7
14
VIN
5 SYNC
SYNC
H/L
C6
R5
12 MODE
15
ILIM
CBOOT 7
C3
4 RT
R7
OUT
Q2
LDRV 9
2 COMP
R2
L
SW 6
16 SS
C5
Q1
HDRV 8
3 EN
ON/OFF
C2
R4
C9
FB 1
GND OCP
11
13
C4
VDD 10
C10
R3
C8
C11
No.A1443-5/6
LV5761V
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PS No.A1443-6/6
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