1.2 A - 2.1 MHz High Efficiency Low Voltage Step-Down Converter

NCV894530
1.2 A - 2.1 MHz High
Efficiency Low Voltage
Step-Down Converter
The NCV894530 step−down dc−dc converter is a monolithic
integrated circuit dedicated to automotive driver information systems
from a downstream voltage rail. The output voltage is externally
adjustable from 0.9 V to 3.3 V and can source up to 1.2 A. The
converter is running at a 2.1 MHz switching frequency, above the
sensitive AM band. The NCV894530 provides additional features
expected in automotive power systems such as integrated soft−start,
hiccup mode current limit and thermal shutdown protection. The
device can also be synchronized to an external clock signal in the
range of 2.1 MHz. The NCV894530 is available in the same 3x3 mm
10−pin DFN package as the dual NCV896530, with compatible
pin−out.
Features
•
•
•
•
•
•
•
•
•
•
Synchronous Rectification for Higher Efficiency
2.1 MHz Switching Frequency
Sources up to 1.2 A
Adjustable Output Voltage from 0.9 V to 3.3 V
2.7 V to 5.5 V Input Voltage Range
Thermal Limit and Short Circuit Protection
Auto Synchronizes with an External Clock
Wettable Flanks − DFN
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
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MARKING
DIAGRAM
. .
DFN10
CASE 485C
NCV89
4530
= Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
FB
1
10
GND
EN
2
9
NC
SYNC
3
8
POR
VIN
4
7
GND
SW
5
6
NC
(Top View)
Typical Applications
•
•
•
•
NCV89
4530
ALYW
Audio
Infotainment
Safety − Vision System
Instrumentation
ORDERING INFORMATION
Device
NCV894530MWTXG
Package
Shipping†
DFN10 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
September, 2015 − Rev. 2
1
Publication Order Number:
NCV894530/D
NCV894530
L
2.2 mH
Vin
Vin
Vout
SW
Cin
20 mF
VDD
Cout
10 mF
NCV894530
SYNC
C1
Microprocessor
R1
Vin or Vout
FB
R2
1.8 − 2.7 MHz
RPOR
OFF ON
RESET
POR
EN
GND
Figure 1. NCV894530 Typical Application
BLOCK DIAGRAM
Vin
UVLO
CURRENT
LIMIT
ENABLE
SOFTSTART
THERMAL
SHUTDOWN
REFERENCE
EN
LOGIC and
PWM LATCH
POR
SW
EA
FB
SLOPE
COMPENSATON
SYNC
OSCILLATOR
GND
Figure 2. Simplified Block Diagram
PIN FUNCTION DESCRIPTION
Pin
Pin Name
Type
Description
1
FB
Analog Input
Feedback voltage. This is the input to the error amplifier.
2
EN
Digital Input
Enable. This pin is active HIGH (equal or lower Analog Input voltage) and is turned
off by logic LOW. Do not let this pin float.
3
SYNC
Digital Input
Oscillator Synchronization. This pin can be synchronized to an external clock in the
range of 2.1 MHz. If not used, the pin must be connected to ground.
4
VIN
Analog / Power
Input
5
SW
Power Output
Power supply input for the PFET power stage, analog and digital blocks. The pin
must be decoupled to ground by a 10 mF ceramic capacitor.
Connection from power MOSFETs of output to the Inductor.
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2
NCV894530
PIN FUNCTION DESCRIPTION
Pin
Pin Name
Type
Description
6
NC
−
7
GND
Analog / Power
Ground
This pin is the GROUND reference for the analog section of the IC. The pin must be
connected to the system ground. Both pins must be connected together on PCB.
8
POR
Digital Output
Power On Reset. This is an open drain output. This output is shutting down when the
output voltage is less than 90% (typ) of their nominal values. An external pull−up
resistor should be connected between POR and VIN or VOUT depending on the
supplied device.
9
NC
−
10
GND
Analog Ground
EPAD
EPAD
Exposed Pad
Connect this pin to ground.
Connected to GND potential.
ABSOLUTE MAXIMUM RATINGS
(Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.)
Symbol
Min
Max
Unit
Vin
−0.3
6.0
V
SW Voltage
VSW
−0.3
6 V (or Vin + 0.3 V)*
V
Enable Input Voltage
VEN
−0.3
6 V (or Vin + 0.3 V)*
V
Rating
Input Voltage
Feedback Input Voltage
VFB
−0.3
6 V (or Vin + 0.3 V)*
V
Oscillator Synchronization Input Voltage
VSYNC
−0.3
6 V (or Vin + 0.3 V)*
V
Power On Reset Voltage
VPOR
−0.3
6 V (or Vin + 0.3 V)*
V
Junction Temperature
TJ
−40
150
°C
Storage Temperature
TSTG
−55
150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*Whichever is lower.
ESD CAPABILITY (Note 1)
Rating
Symbol
Min
Max
Unit
ESD Capability, Human Body Model
ESDHBM
−2
2
kV
ESD Capability, Machine Model
ESDMM
−200
200
V
Min
Max
Unit
1. This device series incorporates ESD portection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (JS−001−2010)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
LEAD SOLDERING TEMPERATURE AND MSL (Note 2)
Symbol
Rating
Moisture Sensitivity Level
MSL
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb−Free Versions
TSLD
3
per IPC
265 peak
°C
2. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, DFN10 (Note 3)
Thermal Resistance, Junction−to−Air
Symbol
Value
Unit
RqJA
40
°C/W
3. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate.
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3
NCV894530
ELECTRICAL CHARACTERISTICS
(2.7 V < VIN < 5.5 V, Min and Max values are valid for the temperature range −40°C ≤ TJ ≤ +150°C unless noted otherwise, and are
guaranteed by test, design or statistical correlation. Typical values are referenced to TA = +25°C)
Conditions
Symbol
Min
Typ
Max
Unit
Quiescent Current
SYNC = GND, VFB = 0 V, EN = 2 V,
(No Switching)
Iq
−
1.0
2.0
mA
Shutdown Current
EN = 0 V
IOFF
−
−
10
mA
Under Voltage Lockout
VIN falling
Rating
INPUT VOLTAGE
VUVLO
2.2
2.4
2.6
V
VUVLOH
−
100
150
mV
VILSYNC
VIHSYNC
−
1.2
−
−
0.4
−
ISYNC
2.0
−
50
mA
External Synchronization
fSYNC
1.8
−
2.7
MHz
SYNC Pulse Duty Ratio
DSYNC
−
50
−
%
VILEN
VIHEN
−
1.2
−
−
0.4
−
VEN = 5 V
IEN
2
−
50
mA
VOUT falling
VPORT
87
90
93
%Vout
Under Voltage Hysteresis
SYNC
SYNC Threshold Voltage
Logic Low
Logic High
SYNC Input Current
V
VSYNC = 5 V
ENABLE
Enable Threshold Voltage
Logic Low
Logic High
Enable Input Current
V
POWER ON RESET
Power On Reset Threshold
Power On Reset Hysteresis
POR Sink Current
VPORH
−
−
3.0
%Vout
VPOR = 0.4 V
IPOR
2.0
−
−
mA
TJ = −40°C to 125°C
VFB
0.591
(−1.5%)
0.6
0.609
(+1.5%)
V
Time from EN to 90% of VFB
tSS
1700
−
3200
ms
FSW
1.8
2.1
2.4
MHz
D
−
−
100
%
TONmin
−
−
80
ns
FEEDBACK VOLTAGE
Feedback Voltage
(Accuracy %)
Soft−Start Time
SWITCHING FREQUENCY
Switching Frequency
Duty Cycle
Minimum On Time
POWER SWITCHES
High−Side MOSFET On−Resistance
IRDS(on) = 0.6 A, VIN = 5 V,
TJ = 25°C
RDS(on)H
−
500
820
mW
Low−Side MOSFET On−Resistance
IRDS(on) = 0.6 A, VIN = 5 V,
TJ = 25°C
RDS(on)L
−
450
820
mW
High−Side MOSFET Leakage Current
VIN = 5 V, VSW = 0 V, VEN = 0 V
IDS(off)H
−
−
5.0
mA
Low−Side MOSFET Leakage Current
VSW = 5 V, VEN = 0 V
IDS(off)L
−
−
5.0
mA
Peak Inductor Current
(100% duty cycle)
IPK
1.9
−
2.5
A
Thermal Shutdown Temperature
Guaranteed by Design
TSD
150
170
190
°C
Thermal Shutdown Hysteresis
Guaranteed by Design
TSH
5.0
−
20
°C
CURRENT LIMIT PROTECTION
Current Limit
THERMAL SHUTDOWN
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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4
NCV894530
ISYNC, SYNC PULLDOWN CURRENT (mA)
TYPICAL CHARACTERISTICS CURVES
TJ = 25°C
EN1 = 1
2.25
2.20
2.15
2.10
2.05
2.00
IEN, ENABLE PULLDOWN CURRENT (mA)
2.5
3.0
3.5
4.0
4.5
5.0
5.5
TJ = 25°C
10
8
6
4
2
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5 5.0
VIN, INPUT VOLTAGE (V)
VSYNC, SYNC VOLTAGE (V)
Figure 4. Sync Pulldown Current vs. Sync
Voltage
12
1.2
TJ = 25°C
10
8
6
4
2
TJ = 25°C
1.0
0.8
0.6
0.4
0.2
0
0
0
1
3
2
4
2.5
5
3.0
3.5
4.0
4.5
5.0
VEN, ENABLE VOLTAGE (V)
VIN, INPUT VOLTAGE (V)
Figure 5. Enable Pulldown Current vs. Enable
Voltage
Figure 6. Standby Current vs. Input Voltage
2.20
2.15
2.10
2.05
2.00
−40
5.5
600.0
VREF, REFERENCE VOLTAGE (mV)
IPK, CURRENT LIMIT (A)
12
Figure 3. Switching Frequency vs. Input
Voltage
ISTBMAX, STANDBY CURRENT (mA)
FSW, SWITCHING FREQUENCY (MHz)
2.30
10
60
599.2
598.8
598.4
598.0
−40
160
110
599.6
10
60
110
160
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Current Limit vs. Temperature
Figure 8. Reference Voltage vs. Temperature
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NCV894530
ISYNC, SYNC PULLDOWN CURRENT (mA)
12.0
VEN = 5 V
11.5
11.0
10.5
10.0
9.5
9.0
8.5
8.0
−40
10
60
110
160
14
VSYNC = 5 V
12
10
8
6
4
2
0
−40
10
60
110
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 9. Enable Pulldown Current vs.
Temperature
Figure 10. Sync Pulldown Current vs.
Temperature
FSW, SWITCHING FREQUENCY (MHz)
IEN, ENABLE PULLDOWN CURRENT (mA)
TYPICAL CHARACTERISTICS CURVES
2.25
2.20
2.15
2.10
VIN = 5 V
EN1 = 1
2.05
−40
10
60
110
TJ, JUNCTION TEMPERATURE (°C)
Figure 11. Switching Frequency vs.
Temperature
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6
160
160
NCV894530
APPLICATION INFORMATION
PWM Operating Mode
re−enables and operates normally; however, if the excessive
load is still present the cycle begins again. Internal heat
dissipation is kept to a minimum as current will only flow
during the reset time of the protection circuitry. The hiccup
mode is continuous until the excessive load is removed. The
hiccup current limit in switching mode is 300 mA lower than
it in low dropout mode (100% duty cycle).
The output voltage of the device is regulated by
modulating the on−time pulse width of the main switch
PMOS at a fixed 2.1 MHz frequency (Figure 2).
The switching of the PMOS is controlled by a flip−flop
driven by the internal oscillator and a comparator that
compares the error signal from an error amplifier with the
sum of the sensed current signal and compensation ramp.
The driver switches ON and OFF the upper side transistor
and switches the lower side transistor in either ON state or
in current source mode.
At the beginning of each cycle, the main switch is turned
ON by the rising edge of the internal oscillator clock. The
inductor current ramps up until the sum of the current sense
signal and compensation ramp becomes higher than the
error amplifier’s voltage. Once this has occurred, the PWM
comparator resets the flip−flop, PMOS is turned OFF while
the synchronous switch NMOS is turned in its current source
mode. NMOS replaces the external Schottky diode to reduce
the conduction loss and improve the efficiency. To avoid
overall power loss, a certain amount of dead time is
introduced to ensure PMOS is completely turned OFF
before NMOS is being turned ON.
Low Dropout Operation
The NCV894530 offers a low input−to−output voltage
difference. The NCV894530 can operate at 100% duty
cycle.
In this mode the PMOS remains completely ON. The
minimum input voltage to maintain regulation can be
calculated as:
ǒ
V IN(min) + V OUT(max) ) I OUT ǒR DS(on) ) R INDUCTORǓ
Ǔ
(eq. 1)
VOUT: Output Voltage
IOUT: Max Output Current
RDS(on): P=Channel Switch RDS(on)
RINDUCTOR: Inductor Resistance (DCR)
Power On Reset
The Power On Reset (POR) is pulled low when the
converter is out of 90% of the regulation. When output is in
the range of regulation, a pull up resistor is needed to this
open drain output. This resistor may be connected to VIN or
VOUT if the device supplied cannot accept VIN on the IO
pins. POR is low when NCV894530 is off. Leave the POR
pin unconnected when not used.
Soft−Start
The NCV894530 uses soft start to limit the inrush current
when the device is initially powered up or enabled.
Soft−start is implemented by gradually increasing the
reference voltage until it reaches the full reference voltage.
During startup, a pulsed current source charges the internal
soft−start capacitor to provide gradually increasing
reference voltage. When the voltage across the capacitor
ramps up to the nominal reference voltage, the pulsed
current source will be switched off and the reference voltage
will switch to the regular reference voltage.
Frequency Synchronization
The NCV894530 can be synchronized with an external
clock signal by the SYNC pin (1.8 MHz − 2.7 MHz).
Thermal Shutdown
Over Current Hiccup Protection
Internal Thermal Shutdown circuitry is provided to
protect the integrated circuit in the event that the maximum
junction temperature is exceeded. If the junction
temperature exceeds TSD, the device shuts down. In this
mode all power transistors and control circuits are turned
off. The device restarts in soft−start after the temperature
drops below 130°C min. This feature is provided to prevent
catastrophic failures from accidental device overheating.
When the current through the inductor exceeds the current
limit the NCV894530 enters over current hiccup mode.
When an over current event is detected the NCV894530
disables the outputs and attempts to re−enable the outputs
after the hiccup time. The part remains off for the hiccup
time and then goes through the power on reset procedure. If
the excessive load has been removed then the output stage
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NCV894530
PACKAGE DIMENSIONS
DFN10, 3x3, 0.5P
CASE 485C
ISSUE C
D
PIN 1
REFERENCE
0.15 C
2X
EDGE OF PACKAGE
A
B
L1
ÇÇÇ
ÇÇÇ
ÇÇÇ
E
DETAIL A
Bottom View
(Optional)
EXPOSED Cu
TOP VIEW
MOLD CMPD
0.15 C
2X
(A3)
DETAIL B
0.10 C
A1
A
10X
SIDE VIEW
A1
D2
1
A3
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
DETAIL B
Side View
(Optional)
C
DETAIL A
e
L
ÉÉÉ
ÉÉÉ
SEATING
PLANE
0.08 C
10X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. TERMINAL b MAY HAVE MOLD COMPOUND
MATERIAL ALONG SIDE EDGE. MOLD
FLASHING MAY NOT EXCEED 30 MICRONS
ONTO BOTTOM SURFACE OF TERMINAL b.
6. DETAILS A AND B SHOW OPTIONAL VIEWS
FOR END OF TERMINAL LEAD AT EDGE OF
PACKAGE.
7. FOR DEVICE OPN CONTAINING W OPTION,
DETAIL B ALTERNATE CONSTRUCTION IS
NOT APPLICABLE.
SOLDERING FOOTPRINT*
5
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.18
0.30
3.00 BSC
2.40
2.60
3.00 BSC
1.70
1.90
0.50 BSC
0.19 TYP
0.35
0.45
0.00
0.03
2.6016
E2
10X
K
10
10X
0.10 C A B
0.05 C
1.8508
2.1746
6
3.3048
b
BOTTOM VIEW
NOTE 3
10X
0.5651
10X
0.5000 PITCH
0.3008
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
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ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCV894530/D
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