Digital Temperature Sensor with SST Interface

ADT7484A/ADT7486A
Digital Temperature Sensor
with SST Interface
The ADT7484A/ADT7486A are simple digital temperature sensors
for use in PC applications with a Simple Serial Transport (SST)
interface. These devices can monitor their own temperature as well as
the temperature of one (ADT7484A) or two (ADT7486A) remote
sensor diodes. The ADT7484A/ADT7486A are controlled by a single
SST bidirectional data line. The devices are fixed-address SST clients
where the target address is chosen by the state of the two address pins,
ADD0 and ADD1.
Features




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SOIC−8
CASE 751
1 On-Chip Temperature Sensor
1 or 2 Remote Temperature Sensors
Simple Serial Transport (SST) Interface Rev 1 Compliant
These Devices are Pb-Free and are RoHS Compliant
PIN ASSIGNMENTS
Applications
 Personal Computers
 Portable Personal Devices
 Industrial Sensor Nets
ADT7484A/
ADT7486A
ON-CHIP
TEMPERATURE
SENSOR
VCC
1
GND
2
D1+
3
D1−
4
VCC
1
GND
2
D1+
3
D1−
4
D2+
5
ADT7484A
(Top View)
ANALOG
MUX
DIGITAL MUX
D1−
D2+
A/D
CONVERTER
D2−
ADD0
6
RESERVED
5
ADD1
ADT7486A
(Top View)
9
ADD0
8
RESERVED
7
ADD1
6
D2−
8
T7484A
ALYWG
G
1
SST
INTERFACE
OFFSET
REGISTERS
SOIC−8
T7484A = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb-Free Package
ADDRESS
SELECTION
8
GND
SST
7
MARKING DIAGRAMS
REMOTE TEMP
VALUE REGISTER
VCC
8
10 SST
LOCAL TEMP
VALUE REGISTER
D1+
MSOP−10
CASE 846AC
MSOP−8
CASE 846AB
RESERVED
ADD0
ADD1 SST
ADT7486A ONLY
Figure 1. Functional Block Diagram
10
T20
AYWG
G
T22
AYWG
G
MSOP−8
1
MSOP−10
1
T2x = Specific Device Code
A
= Assembly Location
Y
= Year
W = Work Week
G
= Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
 Semiconductor Components Industries, LLC, 2012
July, 2012 − Rev. 5
1
Publication Order Number:
ADT7484A−86A/D
ADT7484A/ADT7486A
Table 1. ADT7484A PIN ASSIGNMENT
Pin No.
Mnemonic
1
VCC
Power Supply
Type
3.3 V 10%
Description
2
GND
Ground
Ground Pin
3
D1+
Analog Input
Positive Connection to Remote Temperature Sensor
4
D1−
Analog Input
Negative Connection to Remote Temperature Sensor
5
ADD1
Digital Input
SST Address Select
6
RESERVED
Reserved
Connect to Ground
7
ADD0
Digital Input
SST Address Select
8
SST
Digital Input/Output
SST Bidirectional Data Line
Table 2. ADT7486A PIN ASSIGNMENT
Pin No.
Mnemonic
Type
Description
1
VCC
Power Supply
3.3 V 10%.
2
GND
Ground
Ground Pin
3
D1+
Analog Input
Positive Connection to Remote 1 Temperature Sensor
4
D1−
Analog Input
Negative Connection to Remote 1 Temperature Sensor
5
D2+
Analog Input
Positive Connection to Remote 2 Temperature Sensor
6
D2−
Analog Input
Negative Connection to Remote 2 Temperature Sensor
7
ADD1
Analog Input
SST Address Select
8
RESERVED
Analog Input
Connect to Ground
9
ADD0
Digital Input
SST Address Select
10
SST
Digital Input/Output
SST Bidirectional Data Line
Table 3. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
Unit
Supply Voltage (VCC)
3.6
V
Voltage on Any Other Pin (Including SST Pin)
3.6
V
Input Current at Any Pin
5.0
mA
Package Input Current
20
mA
150
C
−65 to +150
C
Maximum Junction Temperature (TJ MAX)
Storage Temperature Range
Lead Temperature, Soldering
IR Reflow Peak Temperature
Lead Temperature, Soldering (10 sec)
C
260
300
ESD Rating
1,500
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: This device is ESD sensitive. Use standard ESD precautions when handling.
Table 4. THERMAL CHARACTERISTICS (Note 1)
Package Type
qJA
qJC
Unit
8-lead MSOP and 8-lead SOIC NB Packages (ADT7484A)
206
44
C/W
10-lead MSOP (ADT7486A)
206
44
C/W
1. qJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
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ADT7484A/ADT7486A
Table 5. ELECTRICAL CHARACTERISTICS
(TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted)
Parameter
Conditions
Min
Typ
Max
Unit
3.0
3.3
3.6
V
−
2.8
−
V
Continuous Conversions
−
3.8
5.0
mA
Local Sensor Accuracy
40C  TA  70C, VCC = 3.3 V 5%
−40C  TA  +100C
−
−
+1.0
−
1.75
4.0
C
Remote Sensor Accuracy
−40C  TD  +125C; TA = 25C; VCC = 3.3 V
−40C  TD  +125C; −40  TA  70C,
VCC = 3.3 V 5%
−40C  TD  +125C; −40  TA  +100C
−
−
−
+1.0
1.0
1.75
C
−
−
4.0
Low Level
Mid Level
High Level
−
−
−
12
80
204
−
−
−
mA
−
0.016
−
C
Power Supply
Supply Voltage, VCC
Undervoltage Lockout Threshold
Average Operating Supply
Current, IDD
Temperature-to-Digital Converter
Remote Sensor Source Current
Resolution
Series Resistance Cancellation
The ADT7484A and ADT7486A Cancel
1.5 kW in Series with the Remote Thermal
Diode
−
1.5
−
kW
Conversion Time
(Local Temperature) (Note 1)
Averaging Enabled
−
12
12
ms
Conversion Time
(Remote Temperature) (Note 1)
Averaging Enabled
−
−
38
ms
Total Monitoring Cycle Time
(Note 1)
Averaging Enabled
−
−
50
ms
2.3
−
−
V
−
−
0.8
V
−1.0
−
−
mA
−
−
1.0
mA
−
5.0
−
pF
Input High Voltage, VIH
1.1
−
−
V
Input Low Voltage, VIL
−
−
0.4
V
Digital Inputs (ADD0, ADD1)
Input High Voltage, VIH
Input Low Voltage, VIL
Input High Current, IIH
VIN = VCC
Input Low Current, IIL
VIN = 0
Pin Capacitance
Digital I/O (SST Pin)
Hysteresis (Note 1)
Between Input Switching Levels
Output High Voltage, VOH
ISOURCE = 6 mA (maximum)
−
150
−
mV
1.1
−
1.9
V
High Impedance State Leakage,
ILEAK
Device Powered On SST Bus;
VSST = 1.1 V, VCC = 3.3 V
−
−
1.0
mA
High Impedance State Leakage,
ILEAK
Device Unpowered On SST Bus;
VSST = 1.1 V, VCC = 0 V
−
−
10
mA
Signal Noise Immunity, VNOISE
Noise Glitches from
10 MHz to 100 MHz; Width Up to 50 ns
300
−
−
mV
p-p
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ADT7484A/ADT7486A
Table 5. ELECTRICAL CHARACTERISTICS (continued)
(TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted)
Parameter
Conditions
Min
Typ
Max
Unit
SST Timing
Bitwise Period, tBIT
High Level Time for Logic 1, tH1
(Note 2)
tBIT Defined in Speed Negotiation
High Level Time for Logic 0, tH0
(Note 2)
Time to Assert SST High for
Logic 1, tSU, HIGH
Hold Time, tHOLD (Note 3)
See SST Specification Rev 1.0
Stop Time, tSTOP
Device Responding to a Constant Low Level
Driven by Originator
Time to Respond After a Reset,
tRESET
Response Time to Speed
Negotiation After Powerup
Time after Powerup when Device Can
Participate in Speed Negotiation
0.495
−
500
ms
0.6  tBIT
0.75  tBIT
0.8  tBIT
ms
0.2  tBIT
0.25  tBIT
0.4  tBIT
ms
−
−
0.2  tBIT
ms
−
−
0.5  tBIT−M
ms
1.25  tBIT
2  tBIT
2  tBIT
ms
−
−
0.4
ms
−
500
−
ms
1. Guaranteed by design, not production tested.
2. Minimum and maximum bit times are relative to tBIT defined in the timing negotiation pulse.
3. Devices compatible with hold time specification as driven by SST originator.
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ADT7484A/ADT7486A
TYPICAL PERFORMANCE CHARACTERISTICS
1.55
3.56
3.54
750 W (~2 mA)
1.45
3.53
1.40
IDD (mA)
SST O/P (V)
DEV 3
3.55
1.50
270 W (~5.2 mA)
1.35
1.30
DEV 2
3.52
3.51
3.50
3.49
3.48
120 W (~10.6 mA)
DEV 1
3.47
1.25
3.46
1.20
2.6
2.8
3.0
3.2
3.4
3.45
−45 −25
3.6
−5
VCC (V)
7
1.55
6
1.50
5
HI SPEC (VCC = 3.0 V)
2
MEAN (VCC = 3.3 V)
0
0
20
95
115
1.35
120 W (~10.6 mA)
1.25
40
60
1.20
−50
80 100 120 140
0
50
100
150
TEMPERATURE (C)
TEMPERATURE (C)
Figure 4. Local Temperature Error
Figure 5. SST O/P Level vs. Temperature
3.9
TEMPERATURE ERROR (C)
7
3.7
DEV2
DEV3
IDD (mA)
75
270 W (~5.2 mA)
1.40
1.30
LO SPEC (VCC = 3.6 V)
−1
−60 −40 −20
55
750 W (~2 mA)
1.45
4
3
35
Figure 3. Supply Current vs. Temperature
SST O/P (V)
TEMPERATURE ERROR (C)
Figure 2. SST O/P Level vs. Supply Voltage
1
15
TEMPERATURE (C)
3.5
DEV1
3.3
3.1
2.9
2.65
2.85
3.05
3.25
3.45
6
5
4
3
2
1
0
−1
HI SPEC (VCC = 3.0 V)
MEAN (VCC = 3.3 V)
LO SPEC (VCC = 3.6 V)
−2
−60 −40 −20
3.65
VCC (V)
0
20
40
60
80 100 120 140
TEMPERATURE (C)
Figure 6. Supply Current vs. Voltage
Figure 7. Remote Temperature Error
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ADT7484A/ADT7486A
TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)
30
15
D+ TO GND
5
DEV2_EXT2
DEV3_EXT1
DEV3_EXT2
ERROR (C)
0
−5
−10
−15
DEV1_EXT1
DEV1_EXT2
DEV2_EXT1
D+ TO VCC
−20
DEV2_EXT2
DEV3_EXT1
DEV3_EXT2
−25
−30
20
15
0
20
40
60
80
60 mV
10
5
40 mV
0
−35
−40
100 mV
25
TEMPERATURE ERROR (C)
10
DEV1_EXT1
DEV1_EXT2
DEV2_EXT1
−5
10k
100
100k
Figure 8. Remote Temperature Error vs. PCB
Resistance
−10
15
−20
10
5
125 mV
0
−30
ERROR (C)
TEMPERATURE ERROR (C)
1G
0
EXT2
−40
EXT1
−50
−60
50 mV
−70
−5
−80
100k
1M
10M
100M
−90
1G
0
10
POWER SUPPLY NOISE FREQUENCY (Hz)
20
30
40
50
CAPACITANCE (nF)
Figure 10. Local Temperature Error vs. Power
Supply Noise
Figure 11. Remote Temperature Error
vs. Capacitance Between D1+ and D1−
7
5
40 mV
6
TEMPERATURE ERROR (C)
TEMPERATURE ERROR (C)
100M
Figure 9. Temperature Error vs. Common-Mode
Noise Frequency
20
5
4
3
20 mV
2
1
0
10k
10M
NOISE FREQUENCY (Hz)
RESISTANCE (MW)
−10
10k
1M
10 mV
100k
1M
10M
100M
4
3
2
1
0
50 mV
−1
−2
−3
10k
1G
125 mV
100k
1M
10M
100M
1G
POWER SUPPLY NOISE FREQUENCY (Hz)
NOISE FREQUENCY (Hz)
Figure 12. Temperature Error vs. Differential-Mode
Noise Frequency
Figure 13. Remote Temperature Error vs. Power
Supply Noise
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ADT7484A/ADT7486A
Product Description
low (GND), and floating. The address range for fixed
address, discoverable devices is 0x48 to 0x50.
The ADT7484A is a single remote temperature sensor,
and the ADT7486A is a dual temperature sensor for use in
PC applications. The ADT7484A/ADT7486A accurately
measure local and remote temperature and communicate
over a one-wire Simple Serial Transport (SST) bus interface.
Table 6. ADT7484A/ADT7486A SELECTABLE
ADDRESSES
SST Interface
Simple Serial Transport (SST) is a one-wire serial bus and
a communications protocol between components intended
for use in personal computers, personal handheld devices, or
other industrial sensor nets. The ADT7484A/ADT7486A
support SST specification Rev 1.
SST is a licensable bus technology from Analog Devices,
Inc., and Intel Corporation. To inquire about obtaining a
copy of the Simple Serial Transport Specification or an SST
technology license, please email Analog Devices, at
[email protected] or write to Analog Devices,
3550 North First Street, San Jose, CA 95134, Attention:
SST Licensing, M/S B7-24.
ADD1
ADD0
Address
Selected
Low (GND)
Low (GND)
0x48
Low (GND)
Float
0x49
Low (GND)
High
0x4A
Float
Low (GND)
0x4B
Float
Float
0x4C
Float
High
0x4D
High
Low (GND)
0x4E
High
Float
0x4F
High
High
0x50
Command Summary
Table 7 summarizes the commands supported by the
ADT7484A/ADT7486A devices when directed at the target
address selected by the fixed address pins. It contains the
command name, command code (CC), write data length
(WL), read data length (RL), and a brief description.
ADT7484A/ADT7486A Client Address
The client address for the ADT7484A/ADT7486A is
selected using the address pin. The address pin is connected
to a float detection circuit, which allows the ADT7484A/
ADT7486A to distinguish between three input states: high,
Table 7. COMMAND CODE SUMMARY
Command
Code, CC
Write Length,
WL
Read Length, RL
Ping()
0x00
0x00
0x00
Shows a nonzero FCS over the header if present.
GetIntTemp()
0x00
0x01
0x02
Shows the temperature of the device’s internal thermal
diode.
GetExt1Temp()
0x01
0x01
0x02
Shows the temperature of External Thermal Diode 1.
GetExt2Temp()
0x02
0x01
0x02
Shows the temperature of External Thermal Diode 2
(ADT7486A only).
GetAllTemps()
0x00
0x01
0x04 (ADT7484A)
0x06 (ADT7486A)
Shows a 4- or 6-byte block of data (ADT7484A:
GetIntTemp, GetExt1Temp; ADT7486A: GetIntTemp,
GetExt1Temp, GetExt2Temp).
SetExt1Offset()
0xe0
0x03
0x00
Sets the offset used to correct errors in External Diode 1.
GetExt1Offset()
0xe0
0x01
0x02
Shows the offset that the device is using to correct errors
in External Diode 1.
SetExt2Offset()
0xe1
0x03
0x00
Sets the offset used to correct errors in External Diode 2
(ADT7486A only).
GetExt2Offset()
0xe1
0x01
0x02
Shows the offset that the device is using to correct errors
in External Diode 2 (ADT7486A only).
ResetDevice()
0xf6
0x01
0x00
Functional reset. The ADT7484A/ADT7486A also
respond to this command when directed to the Target
Address 0x00.
GetDIB()
0xf7
0xf7
0x01
0x01
0x08
0x10
Shows information used by SW to identify the device’s
capabilities. Can be in 8- or 16-byte format.
Command
Description
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ADT7484A/ADT7486A
Command Code Details
Table 10. RESET DEVICE() COMMAND
ADT7484A/ADT7486A Device Identifier Block
The GetDIB() command retrieves the device identifier
block (DIB), which provides information to identify the
capabilities of the ADP7484A/ADT7486A. The data
returned can be in 8- or 16-byte format. The full 16-bytes of
DIB is detailed in Table 8. The 8-byte format involves the
first eight bytes described in this table. Byte-sized data is
returned in the respective fields as it appears in Table 8.
Word-sized data, including vendor ID, device ID, and data
values use little endian format, that is, the LSB is returned
first, followed by the MSB.
Name
Value
Description
0
Device
Capabilities
0xc0
Fixed Address Device
1
Version/
Revision
0x10
Meets Version 1 of
the SST Specification
2, 3
Vendor ID
00x11d4
Contains Company ID
Number in Little
Endian Format
4, 5
Device ID
0x7484
or
0x7486
Contains Device ID
Number in Little
Endian Format
6
Device
Interface
0x01
SST Device
7
Function
Interface
0x00
Reserved
8
Reserved
0x00
Reserved
9
Reserved
0x00
Reserved
10
Reserved
0x00
Reserved
11
Reserved
0x00
Reserved
12
Reserved
0x00
Reserved
13
Reserved
0x00
Reserved
14
Revision ID
0x05
Contains Revision ID
15
Client Device
Address
0x48 to
0x50
Read Length
0x00
0x01
0x00
0xf6
GetAllTemps()
The ADT7484A shows the local and remote temperatures
in a 4-byte block of data (internal temperature first, followed
by External Temperature 1) in response to a GetAllTemps()
command. The ADT7486A shows the local and remote
temperatures in a 6-byte block of data (internal temperature
first, followed by External Temperature 1 and External
Temperature 2) in response to this command.
SetExtOffset()
This command sets the offset that the ADT7484A/
ADT7486A will use to correct errors in the external diode.
The offset is set in little endian, 16-bit, twos complement
format. The maximum offset is 128C with +0.25C
resolution.
GetExtOffset()
This command causes the ADT7484A/ADT7486A to
show the offset that they are using to correct errors in the
external diode. The offset value is returned in little endian
format, that is, LSB before MSB.
ADT7484A/ADT7486A Response to Unsupported
Commands
A full list of command codes supported by the
ADT7484A/ADT7486A is given in Table 7. The offset
registers (Command Codes 0xe0 and 0xe1) are the only
registers that the user can write to. The other defined
registers are read only. Writing to Register Addresses 0x03
to 0xdf shows a valid FSC, but no action is taken by the
ADT7484A/ADT7486A. The ADT7484A/ADT7486A
show an invalid FSC if the user attempts to write to the
devices between Command Codes 0xe2 to 0xee and no data
is written to the device. These registers are reserved for the
manufacturer’s use only, and no data can be written to the
device via these addresses.
Table 9. PING() COMMAND
0x00
Device Address
FCS
Prompted by the GetExtTemp() command, the
ADT7484A/ADT7486A show the temperature of the
remote diode in little endian, 16-bit, twos complement
format. The ADT7484A/ADT7486A show 0x8000 in
response to this command if the external diode is an open or
short circuit.
The Ping() command verifies if a device is responding at
a particular address. The ADT7484A/ADT7486A show a
valid nonzero FCS in response to the Ping() command when
correctly addressed.
Write Length
Reset
Command
GetExtTemp()
Ping()
Device Address
Read
Length
The ADT7484A/ADT7486A show the local temperature
of the device in response to the GetIntTemp() command. The
data has a little endian, 16-bit, twos complement format.
Dependent on the
State of the Address
Pins
Target Address
Write
Length
GetIntTemp()
Table 8. DIB BYTE DETAILS
Byte
Target Address
FCS
ResetDevice()
This command resets the register map and conversion
controller. The reset command can be global or directed at
the client address of the ADT7484A/ADT7486A.
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ADT7484A/ADT7486A
Temperature Measurement
Figure 14 shows the input signal conditioning used to
measure the output of a remote temperature sensor. This
figure shows the remote sensor as a substrate transistor,
which is provided for temperature monitoring on some
microprocessors, but it could also be a discrete transistor. If
a discrete transistor is used, the collector is not grounded and
should be linked to the base. To prevent ground noise from
interfering with the measurement, the more negative
terminal of the sensor is not referenced to ground, but is
biased above ground by an internal diode at the D1− input.
If the sensor is operating in an extremely noisy environment,
C1 can be added as a noise filter. Its value should not exceed
1,000 pF.
To measure DVBE, the operating current through the
sensor is switched between three related currents. Figure 14
shows N1  I and N2  I as different multiples of the current
I. The currents through the temperature diode are switched
between I and N1  I, giving DVBE1, and then between I and
N2  I, giving DVBE2. The temperature can then be
calculated using the two DVBE measurements. This method
can also cancel the effect of series resistance on the
temperature measurement. The resulting DVBE waveforms
are passed through a 65 kHz low-pass filter to remove noise
and then through a chopper-stabilized amplifier to amplify
and rectify the waveform, producing a dc voltage
proportional to DVBE. The ADC digitizes this voltage, and
a temperature measurement is produced. To reduce the
effects of noise, digital filtering is performed by averaging
the results of 16 measurement cycles for low conversion
rates. Signal conditioning and measurement of the internal
temperature sensor is performed in the same manner.
The ADT7484A/ADT7486A each have two dedicated
temperature measurement channels: one for measuring the
temperature of an on-chip band gap temperature sensor, and
one for measuring the temperature of a remote diode, usually
located in the CPU or GPU.
The ADT7484A monitors one local and one remote
temperature channel, whereas the ADT7486A monitors one
local and two remote temperature channels. Monitoring of
each of the channels is done in a round-robin sequence. The
monitoring sequence is in the order shown in Table 11.
Table 11. TEMPERATURE MONITORING SEQUENCE
Channel
Number
Measurement
Conversion
Time (ms)
0
Local Temperature
12
1
Remote Temperature 1
38
2
Remote Temperature 2
(ADT7486A Only)
38
Temperature Measurement Method
A simple method for measuring temperature is to exploit
the negative temperature coefficient of a diode by measuring
the base-emitter voltage (VBE) of a transistor operated at
constant current. Unfortunately, this technique requires
calibration to null the effect of the absolute value of VBE,
which varies from device to device.
The technique used in the ADT7484A/ADT7486A
measures the change in VBE when the device is operated at
three different currents.
I
N1  I
N2  I
IBIAS
VCC
D+
REMOTE
SENSING
TRANSISTOR
VOUT+
To ADC
C1*
D−
VOUT−
BIAS
DIODE
LOW-PASS FILTER
fC = 65 kHz
*CAPACITOR C1 IS OPTIONAL. IT SHOULD ONLY BE USED IN NOISY ENVIRONMENTS.
Figure 14. Signal Conditioning for Remote Diode Temperature Sensors
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9
ADT7484A/ADT7486A
Reading Temperature Measurements
terminal of the sensor is not referenced to ground, but is
biased above ground by an internal diode at the D1− input.
The temperature measurement command codes are
detailed in Table 12. The temperature data returned is two
bytes in little endian format, that is, LSB before MSB. All
temperatures can be read together by using Command Code
0x00 with a read length of 0x04. The command codes and
returned data are described in Table 12.
2N3904
NPN
Table 12. TEMPERATURE CHANNEL COMMAND
CODES
Temp
Channel
Command
Code
2N3906
PNP
0x00
LSB, MSB
External 1
0x01
LSB, MSB
External 2
0x02
LSB, MSB
All Temps
0x00
Internal LSB, Internal MSB;
External 1 LSB, External 1 MSB;
External 2 LSB, External 2 MSB
D+
D−
ADT7484A/
ADT8486A
Returned Data
Internal
ADT7484A/
ADT7486A
D+
D−
Figure 15. Connections for NPN and PNP Transistors
The ADT7484A/ADT7486A show an external
temperature value of 0x8000 if the external diode is an open
or short circuit.
Layout Considerations
SST Temperature Sensor Data Format
Digital boards can be electrically noisy environments.
Take the following precautions to protect the analog inputs
from noise, particularly when measuring the very small
voltages from a remote diode sensor:
1. Place the device as close as possible to the remote
sensing diode. Provided that the worst noise
sources, such as clock generators, data/address
buses, and CRTs, are avoided, this distance can be
four to eight inches.
2. Route the D1+ and D1− tracks close together in
parallel with grounded guard tracks on each side.
Provide a ground plane under the tracks if
possible.
3. Use wide tracks to minimize inductance and
reduce noise pickup. A 5 mil track minimum width
and spacing is recommended.
The data for temperature is structured to allow values in
the range of 512C to be reported. Thus, the temperature
sensor format uses a twos complement, 16-bit binary value
to represent values in this range. This format allows
temperatures to be represented with approximately a
0.016C resolution.
Table 13. SST TEMPERATURE DATA FORMAT
Twos Complement
Temperature (5C)
MSB
LSB
−125
1110 0000
1100 0000
−80
1110 1100
0000 0000
−40
1111 0110
0000 0000
−20
1111 1011
0011 1110
−5
1111 1110
1100 0000
−1
1111 1111
1100 0000
0
0000 0000
0000 0000
+1
0000 0000
0100 0000
+5
0000 0001
0100 0000
+20
0000 0100
1100 0010
+40
0000 1010
0000 0000
+80
0001 0100
0000 0000
+125
0001 1111
0100 0000
GND
5 MIL
5 MIL
D+
5 MIL
5 MIL
D−
5 MIL
5 MIL
GND
5 MIL
Figure 16. Arrangement of Signal Tracks
Using Discrete Transistors
4. Try to minimize the number of copper/solder
joints, which can cause thermocouple effects.
Where copper/solder joints are used, make sure
that they are in both the D1+ and D1− paths and
are at the same temperature.
5. Thermocouple effects should not be a major
problem because 1C corresponds to about
240 mV, and thermocouple voltages are about
3 mV/C of the temperature difference. Unless
If a discrete transistor is used, the collector is not grounded
and should be linked to the base. If a PNP transistor is used,
the base is connected to the D1− input and the emitter is
connected to the D1+ input. If an NPN transistor is used, the
emitter is connected to the D1− input and the base is
connected to the D1+ input. Figure 17 shows how to connect
the ADT7484A/ADT7486A to an NPN or PNP transistor for
temperature measurement. To prevent ground noise from
interfering with the measurement, the more negative
http://onsemi.com
10
ADT7484A/ADT7486A
one-time calibration of the system, the offset caused by
system board noise can be calculated and nulled by
specifying it in the ADT7484A/ADT7486A. The offset is
automatically added to every temperature measurement.
The maximum offset is 128C with 0.25C resolution. The
offset format is the same as the temperature data format;
16-bit, twos complement notation, as shown in Table 13.
The offset should be programmed in little endian format,
that is, LSB before MSB. The offset value is also returned
in little endian format when read.
there are two thermocouples with a big
temperature differential between them,
thermocouple voltages should be much less than
200 mV.
6. Place a 0.1 mF bypass capacitor close to the
device.
7. If the distance to the remote sensor is more than
eight inches, the use of a twisted-pair cable is
recommended. This works for distances of about
6 feet to 12 feet.
8. For very long distances (up to 100 feet), use
shielded twisted-pair cables, such as Belden #8451
microphone cables. Connect the twisted-pair cable
to D1+ and D1− and the shield to GND, close to
the device. Leave the remote end of the shield
unconnected to avoid ground loops.
Application Schematics
VCC
ADT7484A
2N3904
or
CPU
THERMAL
DIODE
Because the measurement technique uses switched
current sources, excessive cable and/or filter capacitance
can affect the measurement. When usin g long cables, the
filter capacitor can be reduced or removed. Cable resistance
can also introduce errors. A 1ĂW series resistance introduces
about 0.5C error.
1
VCC
SST
8
2
GND
ADD0
7
3
D1+ RESERVED
6
4
D1−
ADD1
5
SST
Figure 17. ADT7484A Typical Application Schematic
VCC
ADT7486A
Temperature Offset
As CPUs run faster, it is more difficult to avoid high
frequency clocks when running the D1+ and D1− tracks
around a system board. Even when the recommended layout
guidelines are followed, there may still be temperature
errors, attributed to noise being coupled on to the D1+ and
D1− lines. High frequency noise generally has the effect of
producing temperature measurements that are consistently
too high by a specific amount. The ADT7484A/
ADT87486A have a temperature offset command code of
0xe0 through which a desired offset can be set. By doing a
2N3904
NPN
1
VCC
2
GND
ADD0
9
3
D1+ RESERVED
8
4
D1−
ADD1
7
5
D2+
D2−
6
SST
SST 10
CPU
THERMAL
DIODE
Figure 18. ADT7486A Typical Application Schematic
Table 14. ORDERING INFORMATION
Device Order Number*
Branding
Package Option
Package Type
Shipping†
ADT7484AARZ−REEL
−
R−8
SOIC−8 NB
2,500 Tape & Reel
ADT7484AARMZ−RL
T20
RM−8
8-lead MSOP
3,000 Tape & Reel
ADT7486AARMZ−RL
T22
RM−10
10-lead MSOP
3,000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*These are Pb-Free packages.
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11
ADT7484A/ADT7486A
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
12
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
ADT7484A/ADT7486A
PACKAGE DIMENSIONS
MSOP8
CASE 846AB−01
ISSUE O
D
HE
PIN 1 ID
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.
E
e
b 8 PL
0.08 (0.003)
M
T B
S
A
S
SEATING
−T− PLANE
0.038 (0.0015)
A
A1
MILLIMETERS
NOM
MAX
−−
1.10
0.08
0.15
0.33
0.40
0.18
0.23
3.00
3.10
3.00
3.10
0.65 BSC
0.40
0.55
0.70
4.75
4.90
5.05
DIM
A
A1
b
c
D
E
e
L
HE
MIN
−−
0.05
0.25
0.13
2.90
2.90
L
c
SOLDERING FOOTPRINT*
8X
1.04
0.041
0.38
0.015
3.20
0.126
6X
8X
4.24
0.167
0.65
0.0256
5.28
0.208
SCALE 8:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
13
INCHES
NOM
−−
0.003
0.013
0.007
0.118
0.118
0.026 BSC
0.021
0.016
0.187
0.193
MIN
−−
0.002
0.010
0.005
0.114
0.114
MAX
0.043
0.006
0.016
0.009
0.122
0.122
0.028
0.199
ADT7484A/ADT7486A
PACKAGE DIMENSIONS
MSOP10
CASE 846AC−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE
BURRS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. DIMENSION “B” DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846B−01 OBSOLETE. NEW STANDARD
846B−02
−A−
−B−
K
D 8 PL
0.08 (0.003)
PIN 1 ID
G
0.038 (0.0015)
−T− SEATING
PLANE
M
T B
S
A
S
C
H
L
J
MILLIMETERS
MIN
MAX
2.90
3.10
2.90
3.10
0.95
1.10
0.20
0.30
0.50 BSC
0.05
0.15
0.10
0.21
4.75
5.05
0.40
0.70
DIM
A
B
C
D
G
H
J
K
L
INCHES
MIN
MAX
0.114
0.122
0.114
0.122
0.037
0.043
0.008
0.012
0.020 BSC
0.002
0.006
0.004
0.008
0.187
0.199
0.016
0.028
SOLDERING FOOTPRINT*
10X
1.04
0.041
0.32
0.0126
3.20
0.126
8X
10X
4.24
0.167
0.50
0.0196
SCALE 8:1
5.28
0.208
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SST is a licensable bus technology from Analog Devices, Inc., and Intel Corporation.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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For additional information, please contact your local
Sales Representative
ADT7484A−86A/D
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