Crystal Oscillator Module, Voltage Controlled, PureEdge , 622.08 MHz LVPECL, 2.5 V / 3.3 V

NBVSBAXXX Series
2.5 V/3.3 V, LVPECL
Voltage-Controlled Crystal
Oscillator (VCXO)
PureEdget Product Series
The NBVSBAXXX series voltage−controlled crystal oscillator
(VCXO) devices are designed to meet today’s requirements for 2.5 V
and 3.3 V LVPECL clock generation applications. These devices use a
high Q fundamental mode crystal and Phase Locked Loop (PLL)
multiplier to provide a wide range of frequencies from 60 MHz to 700
MHz (factory configurable per user specifications) with a pullable
range of ±100 ppm and a frequency stability of ±50 ppm. The
silicon−based PureEdget products design provides users with
exceptional frequency stability and reliability. They produce an ultra
low jitter and phase noise LVPECL differential output.
The NBVSBAXXX series are members of ON Semiconductor’s
PureEdget clock family that provides accurate and precision clock
generation solutions.
Available in the industry standard 5.0 x 7.0 x 1.8 mm and in a new
3.2 x 5.0 x 1.2 mm SMD (CLCC) package on 16 mm tape and reel in
quantities of 1,000.
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MARKING DIAGRAM
6 PIN CLCC
LN SUFFIX
CASE 848AB
6 PIN CLCC
LU SUFFIX
CASE 848AC
NBVSBAXXX
XXX.XXXX
AWLYYWWG
NBVSBAXXX
XXX.XXXX
AWLYYWWG
Features
•
•
•
•
•
•
•
•
•
•
•
LVPECL Differential Output
Operating Range: 2.5 V ±5%, 3.3 V ±10%
Ultra Low Jitter and Phase Noise − 0.5 ps (12 kHz − 20 MHz)
Factory Configurable Frequencies from 60 MHz to 700 MHz (see
Standard Frequencies in the Ordering Information Table in page 6)
Pullable Range Minimum of ±100 ppm
Frequency Stability of ±50 ppm
Control Voltage with Positive Slope
Voltage Control Linearity of ±10%
Uses High Q Fundamental Mode Crystal
Hermetically Sealed Ceramic SMD Package
These Devices are Pb−Free and RoHS Compliant
NBVSBAXXX
XXX.XXXX
A
WL
YY
WW
G
= NBVSBAXXX (±50 ppm)
= Output Frequency (MHz)
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Applications
•
•
•
•
•
Networking
SONET
10 Gigabit Ethernet
Networking Base Stations
Broadcasting
© Semiconductor Components Industries, LLC, 2011
April, 2011 − Rev. 2
1
Publication Order Number:
NBVSBA011/D
NBVSBAXXX Series
VDD
6
CLK CLK
5 4
PLL
Clock
Multiplier
1
VC
2
OE
3
GND
Figure 1. Simplified Logic Diagram
VC
1
6
VDD
OE
2
5
CLK
GND
3
4
CLK
Figure 2. Pin Connections (Top View)
Table 1. PIN DESCRIPTION
Pin No.
Symbol
I/O
Description
1
VC (Note 1)
Analog Input
Analog control voltage input pin that adjusts output oscillation frequency. f0 =VC = 1.65 V
2
OE
LVTTL/LVCMOS
Control Input
3
GND
Power Supply
4
CLK
LVPECL Output
Non−Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to
VTT = VDD − 2 V.
5
CLK
LVPECL Output
Inverted Clock Output. Typically loaded with 50 W receiver termination resistor
to VTT = VDD − 2 V.
6
VDD
Power Supply
Output Enable Pin. When left floating pin defaults to logic HIGH and output is active.
See OE pin description Table 2.
Ground at 0 V. Electrical and Case Ground.
Positive Power Supply Voltage. Voltage should not exceed 2.5 V ±5% and 3.3 V ±10%.
1. Control voltage has a positive slope with a linearity of ±10%; VC = 1.65 V ± 1 V.
Table 2. OUTPUT ENABLE TRI−STATE FUNCTION
OE Pin
Output Pins
Open
Active
HIGH Level
Active
LOW Level
High Z
Table 3. ATTRIBUTES
Characteristic
Value
Internal Default State Resistor
ESD Protection
170 kW
Human Body Model
Machine Model
2 kV
200 V
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
2. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
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2
NBVSBAXXX Series
Table 4. MAXIMUM RATINGS
Symbol
Parameter
VDD
Positive Power Supply
VIN
Control Input (VC and OE)
Iout
LVPECL Output Current
TA
Condition 1
Condition 2
Rating
Units
4.6
V
GND = 0 V
VIN ≤ VDD + 200 mV
VIN ≥ GND − 200 mV
V
Continuous
Surge
25
50
mA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−55 to +120
°C
Tsol
Wave Solder
260
°C
See Figure 4
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 5. DC CHARACTERISTICS (VDD = 2.5 V ± 5%; 3.3 V ± 10%, GND = 0 V, TA = −40°C to +85°C) (Note 3)
Symbol
Characteristic
Conditions
Min.
Typ.
90
Max.
Units
IDD
Power Supply Current
110
mA
VIH
Input HIGH Voltage
OE
2000
VDD
mV
VIL
Input LOW Voltage
OE
GND − 200
800
mV
IIH
Input HIGH Current
OE
−100
+100
mA
IIL
Input LOW Current
OE
−100
+100
mA
VDD−945
mV
VDD−1600
mV
VOH
Output HIGH Voltage
VDD−1195
VOL
Output LOW Voltage
VDD−1945
VOUTPP
Output Voltage Amplitude
700
mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Measurement taken with outputs terminated with 50 W to VDD − 2.0 V. See Figure 3.
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3
NBVSBAXXX Series
Table 6. AC CHARACTERISTICS (VDD = 2.5 ±5%, VDD = 3.3 ±10%, GND = 0 V, TA = -40°C to +85°C)
Symbol
Characteristic
Conditions
Min.
Typ.
fCLKOUT
Output Clock Frequency
NBVSBA011
122.88
NBVSBA027
148.50
NBVSBA018
155.52
NBVSBA017
156.25
NBVSBA015
200.00
NBVSBA024
622.08
NBVSBA026
644.53
NBVSBA041
693.48
NBVSBA037
707.35
Max.
Units
MHz
Df
Frequency Stability
(Note 5)
±50
ppm
tjit(f)
RMS Phase Jitter
12 kHz to 20 MHz
0.5
0.9
ps
tjitter
Cycle to Cycle, RMS
1000 Cycles
2
8
ps
Cycle to Cycle, Peak-to-Peak
1000 Cycles
10
30
ps
Period, RMS
10,000 Cycles
1
4
ps
Period, Peak-to-Peak
10,000 Cycles
6
20
ps
tOE/OD
Output Enable/Disable Time
FP
Crystal Pullability (Note 4)
0 ≤ VC ≤ 3.3 V
±100
200
ppm
VC(bw)
Control Voltage Bandwidth
- 3 dB
20
KHz
tDUTY_CYCLE
Output Clock Duty Cycle
(Measured at Cross Point)
tR
45
ns
50
55
%
Output Rise Time (20% and 80%)
245
400
ps
tF
Output Fall Time (80% and 20%)
245
400
ps
tstart
Start-up Time
1
5
ms
1st Year
3
ppm
Every Year After 1st
1
Aging
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. Gain transfer is positive with a rate of 130 ppm/V.
5. Parameter guarantees 10 years of aging. Includes initial stability at 25°C, shock, vibration and first year aging.
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4
NBVSBAXXX Series
Table 7. PHASE NOISE PERFORMANCE
011
027
018
017
015
122.88
MHZ
148.50
MHz
155.52
MHz
156.25
MHZ
200.00
MHz
Units
Parameter
Characteristic
Condition
fNOISE
Output Phase−Noise Performance
100 Hz offset
−90
−90
−90
−90
−87
dBc/Hz
1 kHz offset
−118
−118
−116
−116
−114
dBc/Hz
10 kHz offset
−127
−127
−126
−126
−125
dBc/Hz
100 kHz offset
−127
−127
−126
−126
−125
dBc/Hz
1 MHz offset
−134
−134
−134
−134
−132
dBc/Hz
10 MHz offset
−160
−160
−160
−160
−158
dBc/Hz
Table 8. PHASE NOISE PERFORMANCE (continued)
024
026
041
037
644.53
MHZ
693.48
MHZ
707.35
MHZ
Units
Parameter
Characteristic
Condition
622.08
MHZ
fNOISE
Output Phase−Noise Performance
100 Hz offset
−80
−86
−78
−78
dBc/Hz
1 kHz offset
−106
−107
−105
−105
dBc/Hz
10 kHz offset
−117
−116
−115
−115
dBc/Hz
100 kHz offset
−117
−116
−115
−115
dBc/Hz
1 MHz offset
−122
−125
−124
−124
dBc/Hz
10 MHz offset
−150
−150
−149
−149
dBc/Hz
Table 9. RELIABILITY COMPLIANCE
Parameter
Standard
Method
Shock
Mechanical
MIL−STD−833, Method 2002, Condition B
Solderability
Mechanical
MIL−STD−833, Method 2003
Vibration
Mechanical
MIL−STD−833, Method 2007, Condition A
Solvent Resistance
Mechanical
MIL−STD−202, Method 215
Thermal Shock
Environment
MIL−STD−833, Method 1011, Condition A
Moisture Level Sensitivity
Environment
MSL1 260°C per IPC/JEDEC J−STD−020D
NBVSXXXXX
Q
Zo = 50 W
IN
Receiver
Device
Driver
Device
Q
IN
Zo = 50 W
50 W
50 W
VTT
VTT = VDD − 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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5
NBVSBAXXX Series
temp. 260°C
20 − 40 sec. max.
peak
Temperature (°C)
260
6°C/sec. max.
3°C/sec. max.
217
ramp−up
175
150
cooling
pre−heat
reflow
60180 sec.
Time
60150 sec.
Figure 4. Recommended Reflow Soldering Profile
Table 10. ORDERING INFORMATION
Device
Output Frequency (MHz)
Package
Shipping†
5.0 x 7.0 x 1.8 mm
NBVSBA011LN1TAG
122.88
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA027LN1TAG
148.50
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA018LN1TAG
155.52
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA017LN1TAG
156.25
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA015LN1TAG
200.00
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA024LN1TAG
622.08
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA026LN1TAG
644.53
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA037LN1TAG
707.35
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA041LN1TAG
693.48
CLCC−6, Pb−Free
1000 / Tape & Reel
5.0 x 7.0 x 1.8 mm
NBVSBA011LNHTAG
122.88
CLCC−6, Pb−Free
100 / Tape & Reel
NBVSBA027LNHTAG
148.50
CLCC−6, Pb−Free
100 / Tape & Reel
NBVSBA018LNHTAG
155.52
CLCC−6, Pb−Free
100 / Tape & Reel
NBVSBA017LNHTAG
156.25
CLCC−6, Pb−Free
100 / Tape & Reel
NBVSBA015LNHTAG
200.00
CLCC−6, Pb−Free
100 / Tape & Reel
NBVSBA024LNHTAG
622.08
CLCC−6, Pb−Free
100 / Tape & Reel
NBVSBA026LNHTAG
644.53
CLCC−6, Pb−Free
100 / Tape & Reel
NBVSBA037LNHTAG
707.35
CLCC−6, Pb−Free
100 / Tape & Reel
NBVSBA041LNHTAG
693.48
CLCC−6, Pb−Free
100 / Tape & Reel
3.2 x 5.0 x 1.2 mm
NBVSBA011LU1TAG*
122.88
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA027LU1TAG*
148.50
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA018LU1TAG*
155.52
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA017LU1TAG*
156.25
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA015LU1TAG*
200.00
CLCC−6, Pb−Free
1000 / Tape & Reel
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NBVSBAXXX Series
Table 10. ORDERING INFORMATION
Device
Output Frequency (MHz)
Package
Shipping†
3.2 x 5.0 x 1.2 mm
NBVSBA024LU1TAG*
622.08
CLCC−6, Pb−Free
1000 / Tape & Reel
NBVSBA026LU1TAG*
644.53
CLCC−6, Pb−Free
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and Reel Packaging
Specification Brochure, BRD8011/D.
*Consult factory for availability.
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NBVSBAXXX Series
PACKAGE DIMENSIONS
6 PIN CLCC, 7x5, 2.54P
CASE 848AB−01
ISSUE O
A
D
4X
0.15 C
E2
TERMINAL 1
INDICATOR
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
B
D1
DIM
A
A1
A2
A3
b
D
D1
D2
D3
E
E1
E2
E3
e
L
R
E
E1
D2
TOP VIEW
A3
A2
0.10 C
A
SIDE VIEW
A1
C
6.17
6.66
4.37
4.65
1.17
SOLDERING FOOTPRINT*
2
3
e
6X
R
1.50
E3
0.10 C A B
0.05 C
0.08
1.30
MILLIMETERS
NOM
MAX
1.80
1.90
0.70 REF
0.36 REF
0.10
0.12
1.40
1.50
7.00 BSC
6.20
6.23
6.81
6.96
5.08 BSC
5.00 BSC
4.40
4.43
4.80
4.95
3.49 BSC
2.54 BSC
1.27
1.37
0.70 REF
SEATING
PLANE
D3
1
MIN
1.70
6X
b
6
5
4
6X
L
BOTTOM VIEW
2.54
PITCH
5.06
6X
1.50
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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8
NBVSBAXXX Series
PACKAGE DIMENSIONS
6 PIN CLCC, 5x3.2, 1.27P
CASE 848AC−01
ISSUE O
A
D
D1
PIN ONE
REFERENCE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
B
DIM
A
A1
A3
b
D
D1
E
E1
E2
e
L
E1 E
2X
0.15 C
2X
0.15 C
TOP VIEW
0.10 C
A
A1
METALLIZED
ZONES
A3
C
MILLIMETERS
MIN
MAX
1.05
1.35
0.35
0.65
0.90 REF
0.50
0.80
5.00 BSC
4.25
4.55
3.20 BSC
2.45
2.75
2.90
3.20
1.27 BSC
0.75
1.05
SOLDERING FOOTPRINT*
SEATING
PLANE
6X
SIDE VIEW
0.74
6X
1.13
1
E2
3.30
6X
L
6X
b
e
0.10 C A B
BOTTOM VIEW
0.05 C
PACKAGE
OUTLINE
1
1.27
PITCH
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NBVSBA011/D
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