Features • Fast read access time – 70ns • Dual voltage range operation • • • • • • • • • – Unregulated battery power supply range, 2.7V to 3.6V, or – Standard power supply range, 5V 10% Pin compatible with JEDEC standard Atmel® AT27C512R Low-power CMOS operation – 20µA max standby (less than 1µA, typical) for VCC = 3.6V – 29mW max active at 5MHz for VCC = 3.6V JEDEC standard surface mount packages – 32-lead PLCC – 28-lead TSOP High-reliability CMOS technology – 2,000V ESD protection – 200mA latchup immunity Rapid programming algorithm – 100µs/byte (typical) CMOS- and TTL-compatible inputs and outputs – JEDEC standard for LVTTL and LVBO Integrated product identification code Industrial temperature range Green (Pb/halide-free) packaging option 1. Description 512K (64K x 8) Unregulated Battery Voltage, Highspeed, One-time Programmable, Read-only Memory Atmel AT27BV512 Not recommended for new designs The Atmel AT27BV512 is a high-performance, low-power, low-voltage, 524,288-bit, onetime programmable, read-only memory (OTP EPROM) organized as 64K by 8 bits. It requires only one supply in the range of 2.7 to 3.6V in normal read mode operation, making it ideal for fast, portable systems using either regulated or unregulated battery power. The Atmel innovative design techniques provide fast speeds that rival 5V parts, while keeping the low power consumption of a 3V supply. At VCC = 2.7V, any byte can be accessed in less than 70ns. With a typical power consumption of only 18mW at 5MHz and VCC = 3V, the AT27BV512 consumes less than one-fifth the power of a standard 5V EPROM. Standby mode supply current is typically less than 1µA at 3V. The AT27BV512 simplifies system design and stretches battery lifetime even further by eliminating the need for power supply regulation. The AT27BV512 is available in industry-standard, JEDEC-approved, one-time programmable (OTP) PLCC and plastic TSOP packages. All devices feature two-line control (CE, OE) to give designers the flexibility to prevent bus contention. The AT27BV512 operating with VCC at 3.0V produces TTL-level outputs that are compatible with standard TTL logic devices operating at VCC = 5.0V. At VCC = 2.7V, the part is compatible with JEDEC-approved, low-voltage battery operation (LVBO) interface specifications. The device is also capable of standard, 5V operation, making it ideally suited for dual supply range systems or card products that are pluggable in both 3V and 5V hosts. The Atmel AT27BV512 has additional features to ensure high quality and efficient production use. The rapid programming algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100µs/byte. The 0602F–EPROM–4/11 integrated product identification code electronically identifies the device and manufacturer. This feature is used by industrystandard programming equipment to select the proper programming algorithms and voltages. The AT27BV512 programs in exactly the same way as a standard, 5V Atmel AT27C512R, and uses the same programming equipment. Pin configurations Addresses O0 - O7 Outputs CE Chip enable OE/VPP Output enable/Program supply NC No connect A7 A12 A15 NC VCC A14 A13 A0 - A15 28-lead TSOP ( Type 1) Top view 32-lead PLCC Top view A6 A5 A4 A3 A2 A1 A0 NC O0 4 3 2 1 32 31 30 Function 5 6 7 8 9 10 11 12 13 29 28 27 26 25 24 23 22 21 14 15 16 17 18 19 20 Pin name A8 A9 A11 NC OE/VPP A10 CE O7 O6 OE/VPP A11 A9 A8 A13 A14 VCC A15 A12 A7 A6 A5 A4 A3 22 23 24 25 26 27 28 1 2 3 4 5 6 7 21 20 19 18 17 16 15 14 13 12 11 10 9 8 A10 CE O7 O6 O5 O4 O3 GND O2 O1 O0 A0 A1 A2 O1 O2 GND NC O3 O4 O5 2. Note: 3. PLCC package pins 1 and 17 are “don’t connect.” System considerations Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. Figure 3-1. 2 Block diagram Atmel AT27BV512 0602F–EPROM–4/11 Atmel AT27BV512 4. Absolute maximum ratings* *NOTICE: Temperature under bias . . . . . . . . . . . . . . . -40°C to +85°C Stresses beyond those listed under “Absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Storage temperature . . . . . . . . . . . . . . . . .-65°C to +125°C Voltage on any pin with respect to ground . . . . . . . . . . . . . . . . . . . -2.0V to +7.0V(1) Voltage on A9 with respect to ground . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1) VPP supply voltage with respect to ground . . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1) Note: 5. 1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is VCC + 0.75V DC, which may be exceeded if certain precautions are observed (consult application notes), and which may overshoot to +7.0V for pulses of less than 20ns. DC and AC characteristics Table 5-1. Operating modes Mode/Pin Read(2) (2) Output disable CE OE/VPP Ai VCC Outputs VIL VIL Ai VCC DOUT VCC High Z (1) VIL VIH VIH X X VCC High Z Rapid program VIL VPP Ai VCC DIN PGM verify(3) VIL VIL Ai VCC DOUT (3) VIH VPP X VCC High Z VCC Identification code (2) Standby (3) PGM inhibit Product identification(3)(5) Notes: X VH(4) VIL VIL A9 = A0 = VIH or VIL A1 - A15 = VIL 1. X can be VIL or VIH. 2. Read, output disable, and standby modes require 2.7V VCC 3.6V or 4.5V VCC 5.5V. 3. Refer to programming characteristics. Programming modes require VCC = 6.5V. 4. VH = 12.0 0.5V. 5. Two identifier bytes may be selected. All Ai inputs are held low (VIL) except A9, which is set to VH, and A0, which is toggled low (VIL) to select the manufacturer’s identification byte and high (VIH) to select the device code byte. Table 5-2. DC and AC operating conditions for read operation Atmel AT27BV512-70 Operating temperature (case) -40°C - 85°C 2.7V to 3.6V VCC power supply 5V 10% 3 0602F–EPROM–4/11 Table 5-3. Symbol DC and operating characteristics for read operation Parameter Condition Min Max Units VCC = 2.7V to 3.6V ILI ILO IPP1 (2) Input load current VIN = 0V to VCC 1 µA Output leakage current VOUT = 0V to VCC 5 µA VPP(1) VPP = VCC 10 µA ISB1 (CMOS), CE = VCC 0.3V 20 µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 100 µA 8 mA read/standby current ISB VCC(1) standby current ICC VCC active current VIL Input low voltage VIH Input high voltage VOL VOH Output low voltage Output high voltage f = 5MHz, IOUT = 0mA, CE = VIL, VCC = 3.6V VCC = 3.0 to 3.6V -0.6 0.8 V VCC = 2.7 to 3.6V -0.6 0.2 x VCC V VCC = 3.0 to 3.6V 2.0 VCC + 0.5 V VCC = 2.7 to 3.6V 0.7 x VCC VCC + 0.5 V IOL = 2.0mA 0.4 V IOL = 100µA 0.2 V IOL = 20µA 0.1 V IOH = -2.0mA 2.4 V IOH = -100µA VCC - 0.2 V IOH = -20µA VCC - 0.1 V VCC = 4.5V to 5.5V ILI ILO IPP1 (2) Input load current VIN = 0V to VCC 1 µA Output leakage current VOUT = 0V to VCC 5 µA VPP(1) VPP = VCC 10 µA ISB1 (CMOS), CE = VCC 0.3V 100 µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA f = 5MHz, IOUT = 0mA, CE = VIL 20 mA read/standby current ISB VCC(1) standby current ICC VCC active current VIL Input low voltage -0.6 0.8 V VIH Input high voltage 2.0 VCC + 0.5 V VOL Output low voltage IOL = 2.1mA 0.4 V VOH Output high voltage IOH = -400µA Notes: 2.4 V 1. VCC must be applied simultaneously with or before OE/VPP, and removed simultaneously with or after OE/VPP. 2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP. 4 Atmel AT27BV512 0602F–EPROM–4/11 Atmel AT27BV512 Table 5-4. AC characteristics for read operation Atmel AT27BV512-70 Symbol Parameter Condition tACC(3) tCE Min Max Units Address to output delay CE = OE/VPP = VIL 70 ns (2) CE to output delay OE/VPP = VIL 70 ns (2)(3) OE/VPP to output delay CE = VIL 50 ns 40 ns tOE tDF(4)(5) OE/VPP or CE high to output float, whichever occurred first tOH Output hold from address, CE or OE/VPP, whichever occurred first Figure 5-1. Notes: 0 ns AC waveforms for read operation(1) 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. 2. OE/VPP may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3. OE/VPP may be delayed up to tACC - tOE after the address is valid without impact on tACC. 4. This parameter is only sampled, and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. 6. When reading an Atmel AT27BV256, a 0.1µF capacitor is required across VCC and ground to suppress spurious voltage transients. Figure 5-2. Input test waveform and measurement level tR, tF < 20 ns (10% to 90%) 5 0602F–EPROM–4/11 Figure 5-3. Output test load Note: CL = 100pF including jig capacitance. Table 5-5. Pin capacitance f = 1MHz, T = 25°C(1) Symbol Typ Max Units Conditions CIN 4 6 pF VIN = 0V COUT 8 12 pF VOUT = 0V Note: 1. Typical values for nominal supply voltage. This parameter is only sampled, and is not 100% tested. Figure 5-4. Notes: Programming waveforms(1) 1. The input timing reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device, but must be accommodated by the programmer. 3. When programming the Atmel AT27BV512, a 0.1µF capacitor is required across VPP and ground to suppress spurious voltage transients. 6 Atmel AT27BV512 0602F–EPROM–4/11 Atmel AT27BV512 Table 5-6. DC programming characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V Limits Symbol Parameter Test conditions ILI Input load current VIN = VIL, VIH VIL Input low level VIH Input high level VOL Output low voltage IOL = 2.1mA VOH Output high voltage IOH = -400µA ICC2 VCC supply current (program and verify) IPP2 OE/VPP current VID A9 product identification voltage Table 5-7. Min Max Units 10 µA -0.6 0.8 V 2.0 VCC + 0.5 V 0.4 V 2.4 V CE = VIL 11.5 25 mA 25 mA 12.5 V Max Units AC programming characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V Limits (1) Symbol Parameter Test conditions tAS Address setup time tOES OE/VPP setup time tOEH OE/VPP hold time tDS Data setup time tAH Address hold time tDH Data hold time µs 2 µs 2 µs Input pulse levels: 0.45V to 2.4V 0 µs 2 µs 0 Input timing reference level: 0.8V to 2.0V VCC setup time (3) 130 µs 95 (2) tDV Data valid from CE tVR OE/VPP recovery time tPRT OE/VPP pulse rise time during programming ns 2 CE program pulse width tPW µs 2 CE high to output float delay tVCS 2 Input rise and fall times: (10% to 90) 20 ns (2) tDFP Notes: Min Output timing reference level: 0.8V to 2.0V 105 µs 1 µs 2 µs 50 ns 1. VCC must be applied simultaneously with or before OE/VPP and removed simultaneously with or after OE/VPP. 2. This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no longer driven. See timing diagram. 3. Program pulse width tolerance is 100µsec5%. Table 5-8. The Atmel AT27BV512 integrated product identification code(1) Pins A0 O7 O6 O5 O4 O3 O2 O1 O0 Hex Data Manufacturer 0 0 0 0 1 1 1 1 0 1E Device Type 1 0 0 0 0 1 1 0 1 0D Codes Note: 1. The Atmel AT27BV512 has the same product identification code as the Atmel AT27C512R. Both are programming compatible. 7 0602F–EPROM–4/11 6. Rapid programming algorithm A 100µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and OE/VPP is raised to 13.0V. Each address is first programmed with one 100µs CE pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. OE/VPP is then lowered to VIL and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails. Figure 6-1. 8 Rapid programming algorithm Atmel AT27BV512 0602F–EPROM–4/11 Atmel AT27BV512 7. Ordering Information Green package option (Pb/halide-free) ICC (mA) tACC (ns) Active Standby 70 8 0.02 Atmel ordering code Package Operation range AT27BV512-70JU AT27BV512-70TU 32J 28T Industrial (-40°C to 85°C) Package type 32J 32-lead, plastic, J-leaded chip carrier (PLCC) 28T 28-lead, plastic, thin, small outline package (TSOP) 9 0602F–EPROM–4/11 8. Packaging information 32J – PLCC 1.14(0.045) X 45° PIN NO. 1 IDENTIFIER 1.14(0.045) X 45° 0.318(0.0125) 0.191(0.0075) E1 E2 B1 E B e A2 D1 A1 D A 0.51(0.020)MAX 45° MAX (3X) COMMON DIMENSIONS (Unit of measure = mm) D2 Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.10mm) maximum. SYMBOL MIN NOM MAX A 3.175 – 3.556 A1 1.524 – 2.413 A2 0.381 – – D 12.319 – 12.573 D1 11.354 – 11.506 D2 9.906 – 10.922 E 14.859 – 15.113 E1 13.894 – 14.046 E2 12.471 – 13.487 B 0.660 – 0.813 B1 0.330 – 0.533 e NOTE Note 2 Note 2 1.270 TYP 10/04/01 Package Drawing Contact: [email protected] 10 TITLE 32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) DRAWING NO. 32J REV. B Atmel AT27BV512 0602F–EPROM–4/11 Atmel AT27BV512 28T – TSOP PIN 1 0º ~ 5º c Pin 1 Identifier Area D1 D L b e L1 A2 E A GAGE PLANE SEATING PLANE COMMON DIMENSIONS (Unit of Measure = mm) A1 Notes: 1. This package conforms to JEDEC reference MO-183 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion on E is 0.15mm per side and on D1 is 0.25 mm per side. 3. Lead coplanarity is 0.10mm maximum SYMBOL MIN NOM MAX A – – 1.20 A1 0.05 – 0.15 NOTE A2 0.90 1.00 1.05 D 13.20 13.40 13.60 D1 11.70 11.80 11.90 Note 2 Note 2 E 7.90 8.00 8.10 L 0.50 0.60 0.70 L1 0.25 BASIC b 0.17 0.22 0.27 c 0.10 – 0.21 e 0.55 BASIC 12/06/02 Package Drawing Contact: [email protected] TITLE 28T, 28-lead (8 x 13.4mm) Plastic Thin Small Outline Package, Type I (TSOP) DRAWING NO. 28T REV. C 11 0602F–EPROM–4/11 9. 12 Revision history Doc. Rev. Date 0602F 04/2011 0602E 12/2007 Comments Remove SOIC package Atmel AT27BV512 0602F–EPROM–4/11 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: (+1) (408) 441-0311 Fax: (+1) (408) 487-2600 www.atmel.com Atmel Asia Limited Unit 01-5 & 16, 19F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369 Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 JAPAN Tel: (+81) (3) 3523-3551 Fax: (+81) (3) 3523-7581 © 2011 Atmel Corporation. All rights reserved. / Rev.: 0602F–EPROM–4/11 Atmel®, logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. 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