AT25010B/020B/040B Automotive - Complete

Atmel AT25010B, AT25020B, and AT25040B
SPI Automotive Temperature Serial EEPROMs
1K (128 x 8), 2K (256 x 8), 4k (512 x 8)
DATASHEET
Features
 Serial Peripheral Interface (SPI) compatible
 Supports SPI Modes 0 (0,0) and 3 (1,1)

Datasheet describes Mode 0 operation
 Medium-voltage and standard-voltage operation

VCC = 2.5V to 5.5V
 Extended temperature range –40C to 125C
 5MHz clock rate
 8-byte page mode
 Block write protection

Protect 1/4, 1/2, or entire array
 Write Protect (WP) pin and Write Disable instructions for both hardware and
software data protection
 Self-timed write cycle (5ms max)
 High reliability


Endurance: one million Write cycles
Data retention: 100 years
 8-lead JEDEC SOIC and 8-lead TSSOP packages
Description
The Atmel® AT25010B/020B/040B provides 1024/2048/4096 bits of Serial
Electrically Erasable Programmable Read-Only Memory (EEPROM) organized as
128/256/512 words of eight bits each. The device is optimized for use in many
automotive applications where low-power and low-voltage operation are essential.
AT25010B/020B/040B is available in space-saving 8-lead JEDEC SOIC and
8-lead TSSOP packages.
AT25010B/020B/040B is enabled through the Chip Select pin (CS) and accessed via a
3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial
Clock (SCK). All programming cycles are completely self-timed, and no separate erase
cycle is required before Write.
Block Write Protection is enabled by programming the status register with one of four
blocks of Write Protection. Separate Program Enable and Program Disable instructions
are provided for additional data protection. Hardware data protection is provided via the
WP pin to protect against inadvertent write attempts. The HOLD pin may be used to
suspend any serial communication without resetting the serial sequence.
8802C–SEEPROM–11/2012
Figure 1.
Pin Configurations
Pin Name
Function
CS
Chip Select
SCK
Serial Data Clock
SI
Serial Data Input
SO
Serial Data Output
GND
Ground
VCC
Power Supply
WP
Write Protect
HOLD
Suspends Serial Input
8-lead SOIC
CS
SO
WP
GND
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
8-lead TSSOP
CS
SO
WP
GND
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
2
1.
Absolute Maximum Ratings*
*Notice: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions beyond those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect device reliability.
Operating Temperature 40C to +125C
Storage Temperature 65C to +150C
Voltage on any pin
with respect to ground1.0V to +7.0V
Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V
DC Output Current. . . . . . . . . . . . . . . . . . . . . . . 5.0mA
2.
Block Diagram
VCC
Status
Register
GND
Memory Array
128/256/512 X 8
Address
Decoder
Data
Register
Output
Buffer
SI
CS
Mode
Decode
Logic
WP
SCK
Clock
Generator
SO
HOLD
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
3
3.
Electrical Characteristics
3.1
Pin Capacitance(1)
Applicable at these conditions, unless otherwise noted. TA = 25C, f = 1.0MHz, VCC = +5.0V.
Symbol
Test Conditions
COUT
CIN
Note:
3.2
1.
Max
Units
Conditions
Output Capacitance (SO)
8
pF
VOUT = 0V
Input Capacitance (CS, SCK, SI, WP, HOLD)
6
pF
VIN = 0V
This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: TA = 40C to +125C, VCC = +2.5V to +5.5V.
Symbol
Parameter
VCC1
Supply Voltage
ICC1
Supply Current
ICC2
Supply Current
ICC3
Supply Current
ISB1
Standby Current
VCC = 2.5V, CS = VCC
ISB2
Standby Current
VCC = 5.0V, CS = VCC
IIL
Input Leakage
VIN = 0V to VCC
3.0
IOL
Output Leakage
VIN = 0V to VCC
3.0
3.0
μA
VIL(1)
Input Low-voltage
0.6
VCC x 0.3
V
VIH(1)
Input High-voltage
VCC x 0.7
VCC + 0.5
V
VOL1
Output Low-voltage
0.4
V
VOH1
Output High-voltage
Note:
1.
Test Condition
Min
Typ
Max
Units
5.5
V
6.0
mA
3.0
mA
6.0
mA
0.2
3.0
μA
2.0
5.0
μA
2.5
VCC = 5.0V at 5MHz,
SO = Open, Read
VCC = 5.0V at 1MHz
VCC = 5.0V at 5MHz,
SO = Open, Read, Write
2.5V  VCC  5.5V
IOL = 3.0mA
IOH = 1.6mA
μA
VCC  0.8
V
VIL min and VIH max are reference only and are not tested.
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
4
3.3
AC Characteristics
Applicable over recommended operating range from TA = 40C to +125C, VCC = As Specified,
CL = 1 TTL Gate and 100pF (unless otherwise noted).
Symbol
Parameter
Voltage
Min
Max
Units
fSCK
SCK Clock Frequency
2.5–5.5
0
5.0
MHz
tRI
Input Rise Time
2.5–5.5
2
μs
tFI
Input Fall Time
2.5–5.5
2
μs
tWH
SCK High Time
2.5–5.5
40
ns
tWL
SCK Low Time
2.5–5.5
40
ns
tCS
CS High Time
2.5–5.5
80
ns
tCSS
CS Setup Time
2.5–5.5
80
ns
tCSH
CS Hold Time
2.5–5.5
80
ns
tSU
Data In Setup Time
2.5–5.5
5
ns
tH
Data In Hold Time
2.5–5.5
20
ns
tHD
Hold Setup Time
2.5–5.5
40
ns
tCD
Hold Time
2.5–5.5
40
ns
tV
Output Valid
2.5–5.5
0
tHO
Output Hold Time
2.5–5.5
0
tLZ
Hold to Output Low Z
2.5–5.5
0
tHZ
Hold to Output High Z
tDIS
40
ns
ns
40
ns
2.5–5.5
80
ns
Output Disable Time
2.5–5.5
80
ns
tWC
Write Cycle Time
2.5–5.5
5
ms
Endurance(1)
5.0V, 25°C, Page Mode
Note:
1.
1M
Write Cycles
This parameter is characterized and is not 100% tested.
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
5
4.
Serial Interface Description
Master: The device that generates the serial clock.
Slave: Because the Serial Clock pin (SCK) is always an input, AT25010B/020B/040B always operates as a slave.
Transmitter/Receiver: AT25010B/020B/040B has separate pins designated for data transmission (SO) and
reception (SI).
MSB: The Most Significant Bit (MSB) is the first bit transmitted and received.
Serial Opcode: After the device is selected with CS going low, the first byte will be received. This byte contains the
opcode that defines the operations to be performed. The opcode also contains address bit A8 in both the Read and the
Write instructions for AT25040B only.
Invalid Opcode: If an invalid opcode is received, no data will be shifted into AT25010B/020B/040B, and the Serial
Output pin (SO) will remain in a high impedance state until the falling edge of CS is detected again. This will reinitialize
the serial communication.
Chip Select: AT25010B/020B/040B is selected when the CS pin is low. When the device is not selected, data will not be
accepted via the SI pin, and the Serial Output pin (SO) will remain in a high impedance state.
Hold: The HOLD pin is used in conjunction with the CS pin to select AT25010B/020B/040B. When the device is selected
and a serial sequence is underway, Hold can be used to pause the serial communication with the master device without
resetting the serial sequence. To pause, the HOLD pin must be brought low while the SCK pin is low. To resume serial
communication, the HOLD pin is brought high while the SCK pin is low (SCK may still toggle duringHold). Inputs to the SI
pin will be ignored while the SO pin is in the high impedance state.
Write Protect: The Write Protect pin (WP) will allow normal read/write operations when held high. When the WP pin is
brought low, all write operations are inhibited.
WP going low while CS is still low will interrupt a write to AT25010B/020B/040B. If the internal write cycle has already
been initiated, WP going low will have no effect on any write operation.
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
6
Figure 4-1. SPI Serial Interface
Master:
Microcontroller
Slave:
AT25010B/020B/040B
Data Out (MOSI)
Data In (MISO)
Serial Clock (SPI CK)
SS0
SS1
SS2
SS3
SI
SO
SCK
CS
SI
SO
SCK
CS
SI
SO
SCK
CS
SI
SO
SCK
CS
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
7
5.
Functional Description
AT25010B/020B/040B is designed to interface directly with the synchronous Serial Peripheral Interface (SPI) of the 6805
and 68HC11 series of microcontrollers.
AT25010B/020B/040B utilizes an 8-bit instruction register. The list of instructions and their operation codes are contained
in Table 5-1. All instructions, addresses, and data are transferred with the MSB first and start with a high-to-low CS
transition.
Table 5-1.
Instruction Set for the Atmel AT25010B/020B/040B
Instruction Name
Instruction Format
Operation
WREN
0000 X110
Set Write Enable Latch
WRDI
0000 X100
Reset Write Enable Latch
RDSR
0000 X101
Read Status Register
WRSR
0000 X001
Write Status Register
READ
0000 A011
Read Data from Memory Array
WRITE
0000 A010
Write Data to Memory Array
Note:
“A” represents the ninth address bit (MSB bit A8) needed for AT25040B only.
Write Enable (WREN): The device will power up in the Write Disable state when VCC is applied. All programming
instructions must therefore be preceded by a Write Enable instruction.
Write Disable (WRDI): To protect the device against inadvertent writes, the Write Disable instruction disables all
programming modes. The WRDI instruction is independent of the status of the WP pin.
Read Status Register (RDSR): The Read Status Register instruction provides access to the status register. The
Ready/Busy and Write Enable status of the device can be determined by the RDSR instruction. Similarly, the Block Write
protection bits indicate the extent of protection employed. These bits are set by using the WRSR instruction.
Table 5-2.
Status Register Format
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
X
BP1
BP0
WEN
RDY
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
8
Table 5-3.
Bit
Read Status Register Bit Definition
Definition
Bit 0 (RDY)
Bit 1 (WEN)
Bit 0 = 0 (RDY) indicates the device is ready.
Bit 0 = 1 indicates the write cycle is in progress.
Bit 1 = 0 indicates the device is not write-enabled.
Bit 1 = 1 indicates the device is write-enabled.
Bit 2 (BP0)
See Table 5-4 on page 9.
Bit 3 (BP1)
See Table 5-4 on page 9.
Bits 4 -7
Bits 4  7 = 0 when the device is not in an internal write cycle.
Bits 4  7 = 1 during an internal write cycle.
Write Status Register (WRSR): The WRSR instruction allows the user to select one of four levels of protection.
AT25010B/020B/040B is divided into four array segments. One-quarter, one-half, or all of the memory segments can be
protected. Any of the data within any selected segment will therefore be read-only. The Block Write protection levels and
corresponding status register control bits are shown in Table 5-4.
Bits BP0 and BP1 are nonvolatile cells that have the same properties and functions as the regular memory cells
(e.g., WREN, tWC, RDSR).
Table 5-4.
Block Write Protect Bits
Status
Register Bits
Array Addresses Protected
Level
BP1
BP0
Atmel AT25010B
Atmel AT25020B
Atmel AT25040B
0
0
0
None
None
None
1 (1/4)
0
1
60 - 7F
C0 - FF
180 - 1FF
2 (1/2)
1
0
40 - 7F
80 - FF
100 - 1FF
3 (All)
1
1
00 - 7F
00 - FF
000 - 1FF
Read Sequence (Read): Reading AT25010B/020B/040B via the Serial Output (SO) pin requires the following sequence.
After the CS line is pulled low to select a device, the Read opcode is transmitted via the SI line followed by the byte
address to be read (A7–A0, see Table 5-5). Upon completion, any data on the SI line will be ignored. The data
(D7–D0) at the specified address is then shifted out onto the SO line. If only one byte is to be read, the CS line should be
driven high after the data comes out. The Read sequence can be continued since the byte address is automatically
incremented and data will continue to be shifted out. When the highest address is reached, the address counter will roll
over to the lowest address, allowing the entire memory to be read in one continuous Read cycle.
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
9
Write Sequence (Write): In order to program AT25010B/020B/040B, two separate instructions must be executed. First,
the device must be Write Enabled via the WREN instruction. Then a Write instruction may be executed. Also, the
address of the memory location(s) to be programmed must be outside the protected address field location selected by
the Block Write protection level. During an internal write cycle, all commands will be ignored except the RDSR
instruction.
A Write instruction requires the following sequence. After the CS line is pulled low to select the device, the Write
opcode is transmitted via the SI line followed by the byte address (A7A0) and the data (D7–D0) to be programmed (See
Table 5-5). Programming will start after the CS pin is brought high. The low-to-high transition of the CS pin must occur
during the SCK low-time immediately after clocking in the D0 (LSB) data bit.
The Ready/Busy status of the device can be determined by initiating a Read status register (RDSR) instruction.
If Bit 0 = one, the Write cycle is still in progress. If Bit 0 = zero, the Write cycle has ended. Only the RDSR instruction is
enabled during the Write programming cycle.
AT25010B/020B/040B is capable of a 8-byte Page Write operation. After each byte of data is received, the three
low-order address bits are internally incremented by one; the high-order bits of the address will remain constant. If more
than eight bytes of data are transmitted, the address counter will roll over and the previously written data will be
overwritten. AT25010B/020B/040B is automatically returned to the Write Disable state at the completion of a Write cycle.
Note:
If the device is not Write Enabled (WREN), the device will ignore the Write instruction and will return to the
standby state, when CS is brought high. A new CS falling edge is required to reinitiate the serial
communication.
Table 5-5.
Address Key
Note:
Address
Atmel AT25010B
Atmel AT25020B
Atmel AT25040B
AN
A6–A0
A7–A0
A8–A0
Don’t Care Bits
A7
None
None
The A8 bit (AT25040B address MSB) must appear embedded in the opcode as illustrated in Table 5-1.
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
10
6.
Timing Diagrams
Figure 6-1. Synchronous Data Timing (for Mode 0)
t CS
VIH
CS
VIL
t CSH
t CSS
VIH
t WH
SCK
t WL
VIL
tH
t SU
SI
VIH
VALID IN
VIL
tV
VOH
SO
t HO
t DIS
HI-Z
HI-Z
VOL
Figure 6-2. WREN Timing
CS
SCK
SI
SO
WREN Opcode
HI-Z
Figure 6-3. WRDI Timing
CS
SCK
SI
SO
WRDI Opcode
HI-Z
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
11
Figure 6-4. RDSR Timing
CS
0
1
2
3
4
5
6
7
8
9
10
7
6
5
8
9
7
6
11
12
13
14
15
4
3
2
1
0
10
11
12
13
14
15
5
4
2
1
0
SCK
Instruction
SI
Data Out
High-impedance
SO
MSB
Figure 6-5. WRSR Timing
CS
0
1
2
3
4
5
6
7
SCK
Data In
SI
SO
Instruction
3
High-impedance
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
12
Figure 6-6. Read Timing
CS
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
SCK
Instruction
Byte Address
8
SI
7
9th
6
5
4
3
2
1
0
Bit of Address
Data Out
High Impedance
SO
7
6
5
4
3
2
1
0
MSB
Figure 6-7. Write Timing
CS
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
7
6
SCK
Instruction
SI
Byte Address
8
5
4
3
2
Data In
1
0
7
6
5
4
3
2
1
0
9th Bit of Address
SO
High Impedance
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
13
Figure 6-8. HOLD Timing
CS
SCK
HOLD
SO
6.1
Power Recommendation
The device internal POR (Power-On Reset) threshold is just below the minimum device operating voltage. Power shall
rise monotonically from 0.0Vdc to full VCC in less than 1ms. Hold at full VCC for at least 100μs before the first operation.
Power shall drop from full VCC to 0.0Vdc in less than 1ms. Power dropping to a non-zero level and then slowly going to
zero is not recommended. Power shall remain off (0.0Vdc) for 0.5s minimum. Please consult Atmel if your power
conditions do not meet the above recommendations.
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
14
7.
Product Markings
AT25010B, AT25020B, and AT25040B: Package Marking Information
8-lead TSSOP
8-lead SOIC
ATPYWW
###D @
AAAAAAA
ATMLPYWW
###D
@
AAAAAAAA
Note 1:
designates pin 1
Note 2: Package drawings are not to scale
Catalog Number Truncation
AT25010B
Truncation Code ###: 51B
AT25020B
Truncation Code ###: 52B
AT25040B
Truncation Code ###: 54B
Date Codes
Y = Year
2: 2012
3: 2013
4: 2014
5: 2015
Voltages
6: 2016
7: 2017
8: 2018
9: 2019
M = Month
A: January
B: February
...
L: December
WW = Work Week of Assembly
02: Week 2
04: Week 4
...
52: Week 52
Country of Assembly
Lot Number
@ = Country of Assembly
AAA...A = Atmel Wafer Lot Number
Trace Code
D: 2.5V min
Grade/Lead Finish Material
P: Automotive/NiPdAu
Atmel Truncation
XX = Trace Code (Atmel Lot Numbers Correspond to Code)
Example: AA, AB.... YZ, ZZ
AT: Atmel
ATM: Atmel
ATML: Atmel
10/01/12
TITLE
Package Mark Contact:
[email protected]
25010-20-40BAM, AT25010B, AT25020B and AT25040B
Automotive Package Marking Information
DRAWING NO.
REV.
25010-20-40BAM
D
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
15
8.
Ordering Code Information
Atmel Ordering Code
(1)
AT25010B-SSPD-T
(1)
AT25010B-XPD-T
AT25020B-SSPD-T(1)
(1)
AT25020B-XPD-T
AT25040B-SSPD-T(1)
(1)
AT25040B-XPD-T
Note:
1.
Lead Finish
Package
NiPdAu
(Lead-free/Halogen-free)
8S1
NiPdAu
(Lead-free/Halogen-free)
8S1
NiPdAu
(Lead-free/Halogen-free)
8S1
8X
8X
8X
Voltage
Operation Range
2.5V to 5.5V
Automotive Temperature
40C to 125C)
2.5V to 5.5V
Automotive Temperature
40C to 125C)
2.5V to 5.5V
Automotive Temperature
40C to 125C)
Tape and reel delivery:

SOIC 4k/reel

TSSOP 5k/reel
Package Type
8S1
8-lead, 0.150" wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8X
8-lead 4.4mm body, Plastic Thin Shrink Small Outline (TSSOP)
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
16
9.
Packaging Information
9.1
8S1 — 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
A1
D
SIDE VIEW
SYMBOL MIN
A
1.35
MAX
–
1.75
A1
0.10
–
0.25
b
0.31
–
0.51
C
0.17
–
0.25
D
4.80
–
5.05
E1
3.81
–
3.99
E
5.79
–
6.20
e
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
NOM
NOTE
1.27 BSC
L
0.40
–
1.27
Ø
0°
–
8°
6/22/11
Package Drawing Contact:
[email protected]
TITLE
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
GPC
SWB
DRAWING NO.
REV.
8S1
G
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
17
9.2
8X — 8-lead TSSOP
C
1
Pin 1 indicator
this corner
E1
E
L1
H
N
L
Top View
End View
A
b
A1
e
COMMON DIMENSIONS
(Unit of Measure = mm)
A2
Side View
Notes:
MIN
NOM
MAX
A
-
-
1.20
A1
0.05
-
0.15
A2
0.80
1.00
1.05
D
2.90
3.00
3.10
2, 5
SYMBOL
D
1. This drawing is for general information only. Refer to JEDEC
Drawing MO-153, Variation AA, for proper dimensions,
tolerances, datums, etc.
2. Dimension D does not include mold Flash, protrusions or gate
burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15mm (0.006in) per side.
3. Dimension E1 does not include inter-lead Flash or protrusions.
Inter-lead Flash and protrusions shall not exceed 0.25mm
(0.010in) per side.
4. Dimension b does not include Dambar protrusion. Allowable
Dambar protrusion shall be 0.08mm total in excess of the b
dimension at maximum material condition. Dambar cannot be
located on the lower radius of the foot. Minimum space between
protrusion and adjacent lead is 0.07mm.
5. Dimension D and E1 to be determined at Datum Plane H.
E
NOTE
6.40 BSC
E1
4.30
4.40
4.50
3, 5
b
0.19
–
0.30
4
e
L
0.65 BSC
0.45
L1
C
0.60
0.75
1.00 REF
0.09
-
0.20
12/8/11
TITLE
Package Drawing Contact:
[email protected]
GPC
8X, 8-lead 4.4mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP)
DRAWING NO.
TNR
8X
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
REV.
E
18
10.
Revision History
Doc. Rev.
Date
8802C
11/2012
8802B
10/2012
8802A
03/2012
Comments
Update ordering code tables.
Update 8X package drawing.
Remove preliminary status.
Update Atmel logos and disclaimer/copy page.
Initial document release.
Atmel AT25010B/020B/040B Automotive [DATASHEET]
8802C–SEEPROM–11/2012
19
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