AT24CM01 - Complete

AT24CM01
I2C-Compatible (2-wire) Serial EEPROM
1-Mbit (131,072 x 8)
DATASHEET
Features

Low Voltage and Standard Voltage Operation Available
̶
̶







Internally Organized 131,072 x 8
2-wire Serial Interface
Schmitt Triggers, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
400kHz (1.7V) and 1MHz (5V, 2.5V) Compatibility
Write Protect Pin for Hardware Data Protection
256-byte Page Write Mode
̶



1.7V (VCC = 1.7V to 5.5V)
2.5V (VCC = 2.5V to 5.5V)
Partial Page Writes Allowed
Random and Sequential Read Modes
Self-timed Write Cycle (5ms Max)
High Reliability
̶
Endurance: 1,000,000 Write Cycles
Data Retention: 40 Years
̶

Green Package Options (Pb/Halide-free/RoHS Compliant)

Die Sale Options: Wafer Form and Tape and Reel Available
̶
8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, and 8-ball WLCSP
Description
The Atmel® AT24CM01 provides 1,048,576 bits of Serial Electrically Erasable and
Programmable Read-Only Memory (EEPROM) organized as 131,072 words of
8 bits each. The device’s cascadable feature allows up to four devices to share a
common 2-wire bus. The device is optimized for use in many industrial and
commercial applications where low power and low voltage operation are
essential. The devices are available in space-saving 8-lead JEDEC SOIC, 8-lead
EIAJ SOIC, 8-lead TSSOP, and 8-ball WLCSP. In addition, the entire family is
available in 1.7V (1.7V to 5.5V) and 2.5V (2.5V to 5.5V) versions.
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
1.
Pin Configurations and Pinouts
Pin Name
Function
NC
No Connect
A1
Address Input
A2
Address Input
GND
Ground
SDA
Serial Data
SCL
Serial Clock Input
WP
Write Protect
VCC
Power Supply
8-lead SOIC
8-lead TSSOP
NC
1
8
VCC
A1
2
7
WP
A2
3
6
SCL
GND
4
5
SDA
NC
A1
A2
GND
1
2
3
4
Top View
8
7
6
5
VCC
WP
SCL
SDA
Top View
8-ball WLSCP
VCC
WP
A1
SCL
SDA
NC
A2
GND
Top View
Note:
2.
Absolute Maximum Ratings*
Operating Temperature . . . . . . . . . . .-55C to +125C
Storage Temperature . . . . . . . . . . . . .-65C to +150C
Voltage on any pin
with respect to ground . . . . . . . . . . . . . -1.0V to +7.0V
Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . .5.0mA
2
Drawings are not to scale.
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
*Notice: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage
to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
3.
Block Diagram
VCC
GND
WP
Start
Stop
Logic
Serial
Control
Logic
LOAD
Device
Address
Comparator
A2
A1
R/W
EN
H.V. Pump/Timing
COMP
LOAD
Data Recovery
INC
Data Word
Addr/counter
Y DEC
X DEC
SCL
SDA
EEPROM
Serial MUX
DOUT/ACK
Logic
DIN
DOUT
4.
Pin Description
Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative
edge clock data out of each device.
Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open drain driven and may be
wire-ORed with any number of other open drain or open collector devices.
Device Addresses (A2 and A1): The A2 and A1 pins are device address inputs that can be hardwired or left not
connected for hardware compatibility with other Atmel AT24Cxx devices. When the A2 and A1 pins are
hardwired, as many as four 1-Mbit devices may be addressed on a single bus system (See “Device Addressing”
on page 9. for more details). If the A2 and A1 pins are left floating, the A2 and A1 pin will be internally pulled down
to GND if the capacitive coupling to the circuit board VCC plane is <3pF. If coupling is >3pF, Atmel recommends
connecting the A2 and A1 pin to GND.
Write Protect (WP): The Write Protect input, when connected to GND, allows normal write operations. When
WP is connected high to VCC, all write operations to the memory are inhibited. If the pin is left floating, the WP
pin will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3pF. If
coupling is >3pF, Atmel recommends connecting the pin to GND. Switching WP to VCC prior to a write operation
creates a software write protect function.
Table 4-1.
Write Protect
WP Pin Status
Part of the Array Protected
At VCC
Full Array
At GND
Normal Read/Write Operations
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
3
5.
Memory Organization
AT24CM01, 1-Mbit Serial EEPROM: The 1-Mbit is internally organized as 512 pages of 256 bytes each.
Random word addressing requires a 17-bit data word address.
5.1
Pin Capacitance
Table 5-1.
Pin Capacitance(1)
Applicable over recommended operating range from TA = 25C, f = 1.0MHz, VCC = 5.5V.
Symbol
Test Condition
CI/O
CIN
Note:
5.2
1.
Max
Units
Conditions
Input/Output Capacitance (SDA)
8
pF
VI/O = 0V
Input Capacitance (A2, A1, SCL)
6
pF
VIN = 0V
This parameter is characterized and is not 100% tested.
DC Characteristics
Table 5-2.
DC Characteristics
Applicable over recommended operating range from: TAI = -40C to +85C, VCC = 1.7V to 5.5V (unless otherwise noted).
Symbol
Parameter
Test Condition
VCC1
Supply Voltage,
1.7V Option
VCC2
Supply Voltage,
2.5V Option
ICC
Supply Current
VCC = 5.0V
ICC
Supply Current
VCC = 5.0V
VCC = 1.7V
ISB
Standby Current
VCC = 2.5V
VCC = 3.6V
VCC = 5.5V
Typ
Max
Units
1.7
5.5
V
2.5
5.5
V
Read at 400kHz
2.0
mA
Write at 400kHz
3.0
mA
1.0
μA
2.0
μA
3.0
μA
6.0
μA
VIN = VCC or VSS
VIN = VCC or VSS
ILI
Input Leakage Current
VIN = VCC or VSS
0.10
3.0
μA
ILO
Output Leakage Current
VOUT = VCC or VSS
0.05
3.0
μA
VIL
Input Low Level(1)
-0.6
VCC x 0.3
V
VCC x 0.7
VCC + 0.5
V
(1)
VIH
Input High Level
VOL1
Output Low Level
VCC = 1.7V
IOL = 0.15mA
0.2
V
VOL2
Output Low Level
VCC = 3.0V
IOL = 2.1mA
0.4
V
Note:
4
Min
1.
VIL min and VIH max are reference only and are not tested.
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
5.3
AC Characteristics
Table 5-3.
AC Characteristics
Applicable over recommended operating range from TAI = -40C to +85C, VCC = 1.7V to 5.5V (where applicable),
CL = 100pF (unless otherwise noted). Test conditions are listed in Note 2.
1.7V
Min
2.5V, 5.0V
Symbol
Parameter
Max
Min
fSCL
Clock Frequency, SCL
tLOW
Clock Pulse Width Low
1300
400
ns
tHIGH
Clock Pulse Width High
600
400
ns
tI
Noise Suppression Time(1)
tAA
Clock Low to Data Out Valid
tBUF
Time the bus must be free before a
new transmission can start(1)
1300
500
ns
tHD.STA
Start Condition Hold Time
600
250
ns
tSU.STA
Start Condition Set-up Time
600
250
ns
tHD.DAT
Data In Hold Time
0
0
ns
tSU.DAT
Data In Set-up Time
100
100
ns
tR
Inputs Rise Time(1)
400
100
50
(1)
900
50
Max
Units
1000
kHz
50
ns
550
ns
300
300
ns
300
100
ns
tF
Inputs Fall Time
tSU.STO
Stop Condition Set-up Time
600
250
ns
tDH
Data Out Hold Time
50
50
ns
tWR
Write Cycle Time
(1)
Endurance
Notes:
1.
2.
25°C, Page Mode, 3.3V
5
5
1,000,000
ms
Write Cycles
This parameter is ensured by characterization only.
AC measurement conditions:

RL (connects to VCC): 1.3 k (2.5V, 5V), 10 k (1.7V)

Input pulse voltages: 0.3 VCC to 0.7 VCC

Input rise and fall times:  50ns

Input and output timing reference voltages: 0.5 VCC
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
5
6.
Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin
may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or
Stop condition as defined below.
Figure 6-1.
Data Validity
SDA
SCL
Data Stable
Data Stable
Data
Change
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any
other command.
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the
Stop condition will place the EEPROM in a standby power mode.
Figure 6-2.
Start and Stop Definition
SDA
SCL
Start
Condition
6
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
Stop
Condition
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in eight bit
words. The EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word.
Figure 6-3.
Output Acknowledge
1
SCL
8
9
Data In
Data Out
Start
Condition
Acknowledge
Standby Mode: The AT24CM01 features a low-power standby mode which is enabled:


Upon power-up.
After the receipt of the Stop condition and the completion of any internal operation.
Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be protocol
reset by following these steps:
1.
Create a Start condition (if possible).
2.
3.
Clock nine cycles.
Create another Start condition followed by Stop condition as in Figure 6-4.
The device should be ready for the next communication after the above steps have been completed. In the
event that the device is still non-responsive or remains active on the SDA bus, a power cycle must be used to
reset the device.
Figure 6-4.
Software Reset
Dummy Clock Cycles
SCL
1
Start
Condition
2
3
8
9
Start
Condition
Stop
Condition
SDA
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
7
Figure 6-5.
Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
tHIGH
tF
tR
tLOW
SCL
tSU.STA
tLOW
tHD.STA
tHD.DAT
tSU.DAT
tSU.STO
SDA IN
tAA
tDH
tBUF
SDA OUT
Figure 6-6.
Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
SDA
8th Bit
AC
WORDN
(1)
tWR
Stop
Condition
Note:
8
1.
Start
Condition
The write cycle time tWR is the time from a valid Stop condition of a write sequence to the end of the internal
clear/write cycle.
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
7.
Device Addressing
The 1-Mbit EEPROM requires an 8-bit device address word following a Start condition to enable the chip for a
read or write operation (see Figure 7-1 below). The device address word consists of a mandatory ‘1010’
sequence for the first four most significant bits. This is common to all 2-wire EEPROM devices.
The 1-Mbit uses the two device address bits, A2 and A1, to allow up to four devices on the same bus. These A2
and A1 bits must compare to the corresponding hardwired input pins, A2 and A1. The A2 and A1 pins uses an
internal proprietary circuit that biases it to a logic low condition if the pin is allowed to float.
The seventh bit (P0) of the device address is a memory page address bit. This memory page address bit is the
most significant bit of the data word address that follows. The eighth bit of the device address is the read/write
operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a zero. If a valid compare is not made, the
device will return to a standby state.
Figure 7-1.
1Mb
Device Address
1
0
1
0
A2
A1
P0
MSB
8.
R/W
LSB
Write Operations
Byte Write: To select a data word in the 1-Mbit memory requires a 17-bit word address. The word address field
consists of the P0 bit in the device address byte, then the most significant word address followed by the least
significant word address (Figure 8-1).
A write operation requires the P0 bit and two 8-bit data word addresses following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then the part is
to receive the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero. The
addressing device, such as a microcontroller, then must terminate the write sequence with a Stop condition. At
this time the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are
disabled during this write cycle and the EEPROM will not respond until the write is complete (Figure 8-1).
Figure 8-1.
Byte Write
S
T
A
R
T
Device
Address
W
R
I
T
E
First Word
Address
Second Word
Address
S
T
O
P
Data
SDA LINE
M
S
B
P R A
0 / C
W K
L A
S C
B K
L A
S C
B K
A
C
K
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
9
Page Write: The 1-Mbit EEPROM is capable of a 256-byte Page Write.
A Page Write is initiated the same way as a Byte Write, but the microcontroller does not send a Stop condition
after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word,
the microcontroller can transmit up to 255 more data words. The EEPROM will respond with an acknowledge
after each data word is received. The microcontroller must terminate the page write sequence with a Stop
condition (Figure 8-2) and the internally timed write cycle will begin.
The data word address lower 8 bits are internally incremented following the receipt of each data word. The
higher data word address bits are not incremented, retaining the memory page row location. When the internally
generated word address, reaches the page boundary, the following byte is placed at the beginning of the same
page. If more than 256 data words are transmitted to the EEPROM, the data word address will “roll over” and
previous data will be overwritten. The address “rollover” during write is from the last byte of the current page to
the first byte of the same page.
Figure 8-2.
Page Write
S
T
A
R
T
W
R
I
T
E
Device
Address
First Word
Address
Second Word
Address
Data (n)
S
T
O
P
Data (n + x)
SDA LINE
M
S
B
P R A
0 / C
W K
L A
S C
B K
L A
S C
B K
A
C
K
A
C
K
Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled,
Acknowledge Polling can be initiated. This involves sending a Start condition followed by the device address
word. The read/write bit is representative of the operation desired. Only if the internal write cycle has completed
will the EEPROM respond with a zero, allowing a new read or write sequence to be initiated.
Data Security: The AT24CM01 has a hardware data protection scheme that allows the user to write protect the
entire memory when the WP pin is at VCC.
10
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
9.
Read Operations
Read operations are initiated the same way as write operations with the exception that the read/write select bit
in the device address word is set to one. There are three read operations: Current Address Read, Random
Address Read, and Sequential Read.
Current Address Read: The internal data word address counter maintains the last address accessed during
the last read or write operation, incremented by one. This address stays valid between operations as long as the
VCC to the part is maintained. The address “rollover” during read is from the last byte of the last page, to the first
byte of the first page of the memory.
Once the device address with the read/write select bit set to one is input and acknowledged by the EEPROM,
the current address data word is serially clocked out on the SDA line. The microcontroller does not respond with
a zero but does generate a following Stop condition.
Figure 9-1.
Current Address Read
S
T
A
R
T
R
E
A
D
Device
Address
S
T
O
P
Data
SDA LINE
M
S
B
P R A
0 / C
W K
N
O
A
C
K
Random Read: A Random Read requires an initial byte write sequence to load in the data word address. This
is known as a “dummy write” operation. Once the device address word and data word address are clocked in
and acknowledged by the EEPROM, the microcontroller must generate another Start condition. The
microcontroller now initiates a current address read by sending a device address with the read/write select bit
high. The EEPROM acknowledges the device address and serially clocks out the data word on the SDA line.
The microcontroller does not respond with a zero but does generate a following Stop condition.
Figure 9-2.
Random Read
S
T
A
R
T
Device
Address
W
R
I
T
E
First Word
Address
S
T
A
R
T
Second Word
Address
Device
Address
R
E
A
D
S
T
O
P
Data (n)
SDA LINE
M
S
B
P R A
0 / C
W
A
C
L A
S C
B
P R A
0 / C
W
N
O
A
C
Dummy Write
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
11
Sequential Read: Sequential Reads are initiated by either a Current Address Read or a Random Read. After
the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives
an acknowledge, it will continue to increment the data word address and serially clock out sequential data
words. When the memory address limit is reached, the data word address will “roll over” and the sequential read
will continue. The Sequential Read operation is terminated when the microcontroller does not respond with a
zero, but does generate a following Stop condition.
Figure 9-3.
Sequential Read
S
T
A
R
T
Device
Address
W
R
I
T
E
Second Word
Address
First Word
Address
...
SDA LINE
M
S
B
PR A
0 / C
W K
L A
S C
B K
A
C
K
Dummy Write
S
T
A
R
T
R
E
A
D
Device
Address
Data (n)
Data (n + 1)
Data (n + 2)
S
T
O
P
Data (n + x)
...
P R A
0 / C
K
W
12
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
A
C
K
A
C
K
A
C
K
N
O
A
C
K
10.
Ordering Code Detail
AT24CM01-SSHM-B
Atmel Designator
Shipping Carrier Option
B or blank = Bulk (Tubes)
T = Tape and Reel
Product Family
24C = Standard I2C
Serial EEPROM
Device Density
M = Megabit Family
01 = 1 Megabit
Operating Voltage
M = 1.7V to 5.5V
D = 2.5V to 5.5V
Package Device Grade or
Wafer/Die Thickness
H = Green, NiPdAu Lead Finish
Industrial Temperature Range
(-40°C to +85°C)
U = Green, Matte Sn Lead Finish
Industrial Temperature Range
(-40°C to +85°C)
11 = 11mil Wafer Thickness
Package Option
SS = JEDEC SOIC
S
= EIAJ SOIC
X
= TSSOP
U
= 3x5 Grid Array, WLCSP
WWU = Wafer Unsawn
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
13
11.
Part Markings
AT24CM01: Package Marking Information
8-lead EIAJ
8-lead SOIC
ATMLHYWW
###%
@
AAAAAAAA
8-lead TSSOP
8-ball WLCSP
ATHYWW
###% @
AAAAAAA
Note 1:
ATMLHYWW
###%
@
AAAAAAAA
%U
###
YXX
designates pin 1
Note 2: Package drawings are not to scale
Catalog Number Truncation
AT24CM01
Truncation Code ###: 2G
Date Codes
Y = Year
4: 2014
5: 2015
6: 2016
7: 2017
Voltages
8: 2018
9: 2019
0: 2020
1: 2021
M = Month
A: January
B: February
...
L: December
WW = Work Week of Assembly
02: Week 2
04: Week 4
...
52: Week 52
Country of Assembly
Lot Number
@ = Country of Assembly
AAA...A = Atmel Wafer Lot Number
Trace Code
% = Minimum Voltage
D: 2.5V min
M: 1.7V min
Grade/Lead Finish Material
H: Industrial/NiPdAu
U: Industrial/Matte Tin/SnAgCu
Atmel Truncation
XX = Trace Code (Atmel Lot Numbers Correspond to Code)
Example: AA, AB.... YZ, ZZ
AT: Atmel
ATM: Atmel
ATML: Atmel
12/12/14
TITLE
Package Mark Contact:
[email protected]
14
24CM01SM, AT24CM01 Package Marking Information
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
DRAWING NO.
REV.
24CM01SM
F
12.
Ordering Information
Delivery Information
Atmel Ordering Code
Lead Finish
Package
Voltage
AT24CM01-SSHM-B
Form
Quantity
Bulk (Tubes)
100 per Tube
Tape and Reel
4,000 per Reel
Bulk (Tubes)
100 per Tube
Tape and Reel
4,000 per Reel
Bulk (Tubes)
95 per Tube
Tape and Reel
2,000 per Reel
Bulk (Tubes)
95 per Tube
Tape and Reel
2,000 per Reel
Bulk (Tubes)
100 per Tube
Tape and Reel
5,000 per Reel
Bulk (Tubes)
100 per Tube
Tape and Reel
5,000 per Reel
Tape and Reel
5,000 per Reel
Operation
Range
1.7V to 5.5V
AT24CM01-SSHM-T
8S1
AT24CM01-SSHD-B
2.5V to 5.5V
AT24CM01-SSHD-T
AT24CM01-SHM-B
1.7V to 5.5V
AT24CM01-SHM-T
AT24CM01-SHD-B
NiPdAu
(Lead-free/Halogen-free)
8S2
2.5V to 5.5V
AT24CM01-SHD-T
AT24CM01-XHM-B
Industrial
Temperature
(-40C to 85C)
1.7V to 5.5V
AT24CM01-XHM-T
8X
AT24CM01-XHD-B
2.5V to 5.5V
AT24CM01-XHD-T
AT24CM01-UUM-T(1)
AT24CM01-WWU11M(2)
Notes:
SnAgCu
(Lead-free/Halogen-free)
N/A
8U-6
1.7V to 5.5V
Wafer Sale
Note 2
1. WLCSP Package — CAUTION: Exposure to ultraviolet (UV) light can degrade the data stored in the EEPROM cells.
Therefore, customers who use a WLCSP product must ensure that exposure to ultraviolet light does not occur.
2. For wafer sales, please contact Atmel Sales.
Package Type
8S1
8-lead, 0.150” wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8S2
8-lead, 0.208” wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
8X
8-lead, 4.4mm body, Plastic Thin Shrink Small Outline (TSSOP)
8U-6
8-ball, 3x5 Grid Array, Wafer Level Chip Scale (WLCSP)
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
15
13.
Packaging Information
13.1
8S1 — 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
A1
D
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
SYMBOL MIN
A
1.35
NOM
MAX
–
1.75
A1
0.10
–
0.25
b
0.31
–
0.51
C
0.17
–
0.25
D
4.80
–
5.05
E1
3.81
–
3.99
E
5.79
–
6.20
e
NOTE
1.27 BSC
L
0.40
–
1.27
Ø
0°
–
8°
6/22/11
Package Drawing Contact:
[email protected]
16
TITLE
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
GPC
SWB
DRAWING NO.
REV.
8S1
G
13.2
8S2 — 8-lead EIAJ SOIC
TOP VIEW
END VIEW
C
1
E
E1
L
8
q
SIDE VIEW
e
b
A
COMMON DIMENSIONS
(Unit of Measure = mm)
A1
SYMBOL
A
D
Notes: 1. This drawing is for general information only; refer to EIAJ
Drawing EDR-7320 for additional information.
2. Mismatch of the upper and lower dies and resin burrs aren't
included.
3. Determines the true geometric position.
4. Values b,C apply to plated terminal. The standard thickness
of the plating layer shall measure between 0.007 to .021 mm.
MIN
MAX
NOM
1.70
NOTE
2.16
A1
0.05
0.25
b
0.35
0.48
4
C
0.15
0.35
4
D
5.13
5.35
E1
5.18
5.40
E
7.70
8.26
L
0.51
0.85
q
0°
e
2
8°
1.27 BSC
3
11/10/14
TITLE
Package Drawing Contact:
[email protected]
8S2, 8-lead, 0.208” Body, Plastic
Small Outline Package (EIAJ)
GPC
DRAWING NO.
REV.
STN
8S2
G
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
17
13.3
8X — 8-lead TSSOP
C
1
Pin 1 indicator
this corner
E1
E
L1
N
L
Top View
End View
A
b
A1
e
D
SYMBOL
Side View
Notes:
COMMON DIMENSIONS
(Unit of Measure = mm)
A2
1. This drawing is for general information only.
Refer to JEDEC Drawing MO-153, Variation AA, for proper
dimensions, tolerances, datums, etc.
2. Dimension D does not include mold Flash, protrusions or gate
burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15mm (0.006in) per side.
3. Dimension E1 does not include inter-lead Flash or protrusions.
Inter-lead Flash and protrusions shall not exceed 0.25mm
(0.010in) per side.
4. Dimension b does not include Dambar protrusion.
Allowable Dambar protrusion shall be 0.08mm total in excess
of the b dimension at maximum material condition. Dambar
cannot be located on the lower radius of the foot. Minimum
space between protrusion and adjacent lead is 0.07mm.
5. Dimension D and E1 to be determined at Datum Plane H.
MIN
NOM
MAX
A
-
-
1.20
A1
0.05
-
0.15
A2
0.80
1.00
1.05
D
2.90
3.00
3.10
2, 5
4.40
4.50
3, 5
0.25
0.30
4
E
6.40 BSC
E1
4.30
b
0.19
e
L
0.65 BSC
0.45
L1
C
NOTE
0.60
0.75
1.00 REF
0.09
-
0.20
2/27/14
TITLE
Package Drawing Contact:
[email protected]
18
8X, 8-lead 4.4mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP)
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
GPC
TNR
DRAWING NO.
8X
REV.
E
13.4
8U-6 — 8-ball WLCSP
—
d 0.015 C
4X
d 0.075 C
A
C
D
Pin 1
A
B
C
D
j n 0.015 m C
j n 0.05 m C A B
A1
E
Øb
E
D
C
B
A
Pin 1
1
1
E
2
2
e
3
3
A2
e2
d2
d
A
TOP VIEW
SIDE VIEW
BALL SIDE
* Dimensions are NOT to scale.
COMMON DIMENSIONS
(Unit of Measure = mm)
Pin Assignment Matrix
A
1
VCC
C
D
SDA
E
NC
WP
SCL
2
3
B
A1
A2
SYMBOL
MIN
TYP
MAX
A
0.460
0.499
0.538
A1
0.164
-
0.224
A2
0.280
0.305
0.330
E
Contact Atmel for details
e
GND
0.866
e2
0.500
d
1.000
d2
D
b
NOTE
0.500
Contact Atmel for details
0.239
0.269
0.299
4/25/13
Package Drawing Contact:
[email protected]
TITLE
8U-6, 8-ball (3x5 Array) Wafer Level Chip Scale
Package (WLCSP)
GPC
DRAWING NO.
REV.
GHZ
8U-6
B
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
19
14.
Revision History
Doc. No.
Date
8821F
01/2015
Comments
Update the ordering information section, part markings, and the 8X and 8S2 package outline
drawings.
Update document status from preliminary to complete.
8821E
03/2013
Correct WLCSP pinout.
Update footers and disclaimer page.
8812D
01/2013
Correct TSSOP pin label 7 to WP.
Add WLCSP package.
Update part markings.
8812C
12/2012
Update pinout diagram.
Update part markings.
Correct Byte Write figure from second typo error to first word address.
Update Sequential Read figure.
8812B
07/2012
Correct ordering code:
- AT24CM01-WWU-11, Die Sale to AT24CM01-WWU11M, Wafer Sale.
Update Atmel logos and disclaimer page.
8812A
20
05/2012
Initial document release.
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
XXXXXX
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© 2015 Atmel Corporation. / Rev.: Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015.
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