AT27C080 - Complete

Features
• Fast read access time – 90ns
• Low-power CMOS operation
•
•
•
•
•
•
•
•
– 100µA max standby
– 40mA max active at 5MHz
JEDEC standard packages
– 32-lead PLCC
– 32-lead PDIP
5V 10% supply
High-reliability CMOS technology
– 2,000V ESD protection
– 200mA latchup immunity
Rapid programming algorithm – 50µs/byte (typical)
CMOS- and TTL-compatible inputs and outputs
Integrated product identification code
Industrial temperature range
Green (Pb/halide-free) packaging option
1.
8Mb (1M x 8)
One-time
Programmable,
Read-only Memory
Atmel AT27C080
Description
The Atmel® AT27C080 is a low-power, high-performance 8,388,608-bit, one-time programmable, read-only memory (OTP EPROM) organized as 1M by 8 bits. The AT27C080
requires only one 5V power supply in normal read mode operation. Any byte can be
accessed in less than 90ns, eliminating the need for speed reducing WAIT states on highperformance microprocessor systems.
The Atmel scaled CMOS technology provides low active power consumption and fast programming. Power consumption is typically 10mA in active mode and less than 10µA in
standby mode.
The AT27C080 is available in a choice of industry standard, JEDEC-approved, one-time programmable (OTP) PLCC and PDIP packages. All devices feature two-line control (CE, OE)
to give designers the flexibility to prevent bus contention.
With high-density, 8Mb storage capability, the AT27C080 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media.
The AT27C080 has additional features to ensure high quality and efficient production use.
The rapid programming algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 50µs/byte. The integrated
product identification code electronically identifies the device and manufacturer. This feature
is used by industry standard programming equipment to select the proper programming
algorithms and voltages.
0360N–EPROM–042015
Pin configurations
Addresses
O0 - O7
Outputs
CE
Chip enable
OE/VPP
Output enable/Program supply
3.
32-lead PDIP
Top view
A12
A15
A16
A19
VCC
A18
A17
A0 - A19
32-lead PLCC
Top view
A7
A6
A5
A4
A3
A2
A1
A0
O0
4
3
2
1
32
31
30
Function
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
14
15
16
17
18
19
20
Pin name
O1
O2
GND
O3
O4
O5
O6
2.
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
A19
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A18
A17
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
O6
O5
O4
O3
System considerations
Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless
accommodated by the system design, these transients may exceed datasheet limits, resulting in device nonconformance.
At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the VCC and ground terminals of the device, as close to the device as possible.
Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic
capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.
Figure 3-1.
2
Block diagram
Atmel AT27C080
0360N–EPROM–042015
Atmel AT27C080
4.
Absolute maximum ratings*
Temperature under bias . . . . . . . . . . . . . .-55°C to +125°C
*NOTICE:
Storage temperature . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on any pin with
respect to ground . . . . . . . . . . . . . . . . . . . -2.0V to +7.0V(1)
Stresses beyond those listed under “Absolute
maximum ratings” may cause permanent damage to
the device. This is a stress rating only, and functional
operation of the device at these or any other
conditions beyond those indicated in the operational
sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect device reliability.
Voltage on A9 with
respect to ground . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1)
VPP supply voltage with
respect to ground . . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1)
Integrated UV erase dose . . . . . . . . . . . . . . . 7258W•s/cm2
Note:
5.
1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is
VCC + 0.75V DC, which may overshoot to +7.0V for pulses of less than 20ns.
DC and AC characteristics
Table 5-1.
Operating modes
Mode/Pin
CE
OE/VPP
Ai
Outputs
Read
VIL
VIL
Ai
DOUT
Output disable
X
VIH
X(1)
High Z
VIH
X
X
High Z
Rapid program
VIL
VPP
Ai
DIN
PGM verify
VIL
VIL
Ai
DOUT
PGM inhibit
VIH
VPP
X
High Z
Standby
(2)
VH(3)
Product identification(4)
Notes:
VIL
VIL
A9 =
A0 = VIH or VIL
A1 - A19 = VIL
Identification code
1. X can be VIL or VIH.
2. Refer to programming characteristics.
3. VH = 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0, which is toggled low (VIL) to select the manufacturer’s identification byte and high (VIH) to select the device code byte.
Table 5-2.
DC and AC operating conditions for read operation
Atmel AT27C080-90
Industrial operating temperature (case)
VCC power supply
-40C - 85C
5V 10%
3
0360N–EPROM–042015
Table 5-3.
DC and operating characteristics for read operation
Symbol
Parameter
Condition
ILI
Input load current
ILO
Output leakage current
ISB
VCC(1) standby current
ICC
VCC active current
VIL
Input low voltage
VIH
Input high voltage
VOL
Output low voltage
IOL = 2.1mA
VOH
Output high voltage
IOH = -400µA
Note:
Min
Max
Units
VIN = 0V to VCC (Com., Ind.)
±1.0
A
VOUT = 0V to VCC (Com., Ind.)
±5.0
A
ISB1 (CMOS), CE = VCC 0.3V
100
A
ISB2 (TTL), CE = 2.0 to VCC + 0.5V
1.0
mA
f = 5MHz, IOUT = 0mA, CE = VIL
40
mA
-0.6
0.8
V
2.0
VCC + 0.5
V
0.4
V
2.4
V
1. VCC must be applied simultaneously or before OE/ VPP , and removed simultaneously or after OE/VPP
Table 5-4.
AC characteristics for read operation
Atmel AT27C080-90
4
Symbol
Parameter
Condition
tACC(4)
Address to output delay
tCE(3)
Min
Max
Units
CE = OE/VPP
= VIL
90
ns
CE to output delay
OE = VIL
90
ns
tOE(3)(4)
OE to output delay
CE = VIL
20
ns
tDF(2)(5)
OE or CE high to output float, whichever occurred first
30
ns
tOH
Output hold from address, CE or OE/VPP, whichever occurred first
0
ns
Atmel AT27C080
0360N–EPROM–042015
Atmel AT27C080
Figure 5-1.
Notes:
AC waveforms for read operation(1)
1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. tDF is specified form OE/VPP or CE, whichever occurs first. Output float is defined as the point when data is no longer
driven.
3. OE/VPP may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
4. OE/VPP may be delayed up to tACC- tOE after the address is valid without impact on tACC.
5. This parameter is only sampled and is not 100% tested.
Figure 5-2.
Input test waveform and measurement levels
tR, tF < 20ns (10% to 90%)
Figure 5-3.
Output test load
1.3V
(1N914)
OUTPUT
PIN
3.3K
CL
Note:
CL = 100pF including jig capacitance.
5
0360N–EPROM–042015
Table 5-5.
Pin capacitance
f = 1MHz, T = 25°C(1)
Symbol
Typ
Max
Units
Conditions
CIN
4
8
pF
VIN = 0V
COUT
8
12
pF
VOUT = 0V
Note:
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Figure 5-4.
Notes:
Programming waveforms
1. The input timing reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device, but must be accommodated by the programmer.
6
Atmel AT27C080
0360N–EPROM–042015
Atmel AT27C080
Table 5-6.
DC programming characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V
Limits
Symbol
Parameter
Test Conditions
ILI
Input load current
VIN = VIL, VIH
VIL
Input low level
VIH
Input high level
VOL
Output low voltage
IOL = 2.1mA
VOH
Output high voltage
IOH = -400µA
ICC2
VCC supply current (program and verify)
IPP2
OE/VPP supply current
VID
A9 product identification voltage
Table 5-7.
Min
Max
Units
10
µA
-0.6
0.8
V
2.0
VCC + 1.0
V
0.4
V
2.4
V
40
mA
25
mA
12.5
V
CE = VIL
11.5
AC programming characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V
Limits
(1)
Symbol
Parameter
Test conditions
tAS
Address setup time
2.0
µs
tOES
OE/VPP setup time
2.0
µs
tOEH
OE/VPP hold time
2.0
µs
tDS
Data setup time
2.0
µs
tAH
Address hold time
0.0
µs
tDH
Data hold time
2.0
µs
Input rise and fall times:
(10% to 90%) 20ns
Input pulse levels:
0.45V to 2.4V
(2)
CE high to output float delay
tDFP
VCC setup time
tPW
CE program pulse width(3)
Max
0.0
Input timing reference level:
0.8V to 2.0V
tVCS
130
tVR
OE/VPP recovery time
tPRT
OE/VPP pulse rise time during
programming
ns
µs
47.5
Data valid from CE
Units
2.0
Output timing reference level:
0.8V to 2.0V
tDV
Notes:
Min
52.5
µs
1.0
µs
2.0
ns
50
ns
1. VCC must be applied simultaneously with or before OE/VPP and removed simultaneously with or after OE/VPP.
2. This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no longer driven.
See timing diagram.
3. Program pulse width tolerance is 50µs ± 5%.
Table 5-8.
The Atmel AT27C080 integrated product identification code
Pins
Codes
A0
O7
O6
O5
O4
O3
O2
O1
O0
Hex data
Manufacturer
0
0
0
0
1
1
1
1
0
1E
Device type
1
1
0
0
0
1
0
1
0
8A
7
0360N–EPROM–042015
6.
Rapid programming algorithm
A 50µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and OE/VPP is raised
to 13.0V. Each address is first programmed with one 50µs CE pulse without verification. Then a verification reprogramming
loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 50µs pulses are applied
with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed.
After the byte verifies properly, the next address is selected until all have been checked. OE/VPP is then lowered to VIL and
VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails.
Figure 6-1.
8
Rapid programming algorithm
Atmel AT27C080
0360N–EPROM–042015
Atmel AT27C080
7.
Ordering information
Green package (Pb/halide-free)
ICC (mA)
tACC
(ns)
Active
Standby
Atmel ordering code
Package
Lead finish
Operation range
90
40
0.1
AT27C080-90JU
AT27C080-90PU
32J
32P6
Matte tin
Matte tin
Industrial
(-40C to 85C)
Package type
32J
32-lead, plastic, J-leaded chip carrier (PLCC)
32P6
32-lead, 0.600" wide, plastic, dual inline package (PDIP)
9
0360N–EPROM–042015
8.
Package information
32J – PLCC
1.14(0.045) X 45°
PIN NO. 1
IDENTIFIER
1.14(0.045) X 45°
0.318(0.0125)
0.191(0.0075)
E1
E2
B1
E
B
e
A2
D1
A1
D
A
COMMON DIMENSIONS
(Unit of Measure = mm)
0.51(0.020)MAX
45° MAX (3X)
D2
Notes:
1. This package conforms to JEDEC reference MS-016, Variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
3. Lead coplanarity is 0.004" (0.102 mm) maximum.
SYMBOL
MIN
NOM
MAX
A
3.175
–
3.556
A1
1.524
–
2.413
A2
0.381
–
–
D
12.319
–
12.573
D1
11.354
–
11.506
D2
9.906
–
10.922
E
14.859
–
15.113
E1
13.894
–
14.046
E2
12.471
–
13.487
B
0.660
–
0.813
B1
0.330
–
0.533
e
NOTE
Note 2
Note 2
1.270 TYP
10/04/01
TITLE
Package Drawing Contact:
packagedrawings atmel.com
10
32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)
DRAWING NO.
REV.
32J
B
Atmel AT27C080
0360N–EPROM–042015
Atmel AT27C080
32P6 – PDIP
17
32
E1
1
16
D
e
A
BASE
PLANE
-CSEATING
PLANE
A1
L
b2
.015
b j
E
GAGE
PLANE
0.10 m C
See
Lead Detail
Z Z
COMMON DIMENSIONS
(UNIT OF MEASURE=MM)
C
L
eC
Lead Detail
eA
eB
Notes:
1. Dimensions D and E1 do not include mold Flash or
Protrusion. Mold Flash or Protrusion shall not exceed
0.25 mm (0.010").
c
Symbol
A
A1
b
Min.
0.381
0.356
Nom.
-
Max.
4.826
0.558
b2
c
D
E
E1
1.041
0.203
41.783
15.240
13.462
-
1.651
0.381
42.291
15.875
13.970
L
e
eA
eB
eC
3.048
2.54 BSC
15.24 BSC
-
3.556
0.000
Note
Note 1
Note 1
17.78
1.524
11/28/11
Package Drawing Contact:
[email protected]
TITLE
32P6, 32-lead, 0.600”/15.24 mm Wide Plastic Dual
Inline Package (PDIP)
GPC
DRAWING NO.
REV.
PLU
32P6
C
11
0360N–EPROM–042015
9.
12
Revision history
Doc. Rev.
Date
Comments
0360N
04/2015
Correct PDIP and PLCC pinouts.
Update the 32P6 package outline drawing and the Atmel logos.
0360M
04/2011
Remove TSOP package
Add lead finish to ordering information
0360L
12/2007
Atmel AT27C080
0360N–EPROM–042015
XXXXXX
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1600 Technology Drive, San Jose, CA 95110 USA
T: (+1)(408) 441.0311
F: (+1)(408) 436.4200
|
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© 2015 Atmel Corporation. / Rev.: Atmel-0360N-EPROM-AT27C080-Datasheet_042015.
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