Atmel AT24HC02C I2C-Compatible (2-wire) Serial EEPROM 2-Kbit (256 x 8) DATASHEET Features Write Protect pin for hardware data protection Utilizes different array protection compared to the AT24C02C Low-voltage operation VCC = 1.7V to 5.5V Internally organized as 128 x 8 (1K) or 256 x 8 (2K) I2C compatible (2-wire) serial interface Schmitt Trigger, filtered inputs for noise suppression Bidirectional data transfer protocol 400kHz (1.7V) and 1MHz (2.5V, 2.7V, 5.0V) compatibility 8-byte Page Write mode Partial Page Writes allowed Self-timed write cycle (5ms max) High-reliability Endurance: 1,000,000 write cycles Data retention: 100 years Green package options (Pb/Halide-free/RoHS-compliant) 8-lead PDIP, 8-lead JEDEC SOIC, and 8-lead TSSOP Die sale options: wafer form and tape and reel available Description The Atmel® AT24HC02C provides 2048-bits of Serial Electrically Erasable and Programmable Read-Only Memory (EEPROM) organized as 256 words of eight bits each. The device include a cascading feature that allows up to eight devices to share a common 2-wire bus. These devices are optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24HC02C are available in space saving 8-lead PDIP, 8-lead JEDEC SOIC, and 8-lead TSSOP packages. In addition, the product operates from 1.7V to 5.5V VCC. Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 1. Pin Configurations and Pinouts Pin Name A0 - A2 2. Function Address Inputs SDA Serial Data SCL Serial Clock Input WP Write Protect GND Ground VCC Power Supply 8-lead PDIP 8-lead SOIC VCC A0 1 8 VCC A1 2 7 WP A0 1 8 A1 2 7 WP A2 3 6 SCL A2 3 6 SCL GND 4 5 SDA GND 4 5 SDA 8-lead TSSOP A0 1 8 VCC A1 2 7 WP A2 3 6 SCL GND 4 5 SDA Absolute Maximum Ratings Operating Temperature ........................–55C to +125C Storage Temperature ...........................–65C to +150C Voltage on any pin with respect to ground .............................–1.0V to +7.0V Maximum Operating Voltage ................................. 6.25V DC Output Current................................................ 5.0mA *Notice: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 2 3. Block Diagram VCC GND WP Start Stop Logic SDA Serial Control Logic LOAD Device Address Comparator A2 A1 A0 R/W EN H.V. Pump/Timing COMP LOAD Data Word Addr/counter Y DEC Data Recovery INC X DEC SCL EEPROM Serial MUX DOUT/ACK Logic DIN DOUT 4. Pin Description Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open drain driven and may be wire-ORed with any number of other open drain or open collector devices. Device Addresses (A2, A1, A0): The A2, A1, and A0 pins are device address inputs that are hard wired for the AT24HC02C. As many as eight 2-Kbit devices may be addressed on a single bus system. See Section 7. “Device Addressing” on page 9 for more details. Write Protect (WP): The AT24HC02C have a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protect pin is connected to VCC, the write protection feature is enabled and operates as shown below in Table 4-1. Table 4-1. Write Protect WP Pin Status Part of the Array Protected At VCC Upper Half (1K) of Array At GND Normal Read/Write Operations Atmel AT24HC02C Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 3 5. Memory Organization Atmel AT24HC02C, 2K Serial EEPROM: Internally organized with 32 pages of 8-bytes each, the 2K requires an 8-bit data word address for random word addressing. Table 5-1. Pin Capacitance(1) Applicable over recommended operating range from TA = 25C, f = 1.0MHz, VCC = 1.7V to 5.5V Symbol Test Condition CI/O CIN Note: 1. Table 5-2. Max Units Conditions Input/Output Capacitance (SDA) 8 pF VI/O = 0V Input Capacitance (A0, A1, A2, SCL) 6 pF VIN = 0V This parameter is characterized and is not 100% tested. DC Characteristics Applicable over recommended operating range from: TAI = –40°C to +85°C, VCC = 1.7V to 5.5V (unless otherwise noted) Symbol Parameter VCC1 Supply Voltage VCC2 Test Condition Max Units 1.7 5.5 V Supply Voltage 2.5 5.5 V VCC3 Supply Voltage 4.5 5.5 V ICC1 Supply Current VCC = 5.0V Read at 400kHz 0.4 1.0 mA ICC2 Supply Current VCC = 5.0V Write at 400kHz 2.0 3.0 mA ISB1 Standby Current VCC = 1.7V VIN = VCC or VSS 1.0 μA ISB2 Standby Current VCC = 2.5V VIN = VCC or VSS 2.0 μA ISB3 Standby Current VCC = 5.5V VIN = VCC or VSS 6.0 μA ILI Input Leakage Current VIN = VCC or VSS 0.10 3.0 μA ILO Output Leakage Current VOUT = VCC or VSS 0.05 3.0 μA VIL Input Low Level(1) –0.6 VCC x 0.3 V VCC x 0.7 VCC + 0.5 V (1) Min Typ VIH Input High Level VOL1 Output Low Level VCC = 1.7V IOL = 0.15mA 0.2 V VOL2 Output Low Level VCC = 3.0V IOL = 2.1mA 0.4 V Note: 1. VIL min and VIH max are reference only and are not tested. Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 4 Table 5-3. AC Characteristics Applicable over recommended operating range from TAI = –40C to +85C, VCC = 1.7V to 5.5V, CL = 1TTL Gate and 100pF (unless otherwise noted). Test conditions are listed in Note 2. 1.7V Min 2.5V,5.0V Symbol Parameter Max Min fSCL Clock Frequency, SCL tLOW Clock Pulse Width Low 1.2 0.4 μs tHIGH Clock Pulse Width High 0.6 0.4 μs tI Noise Suppression Time tAA Clock Low to Data Out Valid 0.1 tBUF Time the bus must be free before a new transmission can start. 1.2 0.5 μs tHD.STA Start Hold Time 0.6 0.25 μs tSU.STA Start Setup Time 0.6 0.25 μs tHD.DAT Data In Hold Time 0 0 μs tSU.DAT Data In Setup Time 100 100 ns 400 100 (1) 0.9 0.05 Max Units 1000 kHz 50 ns 0.55 μs tR Inputs Rise Time tF Inputs Fall Time(1) tSU.STO Stop Setup Time 0.6 .25 μs tDH Data Out Hold Time 50 50 ns tWR Write Cycle Time Endurance(1) 25C, Page Mode, 3.3V Note: 1. This parameter is ensured by characterization only. 2. AC measurement conditions: RL (connects to VCC): 1.3 k (2.5V, 5V), 10 k (1.7V) Input pulse voltages: 0.3 VCC to 0.7 VCC Input rise and fall times: 50ns Input and output timing reference voltages: 0.5 VCC 0.3 0.3 μs 300 100 ns 5 5 1,000,000 ms Write Cycles Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 5 6. Device Operation Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (see Figure 6-4 on page 8). Data changes during SCL high periods will indicate a Start or Stop condition as defined below. Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any other command (see Figure 6-5 on page 8). Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the Stop command will place the EEPROM in a standby power mode (see Figure 6-5 on page 8). Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle. Standby Mode: The AT24HC02C features a low power standby mode which is enabled: Upon power-up After the receipt of the stop bit and the completion of any internal operations 2-wire Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be reset by following these steps: 1. Create a start bit condition 2. Clock nine cycles 3. Create another start bit followed by stop bit condition as shown in Figure 6-1. The device is ready for the next communication after above steps have been completed. Figure 6-1. Software reset Dummy Clock Cycles SCL 1 Start Bit 2 3 8 9 Start Bit Stop Bit SDA Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 6 Figure 6-2. Bus Timing SCL: Serial Clock, SDA: Serial Data I/O tHIGH tF tR tLOW SCL tSU.STA tLOW tHD.STA tHD.DAT tSU.DAT tSU.STO SDA IN tAA tDH tBUF SDA OUT Figure 6-3. Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O SCL SDA 8th Bit ACK WORDN (1) tWR Stop Condition Notes: 1. Start Condition The write cycle time tWR is the time from a valid Stop condition of a write sequence to the end of the internal clear/write cycle. Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 7 Figure 6-4. Data Validity SDA SCL Data Stable Data Stable Data Change Figure 6-5. Start and Stop Definition SDA SCL Start Stop Figure 6-6. Output Acknowledge 1 SCL 8 9 Data In Data Out Start Acknowledge Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 8 7. Device Addressing The 2-Kbit EEPROM device requires an 8-bit device address word following a start condition to enable the chip for a Read or Write operation. The device address word consists of a mandatory ‘1010’ (Ah) sequence for the first four most significant bits as shown in Figure 7-1. This is common to all Serial EEPROM devices. The next three bits are the A2, A1, and A0 device address bits for the EEPROM. These three bits must compare to their corresponding hard-wired input pins A2, A1, and A0 in order for the part to acknowledge. The eighth bit of the device address is the Read/Write operation select bit. A Read operation is initiated if this bit is high and a Write operation is initiated if this bit is low. Upon a valid compare of the device address with hard-wired input pins A2, A1, and A0, the EEPROM will output a zero. If a compare is not successfully made, the chip will return to a standby state. Figure 7-1. Device Address 2K 1 0 1 0 MSB 8. A2 A1 A0 R/W LSB Write Operations Byte Write: A write operation requires an 8-bit data word address following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, such as a microcontroller, must terminate the write sequence with a Stop condition. At this time, the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write is complete (see Figure 9-1 on page 10). Page Write: The 2-Kbit EEPROM is capable of an 8-byte Page Write. A Page Write is initiated the same as a Byte Write, but the microcontroller does not send a Stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to seven data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the page write sequence with a Stop condition (see Figure 9-2 on page 10). The data word address lower three bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than eight data words are transmitted to the EEPROM, the data word address will “roll over” and previous data will be overwritten. Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending a Start condition followed by the device address word. The read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a zero allowing the read or write sequence to continue. Data Security: The Atmel AT24HC02C has a hardware data protection scheme that allows the user to write protect the upper half of the memory (80h - FFh) when the WP pin is at VCC. Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 9 9. Read Operations Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read operations: Current Address Read, Random Address Read, and Sequential Read. Current Address Read: The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address “roll over” during read is from the last byte of the last memory page to the first byte of the first page. The address “roll over” during write is from the last byte of the current page to the first byte of the same page. Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an zero but does generate a following Stop condition (see Figure 9-3 on page 11). Random Read: A Random Read requires a “dummy” byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition. The microcontroller now initiates a Current Address Read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero but does generate a following stop condition (see Figure 9-4 on page 11). Sequential Read: Sequential Reads are initiated by either a Current Address Read or a Random Address Read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will “roll over” and the Sequential Read will continue. The Sequential Read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition (see Figure 9-5 on page 11). Figure 9-1. Byte Write S T A R T Device Address W R I T E Word Address S T O P Data SDA LINE M S B R A / C W K A C K A C K Figure 9-2. Page Write S T A R T Device Address W R I T E Word Address (n) Data (n) Data (n + 1) S T O P Data (n + x) SDA LINE M S B R A / C W K A C K A C K A C K A C K Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 10 Figure 9-3. Current Address Read S T A R T R E A D Device Address S T O P Data SDA LINE M S B R A / C W K N O A C K Figure 9-4. Random Read S T A R T W R I T E Device Address S T A R T Word Address (n) Device Address R E A D S T O P Data (n) SDA LINE M S B R A / C W K A C K A C K N O A C K Dummy Write Figure 9-5. Sequential Read Device Address R E A D Data (n) A C K Data (n + 1) A C K Data (n + 2) A C K S T O P Data (n + x) SDA LINE M S B R A / C WK N O A C K Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 11 10. Ordering Code Detail AT24HC02C-SSHM-B Atmel Designator Shipping Carrier Option B or blank = Bulk (tubes) T = Tape and Reel Product Family Operating Voltage M Device Density 02 = 2-Kbit = 1.7V to 5.5V Package Device Grade or Wafer/Die Thickness U Device Revision = Green, matte Sn lead finish, Industrial temperature range (-40˚C to +85˚C) H = Green, NiPdAu lead finish, Industrial temperature range (-40˚C to +85˚C) 11 = 11mil wafer thickness Package Option P = PDIP SS = JEDEC SOIC X = TSSOP WWU = Wafer unsawn Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 12 11. Part Markings AT24HC02C: Package Marking Information 8-lead PDIP 8-lead SOIC ATMLUYWW H2CM @ AAAAAAAA Note 1: 8-lead TSSOP ATHYWW H2CM @ AAAAAAA ATMLHYWW H2CM @ AAAAAAAA designates pin 1 Note 2: Package drawings are not to scale Catalog Number Truncation AT24HC02C Truncation Code ###: H2C Date Codes Y = Year 2: 2012 3: 2013 4: 2014 5: 2015 Voltages 6: 2016 7: 2017 8: 2018 9: 2019 M = Month A: January B: February ... L: December WW = Work Week of Assembly 02: Week 2 04: Week 4 ... 52: Week 52 Country of Assembly Lot Number @ = Country of Assembly AAA...A = Atmel Wafer Lot Number Trace Code M: 1.7V min Grade/Lead Finish Material U: Industrial/Matte Tin H: Industrial/NiPdAu Atmel Truncation XX = Trace Code (Atmel Lot Numbers Correspond to Code) Example: AA, AB.... YZ, ZZ AT: Atmel ATM: Atmel ATML: Atmel 5/21/12 TITLE Package Mark Contact: [email protected] 24HC02CSM, AT24HC02C Package Marking Information DRAWING NO. REV. 24HC02CSM B Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 13 12. Ordering Codes 12.1 Atmel AT24HC02C Ordering Information Ordering Code AT24HC02C-PUM Lead Finish Package Matte Tin (Lead-free/Halogen-free) 8P3 Voltage Operation Range 1.7V to 5.5V Industrial Temperature (–40C to 85C) AT24HC02C-SSHM-B(1) 8S1 (2) AT24HC02C-SSHM-T AT24HC02C-XHM-B(1) NiPdAu (Lead-free/Halogen-free) 8X AT24HC02C-XHM-T(2) AT24HC02C-WWU11M(3) Notes: 1. 2. 3. — Wafer Sale B = Bulk (tubes) T = Tape and reel SOIC = 4K per reel TSSOP = 5K per reel For Wafer sales, please contact Atmel Sales. Package Type 8P3 8-lead, 0.300" wide, Plastic Dual Inline (PDIP) 8S1 8-lead, 0.150" wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8X 8-lead, 4.4mm body, Plastic Thin Shrink Small Outline (TSSOP) Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 14 13. Packaging Information 13.1 8P3 — 8-lead PDIP E 1 E1 N Top View c eA End View COMMON DIMENSIONS (Unit of Measure = inches) D e D1 MIN NOM MAX A2 0.115 0.130 0.195 b 0.014 0.018 0.022 5 b2 0.045 0.060 0.070 6 b3 0.030 0.039 0.045 6 c 0.008 0.010 0.014 D 0.355 0.365 0.400 D1 0.005 E 0.300 E1 0.240 SYMBOL A2 A A b2 L b3 b 4 PLCS e Side View 2 3 3 0.310 0.325 4 0.250 0.280 3 0.150 2 0.100 BSC eA L Notes: 0.210 NOTE 0.300 BSC 0.115 0.130 4 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. 3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch. 4. E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion. 6. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 06/21/11 Package Drawing Contact: [email protected] TITLE GPC DRAWING NO. 8P3, 8-lead, 0.300” Wide Body, Plastic Dual In-line Package (PDIP) PTC 8P3 Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 REV. D 15 13.2 8S1 — 8-lead JEDEC SOIC C 1 E E1 L N Ø TOP VIEW END VIEW e b COMMON DIMENSIONS (Unit of Measure = mm) A A1 D SIDE VIEW Notes: This drawing is for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. SYMBOL MIN A 1.35 NOM MAX – 1.75 A1 0.10 – 0.25 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.05 E1 3.81 – 3.99 E 5.79 – 6.20 e NOTE 1.27 BSC L 0.40 – 1.27 Ø 0° – 8° 6/22/11 Package Drawing Contact: [email protected] TITLE 8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) GPC SWB DRAWING NO. REV. 8S1 G Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 16 13.3 8X — 8-lead TSSOP C 1 Pin 1 indicator this corner E1 E L1 N L Top View End View A b A1 e A2 MIN NOM MAX A - - 1.20 A1 0.05 - 0.15 A2 0.80 1.00 1.05 D 2.90 3.00 3.10 E1 4.30 4.40 4.50 3, 5 b 0.19 – 0.30 4 SYMBOL D Side View Notes: COMMON DIMENSIONS (Unit of Measure = mm) 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25mm (0.010in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm. 5. Dimension D and E1 to be determined at Datum Plane H. E 2, 5 6.40 BSC e L NOTE 0.65 BSC 0.45 0.60 0.75 L1 1.00 REF C 0.09 - 0.20 6/22/11 TITLE Package Drawing Contact: [email protected] 8X, 8-lead 4.4mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) GPC TNR DRAWING NO. 8X Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 REV. D 17 14. Revision History Doc. Rev. Date 8779B 04/2013 8779A 06/2012 Comments Corrected Write Protect address range. Update footers and disclaimer page. Initial document release. Atmel AT24HC02C [DATASHEET] Atmel-8779B-SEEPROM-AT24HC02C-Datasheet_042013 18 X X X X Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441.0311 F: (+1)(408) 436.4200 | www.atmel.com © 2013 Atmel Corporation. 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